From: Rob Herring <robh@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com,
broonie@kernel.org, lukas@wunner.de, bbrezillon@kernel.org,
p.yadav@ti.com, tudor.ambarus@microchip.com,
linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding
Date: Tue, 15 Dec 2020 10:13:04 -0600 [thread overview]
Message-ID: <20201215161304.GA3935217@robh.at.kernel.org> (raw)
In-Reply-To: <1607721363-8879-3-git-send-email-skomatineni@nvidia.com>
On Fri, Dec 11, 2020 at 01:15:56PM -0800, Sowjanya Komatineni wrote:
> This patch adds YAML based device tree binding document for Tegra
> Quad SPI driver.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> .../bindings/spi/nvidia,tegra210-quad.yaml | 130 +++++++++++++++++++++
> 1 file changed, 130 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
> new file mode 100644
> index 0000000..0b5fea6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Tegra Quad SPI Controller
> +
> +maintainers:
> + - Thierry Reding <thierry.reding@gmail.com>
> + - Jonathan Hunter <jonathanh@nvidia.com>
allOf:
- $ref: spi-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - nvidia,tegra210-qspi
> + - nvidia,tegra186-qspi
> + - nvidia,tegra194-qspi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: qspi
> + - const: qspi_out
> +
> + clocks:
> + maxItems: 2
> +
> + resets:
> + maxItems: 1
> +
> + dmas:
> + maxItems: 2
> +
> + dma-names:
> + items:
> + - const: rx
> + - const: tx
> +
> +patternProperties:
> + "^.*@[0-9a-f]+":
You can drop '^.*'.
> + type: object
> +
> + properties:
> + compatible:
> + description:
> + Compatible of the SPI device.
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Maximum Quad SPI clocking speed of the device in Hz.
> +
> + spi-rx-bus-width:
> + description:
> + Bus width to the Quad SPI bus used for read transfers.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2, 4]
> +
> + spi-tx-bus-width:
> + description:
> + Bus width to the Quad SPI bus used for write transfers.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2, 4]
All of the above 5 properties are covered by spi-controller.yaml. You
only need additional constraints here. As 8-bit mode is not supported,
you need:
spi-tx-bus-width:
enum: [1, 2, 4]
> +
> + nvidia,tx-clk-tap-delay:
> + description:
> + Delays the clock going out to device with this tap value.
> + Tap value varies based on platform design trace lengths from Tegra
> + QSPI to corresponding slave device.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 31
> +
> + nvidia,rx-clk-tap-delay:
> + description:
> + Delays the clock coming in from the device with this tap value.
> + Tap value varies based on platform design trace lengths from Tegra
> + QSPI to corresponding slave device.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 255
Please include these properties in your example.
> +
> + required:
> + - reg
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - resets
> +
> +additionalProperties: true
That's generally wrong unless it's a schema to be included by other
schemas.
unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/tegra210-car.h>
> + #include <dt-bindings/reset/tegra210-car.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + spi@70410000 {
> + compatible = "nvidia,tegra210-qspi";
> + reg = <0x70410000 0x1000>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&tegra_car TEGRA210_CLK_QSPI>,
> + <&tegra_car TEGRA210_CLK_QSPI_PM>;
> + clock-names = "qspi", "qspi_out";
> + resets = <&tegra_car 211>;
> + dmas = <&apbdma 5>, <&apbdma 5>;
> + dma-names = "rx", "tx";
> +
> + flash@0 {
> + compatible = "spi-nor";
> + reg = <0>;
> + spi-max-frequency = <104000000>;
> + spi-tx-bus-width = <2>;
> + spi-rx-bus-width = <2>;
> + };
> + };
> --
> 2.7.4
>
next prev parent reply other threads:[~2020-12-15 16:14 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 21:15 [PATCH v3 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-11 21:15 ` [PATCH v3 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Sowjanya Komatineni
2020-12-15 16:03 ` Rob Herring
2020-12-11 21:15 ` [PATCH v3 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding Sowjanya Komatineni
2020-12-15 16:13 ` Rob Herring [this message]
2020-12-11 21:15 ` [PATCH v3 3/9] MAINTAINERS: Add Tegra Quad SPI driver section Sowjanya Komatineni
2020-12-11 21:15 ` [PATCH v3 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-12 12:06 ` Lukas Wunner
2020-12-11 21:15 ` [PATCH v3 5/9] spi: spi-mem: Allow masters to transfer dummy cycles directly by hardware Sowjanya Komatineni
2020-12-12 10:57 ` Boris Brezillon
2020-12-12 17:28 ` Sowjanya Komatineni
2020-12-13 9:54 ` Boris Brezillon
2020-12-13 11:28 ` Boris Brezillon
2020-12-13 17:34 ` Sowjanya Komatineni
2020-12-14 16:23 ` Mark Brown
2020-12-11 21:16 ` [PATCH v3 6/9] spi: tegra210-quad: Add support for hardware dummy cycles Sowjanya Komatineni
2020-12-13 10:14 ` Boris Brezillon
2020-12-11 21:16 ` [PATCH v3 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-11 21:16 ` [PATCH v3 8/9] arm64: tegra: Add QSPI nodes on Tegra194 Sowjanya Komatineni
2020-12-11 21:16 ` [PATCH v3 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni
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