8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Borislav Petkov]

Hi,

patch in $Subject breaks booting on a laptop here, GPU details are
below. The machine stops booting right when it attempts to switch modes
during boot, to a higher mode than the default VGA one. Machine doesn't
ping and is otherwise unresponsive so that a hard reset is the only
thing that helps.

Reverting that patch ontop of -rc7 fixes it and the machine boots just fine.

Thx.

[    1.628086] ata1.00: supports DRM functions and may not be fully accessible
[    1.632050] ata1.00: supports DRM functions and may not be fully accessible
[    1.895818] [drm] amdgpu kernel modesetting enabled.
[    1.897628] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x103C:0x807E 0xC4).
[    1.898256] [drm] register mmio base: 0xD0C00000
[    1.898422] [drm] register mmio size: 262144
[    1.898583] [drm] add ip block number 0 <vi_common>
[    1.898759] [drm] add ip block number 1 <gmc_v8_0>
[    1.898931] [drm] add ip block number 2 <cz_ih>
[    1.899082] [drm] add ip block number 3 <gfx_v8_0>
[    1.899241] [drm] add ip block number 4 <sdma_v3_0>
[    1.899439] [drm] add ip block number 5 <powerplay>
[    1.899573] [drm] add ip block number 6 <dm>
[    1.899693] [drm] add ip block number 7 <uvd_v6_0>
[    1.899827] [drm] add ip block number 8 <vce_v3_0>
[    1.911458] [drm] BIOS signature incorrect 5b 7
[    1.912551] [drm] UVD is enabled in physical mode
[    1.912707] [drm] VCE enabled in physical mode
[    1.912921] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
[    1.913837] [drm] Detected VRAM RAM=512M, BAR=512M
[    1.913998] [drm] RAM width 128bits UNKNOWN
[    1.915149] [drm] amdgpu: 512M of VRAM memory ready
[    1.915306] [drm] amdgpu: 3072M of GTT memory ready.
[    1.915468] [drm] GART: num cpu pages 262144, num gpu pages 262144
[    1.916139] [drm] PCIE GART of 1024M enabled (table at 0x000000F400900000).
[    1.918733] [drm] Found UVD firmware Version: 1.91 Family ID: 11
[    1.918950] [drm] UVD ENC is disabled
[    1.919680] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
[    1.925963] [drm] DM_PPLIB: values for Engine clock
[    1.926106] [drm] DM_PPLIB:   300000
[    1.926205] [drm] DM_PPLIB:   360000
[    1.926304] [drm] DM_PPLIB:   423530
[    1.926404] [drm] DM_PPLIB:   514290
[    1.926516] [drm] DM_PPLIB:   626090
[    1.926629] [drm] DM_PPLIB:   720000
[    1.926743] [drm] DM_PPLIB: Validation clocks:
[    1.926952] [drm] DM_PPLIB:    engine_max_clock: 72000
[    1.927117] [drm] DM_PPLIB:    memory_max_clock: 80000
[    1.927281] [drm] DM_PPLIB:    level           : 8
[    1.927435] [drm] DM_PPLIB: values for Display clock
[    1.927594] [drm] DM_PPLIB:   300000
[    1.927708] [drm] DM_PPLIB:   400000
[    1.927822] [drm] DM_PPLIB:   496560
[    1.927936] [drm] DM_PPLIB:   626090
[    1.928048] [drm] DM_PPLIB:   685720
[    1.928161] [drm] DM_PPLIB:   757900
[    1.928275] [drm] DM_PPLIB: Validation clocks:
[    1.928419] [drm] DM_PPLIB:    engine_max_clock: 72000
[    1.928584] [drm] DM_PPLIB:    memory_max_clock: 80000
[    1.928748] [drm] DM_PPLIB:    level           : 8
[    1.928901] [drm] DM_PPLIB: values for Memory clock
[    1.929058] [drm] DM_PPLIB:   333000
[    1.929172] [drm] DM_PPLIB:   800000
[    1.929403] [drm] DM_PPLIB: Validation clocks:
[    1.929549] [drm] DM_PPLIB:    engine_max_clock: 72000
[    1.929716] [drm] DM_PPLIB:    memory_max_clock: 80000
[    1.929919] [drm] DM_PPLIB:    level           : 8
[    1.930148] [drm] Display Core initialized with v3.2.104!
[    2.003938] [drm] UVD initialized successfully.
[    2.204023] [drm] VCE initialized successfully.
[    2.206228] [drm] fb mappable at 0xA0EE4000
[    2.206375] [drm] vram apper at 0xA0000000
[    2.206514] [drm] size 14745600
[    2.206654] [drm] fb depth is 24
[    2.206760] [drm]    pitch is 10240
[    2.207123] fbcon: amdgpudrmfb (fb0) is primary device
[    2.301263] amdgpu 0000:00:01.0: [drm] fb0: amdgpudrmfb frame buffer device
[    2.320735] [drm] Initialized amdgpu 3.40.0 20150101 for 0000:00:01.0 on minor 0


-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Alex Deucher]

On Fri, Dec 11, 2020 at 11:49 AM Borislav Petkov <bp@alien8.de> wrote:
>
> Hi,
>
> patch in $Subject breaks booting on a laptop here, GPU details are
> below. The machine stops booting right when it attempts to switch modes
> during boot, to a higher mode than the default VGA one. Machine doesn't
> ping and is otherwise unresponsive so that a hard reset is the only
> thing that helps.
>
> Reverting that patch ontop of -rc7 fixes it and the machine boots just fine.

+ a few more display folks

This patch looks like a correctness fix, but not critical.  Unless
anyone has a proper fix handy, I'll just revert it for now and we can
revisit it properly.

Alex


>
> Thx.
>
> [    1.628086] ata1.00: supports DRM functions and may not be fully accessible
> [    1.632050] ata1.00: supports DRM functions and may not be fully accessible
> [    1.895818] [drm] amdgpu kernel modesetting enabled.
> [    1.897628] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x103C:0x807E 0xC4).
> [    1.898256] [drm] register mmio base: 0xD0C00000
> [    1.898422] [drm] register mmio size: 262144
> [    1.898583] [drm] add ip block number 0 <vi_common>
> [    1.898759] [drm] add ip block number 1 <gmc_v8_0>
> [    1.898931] [drm] add ip block number 2 <cz_ih>
> [    1.899082] [drm] add ip block number 3 <gfx_v8_0>
> [    1.899241] [drm] add ip block number 4 <sdma_v3_0>
> [    1.899439] [drm] add ip block number 5 <powerplay>
> [    1.899573] [drm] add ip block number 6 <dm>
> [    1.899693] [drm] add ip block number 7 <uvd_v6_0>
> [    1.899827] [drm] add ip block number 8 <vce_v3_0>
> [    1.911458] [drm] BIOS signature incorrect 5b 7
> [    1.912551] [drm] UVD is enabled in physical mode
> [    1.912707] [drm] VCE enabled in physical mode
> [    1.912921] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
> [    1.913837] [drm] Detected VRAM RAM=512M, BAR=512M
> [    1.913998] [drm] RAM width 128bits UNKNOWN
> [    1.915149] [drm] amdgpu: 512M of VRAM memory ready
> [    1.915306] [drm] amdgpu: 3072M of GTT memory ready.
> [    1.915468] [drm] GART: num cpu pages 262144, num gpu pages 262144
> [    1.916139] [drm] PCIE GART of 1024M enabled (table at 0x000000F400900000).
> [    1.918733] [drm] Found UVD firmware Version: 1.91 Family ID: 11
> [    1.918950] [drm] UVD ENC is disabled
> [    1.919680] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
> [    1.925963] [drm] DM_PPLIB: values for Engine clock
> [    1.926106] [drm] DM_PPLIB:   300000
> [    1.926205] [drm] DM_PPLIB:   360000
> [    1.926304] [drm] DM_PPLIB:   423530
> [    1.926404] [drm] DM_PPLIB:   514290
> [    1.926516] [drm] DM_PPLIB:   626090
> [    1.926629] [drm] DM_PPLIB:   720000
> [    1.926743] [drm] DM_PPLIB: Validation clocks:
> [    1.926952] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.927117] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.927281] [drm] DM_PPLIB:    level           : 8
> [    1.927435] [drm] DM_PPLIB: values for Display clock
> [    1.927594] [drm] DM_PPLIB:   300000
> [    1.927708] [drm] DM_PPLIB:   400000
> [    1.927822] [drm] DM_PPLIB:   496560
> [    1.927936] [drm] DM_PPLIB:   626090
> [    1.928048] [drm] DM_PPLIB:   685720
> [    1.928161] [drm] DM_PPLIB:   757900
> [    1.928275] [drm] DM_PPLIB: Validation clocks:
> [    1.928419] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.928584] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.928748] [drm] DM_PPLIB:    level           : 8
> [    1.928901] [drm] DM_PPLIB: values for Memory clock
> [    1.929058] [drm] DM_PPLIB:   333000
> [    1.929172] [drm] DM_PPLIB:   800000
> [    1.929403] [drm] DM_PPLIB: Validation clocks:
> [    1.929549] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.929716] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.929919] [drm] DM_PPLIB:    level           : 8
> [    1.930148] [drm] Display Core initialized with v3.2.104!
> [    2.003938] [drm] UVD initialized successfully.
> [    2.204023] [drm] VCE initialized successfully.
> [    2.206228] [drm] fb mappable at 0xA0EE4000
> [    2.206375] [drm] vram apper at 0xA0000000
> [    2.206514] [drm] size 14745600
> [    2.206654] [drm] fb depth is 24
> [    2.206760] [drm]    pitch is 10240
> [    2.207123] fbcon: amdgpudrmfb (fb0) is primary device
> [    2.301263] amdgpu 0000:00:01.0: [drm] fb0: amdgpudrmfb frame buffer device
> [    2.320735] [drm] Initialized amdgpu 3.40.0 20150101 for 0000:00:01.0 on minor 0
>
>
> --
> Regards/Gruss,
>     Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Rodrigo Siqueira]

[-- Attachment #1: Type: text/plain, Size: 5073 bytes --]

Hi Boris,

Could you check if your branch has this commit:

 drm/amd/display: Fix module load hangs when connected to an eDP

If so, could you try this patch:

 https://patchwork.freedesktop.org/series/84965/

Thanks

On 12/11, Borislav Petkov wrote:
> Hi,
> 
> patch in $Subject breaks booting on a laptop here, GPU details are
> below. The machine stops booting right when it attempts to switch modes
> during boot, to a higher mode than the default VGA one. Machine doesn't
> ping and is otherwise unresponsive so that a hard reset is the only
> thing that helps.
> 
> Reverting that patch ontop of -rc7 fixes it and the machine boots just fine.
> 
> Thx.
> 
> [    1.628086] ata1.00: supports DRM functions and may not be fully accessible
> [    1.632050] ata1.00: supports DRM functions and may not be fully accessible
> [    1.895818] [drm] amdgpu kernel modesetting enabled.
> [    1.897628] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x103C:0x807E 0xC4).
> [    1.898256] [drm] register mmio base: 0xD0C00000
> [    1.898422] [drm] register mmio size: 262144
> [    1.898583] [drm] add ip block number 0 <vi_common>
> [    1.898759] [drm] add ip block number 1 <gmc_v8_0>
> [    1.898931] [drm] add ip block number 2 <cz_ih>
> [    1.899082] [drm] add ip block number 3 <gfx_v8_0>
> [    1.899241] [drm] add ip block number 4 <sdma_v3_0>
> [    1.899439] [drm] add ip block number 5 <powerplay>
> [    1.899573] [drm] add ip block number 6 <dm>
> [    1.899693] [drm] add ip block number 7 <uvd_v6_0>
> [    1.899827] [drm] add ip block number 8 <vce_v3_0>
> [    1.911458] [drm] BIOS signature incorrect 5b 7
> [    1.912551] [drm] UVD is enabled in physical mode
> [    1.912707] [drm] VCE enabled in physical mode
> [    1.912921] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
> [    1.913837] [drm] Detected VRAM RAM=512M, BAR=512M
> [    1.913998] [drm] RAM width 128bits UNKNOWN
> [    1.915149] [drm] amdgpu: 512M of VRAM memory ready
> [    1.915306] [drm] amdgpu: 3072M of GTT memory ready.
> [    1.915468] [drm] GART: num cpu pages 262144, num gpu pages 262144
> [    1.916139] [drm] PCIE GART of 1024M enabled (table at 0x000000F400900000).
> [    1.918733] [drm] Found UVD firmware Version: 1.91 Family ID: 11
> [    1.918950] [drm] UVD ENC is disabled
> [    1.919680] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
> [    1.925963] [drm] DM_PPLIB: values for Engine clock
> [    1.926106] [drm] DM_PPLIB:   300000
> [    1.926205] [drm] DM_PPLIB:   360000
> [    1.926304] [drm] DM_PPLIB:   423530
> [    1.926404] [drm] DM_PPLIB:   514290
> [    1.926516] [drm] DM_PPLIB:   626090
> [    1.926629] [drm] DM_PPLIB:   720000
> [    1.926743] [drm] DM_PPLIB: Validation clocks:
> [    1.926952] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.927117] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.927281] [drm] DM_PPLIB:    level           : 8
> [    1.927435] [drm] DM_PPLIB: values for Display clock
> [    1.927594] [drm] DM_PPLIB:   300000
> [    1.927708] [drm] DM_PPLIB:   400000
> [    1.927822] [drm] DM_PPLIB:   496560
> [    1.927936] [drm] DM_PPLIB:   626090
> [    1.928048] [drm] DM_PPLIB:   685720
> [    1.928161] [drm] DM_PPLIB:   757900
> [    1.928275] [drm] DM_PPLIB: Validation clocks:
> [    1.928419] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.928584] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.928748] [drm] DM_PPLIB:    level           : 8
> [    1.928901] [drm] DM_PPLIB: values for Memory clock
> [    1.929058] [drm] DM_PPLIB:   333000
> [    1.929172] [drm] DM_PPLIB:   800000
> [    1.929403] [drm] DM_PPLIB: Validation clocks:
> [    1.929549] [drm] DM_PPLIB:    engine_max_clock: 72000
> [    1.929716] [drm] DM_PPLIB:    memory_max_clock: 80000
> [    1.929919] [drm] DM_PPLIB:    level           : 8
> [    1.930148] [drm] Display Core initialized with v3.2.104!
> [    2.003938] [drm] UVD initialized successfully.
> [    2.204023] [drm] VCE initialized successfully.
> [    2.206228] [drm] fb mappable at 0xA0EE4000
> [    2.206375] [drm] vram apper at 0xA0000000
> [    2.206514] [drm] size 14745600
> [    2.206654] [drm] fb depth is 24
> [    2.206760] [drm]    pitch is 10240
> [    2.207123] fbcon: amdgpudrmfb (fb0) is primary device
> [    2.301263] amdgpu 0000:00:01.0: [drm] fb0: amdgpudrmfb frame buffer device
> [    2.320735] [drm] Initialized amdgpu 3.40.0 20150101 for 0000:00:01.0 on minor 0
> 
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C9c55e386aad44fc9531608d89ded4100%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637432989642100749%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=WVk3xRmBn3A75KLQKaBG7FzktecRG6GS7rXJE7bEPBg%3D&amp;reserved=0

-- 
Rodrigo Siqueira
https://siqueira.tech

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Rodrigo Siqueira]

[-- Attachment #1: Type: text/plain, Size: 6073 bytes --]

Hi Alex,

I made the below patch that might fix the issue; I need to hear Boris's
feedback first. Alex, did you already revert it?

* https://patchwork.freedesktop.org/series/84965/

Thanks

On 12/14, Alex Deucher wrote:
> On Fri, Dec 11, 2020 at 11:49 AM Borislav Petkov <bp@alien8.de> wrote:
> >
> > Hi,
> >
> > patch in $Subject breaks booting on a laptop here, GPU details are
> > below. The machine stops booting right when it attempts to switch modes
> > during boot, to a higher mode than the default VGA one. Machine doesn't
> > ping and is otherwise unresponsive so that a hard reset is the only
> > thing that helps.
> >
> > Reverting that patch ontop of -rc7 fixes it and the machine boots just fine.
> 
> + a few more display folks
> 
> This patch looks like a correctness fix, but not critical.  Unless
> anyone has a proper fix handy, I'll just revert it for now and we can
> revisit it properly.
> 
> Alex
> 
> 
> >
> > Thx.
> >
> > [    1.628086] ata1.00: supports DRM functions and may not be fully accessible
> > [    1.632050] ata1.00: supports DRM functions and may not be fully accessible
> > [    1.895818] [drm] amdgpu kernel modesetting enabled.
> > [    1.897628] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x103C:0x807E 0xC4).
> > [    1.898256] [drm] register mmio base: 0xD0C00000
> > [    1.898422] [drm] register mmio size: 262144
> > [    1.898583] [drm] add ip block number 0 <vi_common>
> > [    1.898759] [drm] add ip block number 1 <gmc_v8_0>
> > [    1.898931] [drm] add ip block number 2 <cz_ih>
> > [    1.899082] [drm] add ip block number 3 <gfx_v8_0>
> > [    1.899241] [drm] add ip block number 4 <sdma_v3_0>
> > [    1.899439] [drm] add ip block number 5 <powerplay>
> > [    1.899573] [drm] add ip block number 6 <dm>
> > [    1.899693] [drm] add ip block number 7 <uvd_v6_0>
> > [    1.899827] [drm] add ip block number 8 <vce_v3_0>
> > [    1.911458] [drm] BIOS signature incorrect 5b 7
> > [    1.912551] [drm] UVD is enabled in physical mode
> > [    1.912707] [drm] VCE enabled in physical mode
> > [    1.912921] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
> > [    1.913837] [drm] Detected VRAM RAM=512M, BAR=512M
> > [    1.913998] [drm] RAM width 128bits UNKNOWN
> > [    1.915149] [drm] amdgpu: 512M of VRAM memory ready
> > [    1.915306] [drm] amdgpu: 3072M of GTT memory ready.
> > [    1.915468] [drm] GART: num cpu pages 262144, num gpu pages 262144
> > [    1.916139] [drm] PCIE GART of 1024M enabled (table at 0x000000F400900000).
> > [    1.918733] [drm] Found UVD firmware Version: 1.91 Family ID: 11
> > [    1.918950] [drm] UVD ENC is disabled
> > [    1.919680] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
> > [    1.925963] [drm] DM_PPLIB: values for Engine clock
> > [    1.926106] [drm] DM_PPLIB:   300000
> > [    1.926205] [drm] DM_PPLIB:   360000
> > [    1.926304] [drm] DM_PPLIB:   423530
> > [    1.926404] [drm] DM_PPLIB:   514290
> > [    1.926516] [drm] DM_PPLIB:   626090
> > [    1.926629] [drm] DM_PPLIB:   720000
> > [    1.926743] [drm] DM_PPLIB: Validation clocks:
> > [    1.926952] [drm] DM_PPLIB:    engine_max_clock: 72000
> > [    1.927117] [drm] DM_PPLIB:    memory_max_clock: 80000
> > [    1.927281] [drm] DM_PPLIB:    level           : 8
> > [    1.927435] [drm] DM_PPLIB: values for Display clock
> > [    1.927594] [drm] DM_PPLIB:   300000
> > [    1.927708] [drm] DM_PPLIB:   400000
> > [    1.927822] [drm] DM_PPLIB:   496560
> > [    1.927936] [drm] DM_PPLIB:   626090
> > [    1.928048] [drm] DM_PPLIB:   685720
> > [    1.928161] [drm] DM_PPLIB:   757900
> > [    1.928275] [drm] DM_PPLIB: Validation clocks:
> > [    1.928419] [drm] DM_PPLIB:    engine_max_clock: 72000
> > [    1.928584] [drm] DM_PPLIB:    memory_max_clock: 80000
> > [    1.928748] [drm] DM_PPLIB:    level           : 8
> > [    1.928901] [drm] DM_PPLIB: values for Memory clock
> > [    1.929058] [drm] DM_PPLIB:   333000
> > [    1.929172] [drm] DM_PPLIB:   800000
> > [    1.929403] [drm] DM_PPLIB: Validation clocks:
> > [    1.929549] [drm] DM_PPLIB:    engine_max_clock: 72000
> > [    1.929716] [drm] DM_PPLIB:    memory_max_clock: 80000
> > [    1.929919] [drm] DM_PPLIB:    level           : 8
> > [    1.930148] [drm] Display Core initialized with v3.2.104!
> > [    2.003938] [drm] UVD initialized successfully.
> > [    2.204023] [drm] VCE initialized successfully.
> > [    2.206228] [drm] fb mappable at 0xA0EE4000
> > [    2.206375] [drm] vram apper at 0xA0000000
> > [    2.206514] [drm] size 14745600
> > [    2.206654] [drm] fb depth is 24
> > [    2.206760] [drm]    pitch is 10240
> > [    2.207123] fbcon: amdgpudrmfb (fb0) is primary device
> > [    2.301263] amdgpu 0000:00:01.0: [drm] fb0: amdgpudrmfb frame buffer device
> > [    2.320735] [drm] Initialized amdgpu 3.40.0 20150101 for 0000:00:01.0 on minor 0
> >
> >
> > --
> > Regards/Gruss,
> >     Boris.
> >
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C36709b101b6e4c353e7e08d8a07a1d89%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435793657547591%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Cpb2l3OjKBeFwx%2FHIf%2F0d%2BSFiJL46p7Bct3JAIThSZ8%3D&amp;reserved=0
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C36709b101b6e4c353e7e08d8a07a1d89%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435793657547591%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=XdoPAac6FCjulOvtOsdzO4rh5Qd9wwNIi%2B%2F5lvkaUoI%3D&amp;reserved=0

-- 
Rodrigo Siqueira
https://siqueira.tech

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Alex Deucher]

On Tue, Dec 15, 2020 at 10:49 AM Rodrigo Siqueira
<Rodrigo.Siqueira@amd.com> wrote:
>
> Hi Alex,
>
> I made the below patch that might fix the issue; I need to hear Boris's
> feedback first. Alex, did you already revert it?

I have not reverted it yet.

Alex

>
> * https://patchwork.freedesktop.org/series/84965/
>
> Thanks
>
> On 12/14, Alex Deucher wrote:
> > On Fri, Dec 11, 2020 at 11:49 AM Borislav Petkov <bp@alien8.de> wrote:
> > >
> > > Hi,
> > >
> > > patch in $Subject breaks booting on a laptop here, GPU details are
> > > below. The machine stops booting right when it attempts to switch modes
> > > during boot, to a higher mode than the default VGA one. Machine doesn't
> > > ping and is otherwise unresponsive so that a hard reset is the only
> > > thing that helps.
> > >
> > > Reverting that patch ontop of -rc7 fixes it and the machine boots just fine.
> >
> > + a few more display folks
> >
> > This patch looks like a correctness fix, but not critical.  Unless
> > anyone has a proper fix handy, I'll just revert it for now and we can
> > revisit it properly.
> >
> > Alex
> >
> >
> > >
> > > Thx.
> > >
> > > [    1.628086] ata1.00: supports DRM functions and may not be fully accessible
> > > [    1.632050] ata1.00: supports DRM functions and may not be fully accessible
> > > [    1.895818] [drm] amdgpu kernel modesetting enabled.
> > > [    1.897628] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x103C:0x807E 0xC4).
> > > [    1.898256] [drm] register mmio base: 0xD0C00000
> > > [    1.898422] [drm] register mmio size: 262144
> > > [    1.898583] [drm] add ip block number 0 <vi_common>
> > > [    1.898759] [drm] add ip block number 1 <gmc_v8_0>
> > > [    1.898931] [drm] add ip block number 2 <cz_ih>
> > > [    1.899082] [drm] add ip block number 3 <gfx_v8_0>
> > > [    1.899241] [drm] add ip block number 4 <sdma_v3_0>
> > > [    1.899439] [drm] add ip block number 5 <powerplay>
> > > [    1.899573] [drm] add ip block number 6 <dm>
> > > [    1.899693] [drm] add ip block number 7 <uvd_v6_0>
> > > [    1.899827] [drm] add ip block number 8 <vce_v3_0>
> > > [    1.911458] [drm] BIOS signature incorrect 5b 7
> > > [    1.912551] [drm] UVD is enabled in physical mode
> > > [    1.912707] [drm] VCE enabled in physical mode
> > > [    1.912921] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
> > > [    1.913837] [drm] Detected VRAM RAM=512M, BAR=512M
> > > [    1.913998] [drm] RAM width 128bits UNKNOWN
> > > [    1.915149] [drm] amdgpu: 512M of VRAM memory ready
> > > [    1.915306] [drm] amdgpu: 3072M of GTT memory ready.
> > > [    1.915468] [drm] GART: num cpu pages 262144, num gpu pages 262144
> > > [    1.916139] [drm] PCIE GART of 1024M enabled (table at 0x000000F400900000).
> > > [    1.918733] [drm] Found UVD firmware Version: 1.91 Family ID: 11
> > > [    1.918950] [drm] UVD ENC is disabled
> > > [    1.919680] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
> > > [    1.925963] [drm] DM_PPLIB: values for Engine clock
> > > [    1.926106] [drm] DM_PPLIB:   300000
> > > [    1.926205] [drm] DM_PPLIB:   360000
> > > [    1.926304] [drm] DM_PPLIB:   423530
> > > [    1.926404] [drm] DM_PPLIB:   514290
> > > [    1.926516] [drm] DM_PPLIB:   626090
> > > [    1.926629] [drm] DM_PPLIB:   720000
> > > [    1.926743] [drm] DM_PPLIB: Validation clocks:
> > > [    1.926952] [drm] DM_PPLIB:    engine_max_clock: 72000
> > > [    1.927117] [drm] DM_PPLIB:    memory_max_clock: 80000
> > > [    1.927281] [drm] DM_PPLIB:    level           : 8
> > > [    1.927435] [drm] DM_PPLIB: values for Display clock
> > > [    1.927594] [drm] DM_PPLIB:   300000
> > > [    1.927708] [drm] DM_PPLIB:   400000
> > > [    1.927822] [drm] DM_PPLIB:   496560
> > > [    1.927936] [drm] DM_PPLIB:   626090
> > > [    1.928048] [drm] DM_PPLIB:   685720
> > > [    1.928161] [drm] DM_PPLIB:   757900
> > > [    1.928275] [drm] DM_PPLIB: Validation clocks:
> > > [    1.928419] [drm] DM_PPLIB:    engine_max_clock: 72000
> > > [    1.928584] [drm] DM_PPLIB:    memory_max_clock: 80000
> > > [    1.928748] [drm] DM_PPLIB:    level           : 8
> > > [    1.928901] [drm] DM_PPLIB: values for Memory clock
> > > [    1.929058] [drm] DM_PPLIB:   333000
> > > [    1.929172] [drm] DM_PPLIB:   800000
> > > [    1.929403] [drm] DM_PPLIB: Validation clocks:
> > > [    1.929549] [drm] DM_PPLIB:    engine_max_clock: 72000
> > > [    1.929716] [drm] DM_PPLIB:    memory_max_clock: 80000
> > > [    1.929919] [drm] DM_PPLIB:    level           : 8
> > > [    1.930148] [drm] Display Core initialized with v3.2.104!
> > > [    2.003938] [drm] UVD initialized successfully.
> > > [    2.204023] [drm] VCE initialized successfully.
> > > [    2.206228] [drm] fb mappable at 0xA0EE4000
> > > [    2.206375] [drm] vram apper at 0xA0000000
> > > [    2.206514] [drm] size 14745600
> > > [    2.206654] [drm] fb depth is 24
> > > [    2.206760] [drm]    pitch is 10240
> > > [    2.207123] fbcon: amdgpudrmfb (fb0) is primary device
> > > [    2.301263] amdgpu 0000:00:01.0: [drm] fb0: amdgpudrmfb frame buffer device
> > > [    2.320735] [drm] Initialized amdgpu 3.40.0 20150101 for 0000:00:01.0 on minor 0
> > >
> > >
> > > --
> > > Regards/Gruss,
> > >     Boris.
> > >
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C36709b101b6e4c353e7e08d8a07a1d89%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435793657547591%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Cpb2l3OjKBeFwx%2FHIf%2F0d%2BSFiJL46p7Bct3JAIThSZ8%3D&amp;reserved=0
> > > _______________________________________________
> > > amd-gfx mailing list
> > > amd-gfx@lists.freedesktop.org
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C36709b101b6e4c353e7e08d8a07a1d89%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435793657547591%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=XdoPAac6FCjulOvtOsdzO4rh5Qd9wwNIi%2B%2F5lvkaUoI%3D&amp;reserved=0
>
> --
> Rodrigo Siqueira
> https://siqueira.tech

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Borislav Petkov]

On Tue, Dec 15, 2020 at 10:47:03AM -0500, Rodrigo Siqueira wrote:
> Hi Boris,
> 
> Could you check if your branch has this commit:
> 
>  drm/amd/display: Fix module load hangs when connected to an eDP
> 
> If so, could you try this patch:
> 
>  https://patchwork.freedesktop.org/series/84965/

So I did a bisection between

git bisect start
# bad: [3650b228f83adda7e5ee532e2b90429c03f7b9ec] Linux 5.10-rc1
git bisect bad 3650b228f83adda7e5ee532e2b90429c03f7b9ec
# good: [bbf5c979011a099af5dc76498918ed7df445635b] Linux 5.9

and the patch in $Subject came in in 5.10-rc1.

I can test any tree you want me to so just tell me on which tree to
apply this patch and I'll run it.

In any case, it doesn't apply on v5.10 though:

$ test-apply.sh /tmp/rodrigo.siqueira 
checking file drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
Hunk #1 FAILED at 120

You can push a tree of yours somewhere which I can try directly,
alternatively.

Lemme know.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Rodrigo Siqueira]

[-- Attachment #1: Type: text/plain, Size: 2196 bytes --]

Hi,

Could you try on Alex's repo?

 git://people.freedesktop.org/~agd5f/linux
 branch: amd-staging-drm-next

My patch should apply without any issue on top of this branch.

Thanks

On 12/15, Borislav Petkov wrote:
> On Tue, Dec 15, 2020 at 10:47:03AM -0500, Rodrigo Siqueira wrote:
> > Hi Boris,
> > 
> > Could you check if your branch has this commit:
> > 
> >  drm/amd/display: Fix module load hangs when connected to an eDP
> > 
> > If so, could you try this patch:
> > 
> >  https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F84965%2F&data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C1f7ff595746543f597a708d8a111fbdd%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436445910587407%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=PESE3uBZeNjdWtIFRP6l07AyfhASpXCfaZa03l%2FFi6s%3D&reserved=0
> 
> So I did a bisection between
> 
> git bisect start
> # bad: [3650b228f83adda7e5ee532e2b90429c03f7b9ec] Linux 5.10-rc1
> git bisect bad 3650b228f83adda7e5ee532e2b90429c03f7b9ec
> # good: [bbf5c979011a099af5dc76498918ed7df445635b] Linux 5.9
> 
> and the patch in $Subject came in in 5.10-rc1.
> 
> I can test any tree you want me to so just tell me on which tree to
> apply this patch and I'll run it.
> 
> In any case, it doesn't apply on v5.10 though:
> 
> $ test-apply.sh /tmp/rodrigo.siqueira 
> checking file drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
> Hunk #1 FAILED at 120
> 
> You can push a tree of yours somewhere which I can try directly,
> alternatively.
> 
> Lemme know.
> 
> Thx.
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C1f7ff595746543f597a708d8a111fbdd%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436445910587407%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=kiGm0%2B2d2nXiEwUs0omOYv3ZtyfwTtoD9OhrT59Dv5c%3D&reserved=0

-- 
Rodrigo Siqueira
https://siqueira.tech

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Alex Deucher]

On Tue, Dec 15, 2020 at 11:07 AM Rodrigo Siqueira
<Rodrigo.Siqueira@amd.com> wrote:
>
> Hi,
>
> Could you try on Alex's repo?
>
>  git://people.freedesktop.org/~agd5f/linux
>  branch: amd-staging-drm-next
>
> My patch should apply without any issue on top of this branch.

Can you help me identify what patches we need to backport to 5.10?
Depending on the patches, it might be easier to just revert this for
5.10 and apply the proper fix for 5.11.

Alex


>
> Thanks
>
> On 12/15, Borislav Petkov wrote:
> > On Tue, Dec 15, 2020 at 10:47:03AM -0500, Rodrigo Siqueira wrote:
> > > Hi Boris,
> > >
> > > Could you check if your branch has this commit:
> > >
> > >  drm/amd/display: Fix module load hangs when connected to an eDP
> > >
> > > If so, could you try this patch:
> > >
> > >  https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F84965%2F&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C1f7ff595746543f597a708d8a111fbdd%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436445910587407%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=PESE3uBZeNjdWtIFRP6l07AyfhASpXCfaZa03l%2FFi6s%3D&amp;reserved=0
> >
> > So I did a bisection between
> >
> > git bisect start
> > # bad: [3650b228f83adda7e5ee532e2b90429c03f7b9ec] Linux 5.10-rc1
> > git bisect bad 3650b228f83adda7e5ee532e2b90429c03f7b9ec
> > # good: [bbf5c979011a099af5dc76498918ed7df445635b] Linux 5.9
> >
> > and the patch in $Subject came in in 5.10-rc1.
> >
> > I can test any tree you want me to so just tell me on which tree to
> > apply this patch and I'll run it.
> >
> > In any case, it doesn't apply on v5.10 though:
> >
> > $ test-apply.sh /tmp/rodrigo.siqueira
> > checking file drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
> > Hunk #1 FAILED at 120
> >
> > You can push a tree of yours somewhere which I can try directly,
> > alternatively.
> >
> > Lemme know.
> >
> > Thx.
> >
> > --
> > Regards/Gruss,
> >     Boris.
> >
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C1f7ff595746543f597a708d8a111fbdd%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436445910587407%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=kiGm0%2B2d2nXiEwUs0omOYv3ZtyfwTtoD9OhrT59Dv5c%3D&amp;reserved=0
>
> --
> Rodrigo Siqueira
> https://siqueira.tech
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Rodrigo Siqueira]

[-- Attachment #1: Type: text/plain, Size: 4117 bytes --]

On 12/15, Alex Deucher wrote:
> On Tue, Dec 15, 2020 at 11:07 AM Rodrigo Siqueira
> <Rodrigo.Siqueira@amd.com> wrote:
> >
> > Hi,
> >
> > Could you try on Alex's repo?
> >
> >  git://people.freedesktop.org/~agd5f/linux
> >  branch: amd-staging-drm-next
> >
> > My patch should apply without any issue on top of this branch.
> 
> Can you help me identify what patches we need to backport to 5.10?

If we have this patch in 5.10:

 drm/amd/display: disable stream if pixel clock changed with link active

We need to backport:

 1. drm/amd/display: Fix module load hangs when connected to an eDP (for
DCN)
 2. drm/amd/display: Add get_dig_frontend implementation for DCEx (for
DCEx - we still need Boris feedback)


> Depending on the patches, it might be easier to just revert this for
> 5.10 and apply the proper fix for 5.11.

I like this approach; we can apply the proper fix on 5.11.

Thanks
 
> Alex
> 
> 
> >
> > Thanks
> >
> > On 12/15, Borislav Petkov wrote:
> > > On Tue, Dec 15, 2020 at 10:47:03AM -0500, Rodrigo Siqueira wrote:
> > > > Hi Boris,
> > > >
> > > > Could you check if your branch has this commit:
> > > >
> > > >  drm/amd/display: Fix module load hangs when connected to an eDP
> > > >
> > > > If so, could you try this patch:
> > > >
> > > >  https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F84965%2F&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=mcdJ1E3tJc%2FK%2Bnf2phU2CFDQ2wp5zrMcRbxdLxQdo3I%3D&amp;reserved=0
> > >
> > > So I did a bisection between
> > >
> > > git bisect start
> > > # bad: [3650b228f83adda7e5ee532e2b90429c03f7b9ec] Linux 5.10-rc1
> > > git bisect bad 3650b228f83adda7e5ee532e2b90429c03f7b9ec
> > > # good: [bbf5c979011a099af5dc76498918ed7df445635b] Linux 5.9
> > >
> > > and the patch in $Subject came in in 5.10-rc1.
> > >
> > > I can test any tree you want me to so just tell me on which tree to
> > > apply this patch and I'll run it.
> > >
> > > In any case, it doesn't apply on v5.10 though:
> > >
> > > $ test-apply.sh /tmp/rodrigo.siqueira
> > > checking file drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
> > > Hunk #1 FAILED at 120
> > >
> > > You can push a tree of yours somewhere which I can try directly,
> > > alternatively.
> > >
> > > Lemme know.
> > >
> > > Thx.
> > >
> > > --
> > > Regards/Gruss,
> > >     Boris.
> > >
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=bHJQuQqFRTA2SU6Va9gt4lvnogZUeYRujeQj4fIXBsE%3D&amp;reserved=0
> >
> > --
> > Rodrigo Siqueira
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsiqueira.tech%2F&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=bZvusCFfCrWSitpFa%2BmWyg%2BAbJ04ybnlUMQiEB3m5OY%3D&amp;reserved=0
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421083297%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=3K1EuoePhkVVVT7JvPUeKuJW5RIGiHC9LNoqI9ZiTHc%3D&amp;reserved=0

-- 
Rodrigo Siqueira
https://siqueira.tech

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Alex Deucher]

[-- Attachment #1: Type: text/plain, Size: 4685 bytes --]

On Tue, Dec 15, 2020 at 11:42 AM Rodrigo Siqueira
<Rodrigo.Siqueira@amd.com> wrote:
>
> On 12/15, Alex Deucher wrote:
> > On Tue, Dec 15, 2020 at 11:07 AM Rodrigo Siqueira
> > <Rodrigo.Siqueira@amd.com> wrote:
> > >
> > > Hi,
> > >
> > > Could you try on Alex's repo?
> > >
> > >  git://people.freedesktop.org/~agd5f/linux
> > >  branch: amd-staging-drm-next
> > >
> > > My patch should apply without any issue on top of this branch.
> >
> > Can you help me identify what patches we need to backport to 5.10?
>
> If we have this patch in 5.10:
>
>  drm/amd/display: disable stream if pixel clock changed with link active
>
> We need to backport:
>
>  1. drm/amd/display: Fix module load hangs when connected to an eDP (for
> DCN)

That is already present:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v5.10&id=44264591a8c4da7090a4bfd10e04f4cb8fe60afe

>  2. drm/amd/display: Add get_dig_frontend implementation for DCEx (for
> DCEx - we still need Boris feedback)

That patch trivially backports to 5.10.  See attached backported
patch.  @Borislav Petkov does the attached patch fix 5.10 for you?

Alex


>
>
> > Depending on the patches, it might be easier to just revert this for
> > 5.10 and apply the proper fix for 5.11.
>
> I like this approach; we can apply the proper fix on 5.11.
>
> Thanks
>
> > Alex
> >
> >
> > >
> > > Thanks
> > >
> > > On 12/15, Borislav Petkov wrote:
> > > > On Tue, Dec 15, 2020 at 10:47:03AM -0500, Rodrigo Siqueira wrote:
> > > > > Hi Boris,
> > > > >
> > > > > Could you check if your branch has this commit:
> > > > >
> > > > >  drm/amd/display: Fix module load hangs when connected to an eDP
> > > > >
> > > > > If so, could you try this patch:
> > > > >
> > > > >  https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F84965%2F&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=mcdJ1E3tJc%2FK%2Bnf2phU2CFDQ2wp5zrMcRbxdLxQdo3I%3D&amp;reserved=0
> > > >
> > > > So I did a bisection between
> > > >
> > > > git bisect start
> > > > # bad: [3650b228f83adda7e5ee532e2b90429c03f7b9ec] Linux 5.10-rc1
> > > > git bisect bad 3650b228f83adda7e5ee532e2b90429c03f7b9ec
> > > > # good: [bbf5c979011a099af5dc76498918ed7df445635b] Linux 5.9
> > > >
> > > > and the patch in $Subject came in in 5.10-rc1.
> > > >
> > > > I can test any tree you want me to so just tell me on which tree to
> > > > apply this patch and I'll run it.
> > > >
> > > > In any case, it doesn't apply on v5.10 though:
> > > >
> > > > $ test-apply.sh /tmp/rodrigo.siqueira
> > > > checking file drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
> > > > Hunk #1 FAILED at 120
> > > >
> > > > You can push a tree of yours somewhere which I can try directly,
> > > > alternatively.
> > > >
> > > > Lemme know.
> > > >
> > > > Thx.
> > > >
> > > > --
> > > > Regards/Gruss,
> > > >     Boris.
> > > >
> > > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=bHJQuQqFRTA2SU6Va9gt4lvnogZUeYRujeQj4fIXBsE%3D&amp;reserved=0
> > >
> > > --
> > > Rodrigo Siqueira
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsiqueira.tech%2F&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421073301%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=bZvusCFfCrWSitpFa%2BmWyg%2BAbJ04ybnlUMQiEB3m5OY%3D&amp;reserved=0
> > > _______________________________________________
> > > amd-gfx mailing list
> > > amd-gfx@lists.freedesktop.org
> > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C3b8b84a3815d4a3cc67e08d8a1152189%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436459421083297%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=3K1EuoePhkVVVT7JvPUeKuJW5RIGiHC9LNoqI9ZiTHc%3D&amp;reserved=0
>
> --
> Rodrigo Siqueira
> https://siqueira.tech

[-- Attachment #2: 0001-drm-amd-display-Add-get_dig_frontend-implementation-.patch --]
[-- Type: text/x-patch, Size: 3942 bytes --]

From 965421096770bb0d69444950c1f839e8e5504da5 Mon Sep 17 00:00:00 2001
From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Date: Tue, 15 Dec 2020 10:45:05 -0500
Subject: [PATCH] drm/amd/display: Add get_dig_frontend implementation for DCEx

Some old ASICs might not implement/require get_dig_frontend helper; in
this scenario, we can have a NULL pointer exception when we try to call
it inside vbios disable operation. For example, this situation might
happen when using Polaris12 with an eDP panel. This commit avoids this
situation by adding a specific get_dig_frontend implementation for DCEx.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Cc: Chiawen Huang <chiawen.huang@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 .../drm/amd/display/dc/dce/dce_link_encoder.c | 45 ++++++++++++++++++-
 .../drm/amd/display/dc/dce/dce_link_encoder.h |  2 +
 2 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
index b409f6b2bfd8..f355cd1e9090 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -119,7 +119,8 @@ static const struct link_encoder_funcs dce110_lnk_enc_funcs = {
 	.disable_hpd = dce110_link_encoder_disable_hpd,
 	.is_dig_enabled = dce110_is_dig_enabled,
 	.destroy = dce110_link_encoder_destroy,
-	.get_max_link_cap = dce110_link_encoder_get_max_link_cap
+	.get_max_link_cap = dce110_link_encoder_get_max_link_cap,
+	.get_dig_frontend = dce110_get_dig_frontend,
 };
 
 static enum bp_result link_transmitter_control(
@@ -235,6 +236,45 @@ static void set_link_training_complete(
 
 }
 
+unsigned int dce110_get_dig_frontend(struct link_encoder *enc)
+{
+	struct dce110_link_encoder *enc110 = TO_DCE110_LINK_ENC(enc);
+	u32 value;
+	enum engine_id result;
+
+	REG_GET(DIG_BE_CNTL, DIG_FE_SOURCE_SELECT, &value);
+
+	switch (value) {
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGA:
+		result = ENGINE_ID_DIGA;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGB:
+		result = ENGINE_ID_DIGB;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGC:
+		result = ENGINE_ID_DIGC;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGD:
+		result = ENGINE_ID_DIGD;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGE:
+		result = ENGINE_ID_DIGE;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGF:
+		result = ENGINE_ID_DIGF;
+		break;
+	case DCE110_DIG_FE_SOURCE_SELECT_DIGG:
+		result = ENGINE_ID_DIGG;
+		break;
+	default:
+		// invalid source select DIG
+		ASSERT(false);
+		result = ENGINE_ID_UNKNOWN;
+	}
+
+	return result;
+}
+
 void dce110_link_encoder_set_dp_phy_pattern_training_pattern(
 	struct link_encoder *enc,
 	uint32_t index)
@@ -1665,7 +1705,8 @@ static const struct link_encoder_funcs dce60_lnk_enc_funcs = {
 	.disable_hpd = dce110_link_encoder_disable_hpd,
 	.is_dig_enabled = dce110_is_dig_enabled,
 	.destroy = dce110_link_encoder_destroy,
-	.get_max_link_cap = dce110_link_encoder_get_max_link_cap
+	.get_max_link_cap = dce110_link_encoder_get_max_link_cap,
+	.get_dig_frontend = dce110_get_dig_frontend
 };
 
 void dce60_link_encoder_construct(
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
index cb714a48b171..fc6ade824c23 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h
@@ -295,6 +295,8 @@ void dce110_link_encoder_connect_dig_be_to_fe(
 	enum engine_id engine,
 	bool connect);
 
+unsigned int dce110_get_dig_frontend(struct link_encoder *enc);
+
 void dce110_link_encoder_set_dp_phy_pattern_training_pattern(
 	struct link_encoder *enc,
 	uint32_t index);
-- 
2.25.4

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Borislav Petkov]

On Tue, Dec 15, 2020 at 12:04:23PM -0500, Alex Deucher wrote:
> That patch trivially backports to 5.10.  See attached backported
> patch.  @Borislav Petkov does the attached patch fix 5.10 for you?

Yes, thanks.

Reported-and-tested-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Rodrigo Siqueira]

[-- Attachment #1: Type: text/plain, Size: 906 bytes --]

On 12/15, Borislav Petkov wrote:
> On Tue, Dec 15, 2020 at 12:04:23PM -0500, Alex Deucher wrote:
> > That patch trivially backports to 5.10.  See attached backported
> > patch.  @Borislav Petkov does the attached patch fix 5.10 for you?
> 
> Yes, thanks.
> 
> Reported-and-tested-by: Borislav Petkov <bp@suse.de>

Thanks for reporting this issue and test the fix.
 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpeople.kernel.org%2Ftglx%2Fnotes-about-netiquette&amp;data=04%7C01%7CRodrigo.Siqueira%40amd.com%7C08fad887df0d48130c5008d8a12943dc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637436546148511884%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=RSzl0BfkNzJy%2BJwphMSgwX1u9cehN%2FW2fTML3VnfTQY%3D&amp;reserved=0

-- 
Rodrigo Siqueira
https://siqueira.tech

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: 8353d30e747f ("drm/amd/display: disable stream if pixel clock changed with link active")

[Borislav Petkov]

On Tue, Dec 15, 2020 at 02:00:58PM -0500, Rodrigo Siqueira wrote:
> Thanks for reporting this issue and test the fix.

It was my pleasure. Thanks for the quick fix!

:-)

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette