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From: Mark Brown <broonie@kernel.org>
To: Pratyush Yadav <p.yadav@ti.com>
Cc: Sowjanya Komatineni <skomatineni@nvidia.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	robh+dt@kernel.org, lukas@wunner.de, bbrezillon@kernel.org,
	tudor.ambarus@microchip.com, linux-spi@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v4 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit
Date: Fri, 18 Dec 2020 20:44:14 +0000	[thread overview]
Message-ID: <20201218204414.GG5333@sirena.org.uk> (raw)
In-Reply-To: <20201218204102.GF5333@sirena.org.uk>

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On Fri, Dec 18, 2020 at 08:41:02PM +0000, Mark Brown wrote:
> On Sat, Dec 19, 2020 at 12:49:38AM +0530, Pratyush Yadav wrote:

> > Anyway, if the SPI maintainers think this is worth it, I won't object.

> This gets kind of circular, for me it's a question of if there's some
> meaningful benefit from using the feature vs the cost to support it and
> from the sounds of it we don't have numbers on the benefits from using
> it at present.

...although I do have to say looking at the implementation that the cost
seems low, it's just a flag set on an existing transfer.  The only issue
is if we'd get more win from coalesing the entire transaction (or entire
transmit) into a single transfer that could be DMAed and/or requires
fewer trips through the stack which does make it seem like an unclear
tradeoff from the point of view of client drivers

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  reply	other threads:[~2020-12-18 20:45 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-17 20:28 [PATCH v4 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding Sowjanya Komatineni
2020-12-22  0:20   ` Rob Herring
2020-12-17 20:28 ` [PATCH v4 3/9] MAINTAINERS: Add Tegra Quad SPI driver section Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit Sowjanya Komatineni
2020-12-18  9:21   ` Pratyush Yadav
2020-12-18  9:57     ` Boris Brezillon
2020-12-18 18:09       ` Sowjanya Komatineni
2020-12-18 19:19         ` Pratyush Yadav
2020-12-18 20:41           ` Mark Brown
2020-12-18 20:44             ` Mark Brown [this message]
2020-12-18 22:01               ` Sowjanya Komatineni
2020-12-21 16:50                 ` Mark Brown
2020-12-17 20:28 ` [PATCH v4 6/9] spi: tegra210-quad: Add support for hardware dummy cycles transfer Sowjanya Komatineni
2020-12-18 10:20   ` Boris Brezillon
2020-12-17 20:28 ` [PATCH v4 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 8/9] arm64: tegra: Add QSPI nodes on Tegra194 Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni

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