From: Pratyush Yadav <p.yadav@ti.com>
To: Mark Brown <broonie@kernel.org>, Vignesh Raghavendra <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 5/7] spi: cadence-quadspi: Implement a simple supports_op hook
Date: Wed, 23 Dec 2020 00:14:23 +0530 [thread overview]
Message-ID: <20201222184425.7028-6-p.yadav@ti.com> (raw)
In-Reply-To: <20201222184425.7028-1-p.yadav@ti.com>
The default SPI MEM supports_op hook rejects DTR ops by default. Add a
simple supports_op hook that very closely imitates the SPI MEM one. It
will be extended in later commits to allow DTR ops.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/spi/spi-cadence-quadspi.c | 61 +++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 376abef43530..1781d4e94ebd 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1031,6 +1031,66 @@ static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op)
return ret;
}
+static int cqspi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
+{
+ u32 mode = mem->spi->mode;
+
+ switch (buswidth) {
+ case 1:
+ return 0;
+
+ case 2:
+ if ((tx &&
+ (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) ||
+ (!tx &&
+ (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))))
+ return 0;
+
+ break;
+
+ case 4:
+ if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) ||
+ (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL))))
+ return 0;
+
+ break;
+
+ case 8:
+ if ((tx && (mode & SPI_TX_OCTAL)) ||
+ (!tx && (mode & SPI_RX_OCTAL)))
+ return 0;
+
+ break;
+
+ default:
+ break;
+ }
+
+ return -EOPNOTSUPP;
+}
+
+static bool cqspi_supports_mem_op(struct spi_mem *mem,
+ const struct spi_mem_op *op)
+{
+ if (cqspi_check_buswidth_req(mem, op->cmd.buswidth, true))
+ return false;
+
+ if (op->addr.nbytes &&
+ cqspi_check_buswidth_req(mem, op->addr.buswidth, true))
+ return false;
+
+ if (op->dummy.nbytes &&
+ cqspi_check_buswidth_req(mem, op->dummy.buswidth, true))
+ return false;
+
+ if (op->data.nbytes &&
+ cqspi_check_buswidth_req(mem, op->data.buswidth,
+ op->data.dir == SPI_MEM_DATA_OUT))
+ return false;
+
+ return true;
+}
+
static int cqspi_of_get_flash_pdata(struct platform_device *pdev,
struct cqspi_flash_pdata *f_pdata,
struct device_node *np)
@@ -1159,6 +1219,7 @@ static const char *cqspi_get_name(struct spi_mem *mem)
static const struct spi_controller_mem_ops cqspi_mem_ops = {
.exec_op = cqspi_exec_mem_op,
.get_name = cqspi_get_name,
+ .supports_op = cqspi_supports_mem_op,
};
static int cqspi_setup_flash(struct cqspi_st *cqspi)
--
2.28.0
next prev parent reply other threads:[~2020-12-22 18:45 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-22 18:44 [PATCH 0/7] spi: cadence-quadspi: Add Octal DTR support Pratyush Yadav
2020-12-22 18:44 ` [PATCH 1/7] spi: cadence-quadspi: Set master max_speed_hz Pratyush Yadav
2020-12-22 18:44 ` [PATCH 2/7] spi: cadence-quadspi: Abort read if dummy cycles required are too many Pratyush Yadav
2020-12-22 18:44 ` [PATCH 3/7] spi: cadence-quadspi: Set dummy cycles from STIG commands Pratyush Yadav
2020-12-22 18:44 ` [PATCH 4/7] spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1 Pratyush Yadav
2020-12-22 18:44 ` Pratyush Yadav [this message]
2020-12-22 18:44 ` [PATCH 6/7] spi: cadence-quadspi: Wait at least 500 ms for direct reads Pratyush Yadav
2020-12-29 3:29 ` kernel test robot
2020-12-29 9:18 ` Pratyush Yadav
2021-01-05 19:41 ` Nick Desaulniers
2020-12-22 18:44 ` [PATCH 7/7] spi: cadence-quadspi: Add DTR support Pratyush Yadav
2021-01-06 14:59 ` [PATCH 0/7] spi: cadence-quadspi: Add Octal " Mark Brown
2021-01-08 16:48 ` Pratyush Yadav
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