* [PATCH 0/6] v3u: add & update (H)SCIF nodes
@ 2020-12-28 11:27 Wolfram Sang
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
` (5 more replies)
0 siblings, 6 replies; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, devicetree, Geert Uytterhoeven, linux-clk,
linux-kernel, linux-serial
SCIF0 already worked because of firmware settings, but let's have a
proper node for it. Also add HSCIF0 because the last patch shows that it
also works. Because these blocks work in general, let's add the other
instances to the DTSI, too.
These additions make me a bit wonder about the 'reg'-based sorting in
our DTSI files. It looks a bit messy to me, but I kept it for
consistency. Same with the (H)SCIF reg sizes which are a tad too large
but in sync with our other DTSI files.
Looking forward to comments!
All the best,
Wolfram
Linh Phung (1):
arm64: dts: renesas: r8a779a0: Add HSCIF support
Wolfram Sang (5):
arm64: dts: renesas: r8a779a0: add & update SCIF nodes
arm64: dts: renesas: falcon: add SCIF0 nodes
dt-bindings: serial: renesas,hscif: Add r8a779a0 support
clk: renesas: r8a779a0: add HSCIF support
WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0
.../bindings/serial/renesas,hscif.yaml | 1 +
.../boot/dts/renesas/r8a779a0-falcon.dts | 31 ++++-
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 114 ++++++++++++++++++
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 +
4 files changed, 149 insertions(+), 1 deletion(-)
--
2.29.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 18:06 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes Wolfram Sang
` (4 subsequent siblings)
5 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Linh Phung, Geert Uytterhoeven, Magnus Damm,
Rob Herring, devicetree, linux-kernel
This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.
Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 50 +++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 68aaa49c3540..583cf2e232a0 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -656,11 +656,61 @@ scif0: serial@e6e60000 {
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 702>;
status = "disabled";
};
+ scif1: serial@e6e68000 {
+ compatible = "renesas,scif-r8a779a0",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ scif4: serial@e6c40000 {
+ compatible = "renesas,scif-r8a779a0",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 705>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x59>, <&dmac1 0x58>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 705>;
+ status = "disabled";
+ };
+
+ scif3: serial@e6c50000 {
+ compatible = "renesas,scif-r8a779a0",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x57>, <&dmac1 0x56>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 704>;
+ status = "disabled";
+ };
+
dmac1: dma-controller@e7350000 {
reg = <0 0xe7350000 0 0x1000>;
#dma-cells = <1>;
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 18:12 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
` (3 subsequent siblings)
5 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
devicetree, linux-kernel
SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
.../boot/dts/renesas/r8a779a0-falcon.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index 0c44466d398f..54763c73dc74 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -205,6 +205,9 @@ &mmc0 {
};
&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
@@ -348,9 +351,31 @@ mmc_pins: mmc {
function = "mmc";
power-source = <1800>;
};
+
+ scif0_pins: scif0 {
+ groups = "scif0_data", "scif0_ctrl";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk";
+ function = "scif_clk";
+ };
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <24000000>;
+};
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
2020-12-28 11:27 ` [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 18:19 ` Geert Uytterhoeven
` (2 more replies)
2020-12-28 11:27 ` [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support Wolfram Sang
` (2 subsequent siblings)
5 siblings, 3 replies; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Greg Kroah-Hartman, Rob Herring,
Geert Uytterhoeven, linux-serial, devicetree, linux-kernel
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
index c139c5edb93e..512a84942f78 100644
--- a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
+++ b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
@@ -51,6 +51,7 @@ properties:
- renesas,hscif-r8a77980 # R-Car V3H
- renesas,hscif-r8a77990 # R-Car E3
- renesas,hscif-r8a77995 # R-Car D3
+ - renesas,hscif-r8a779a0 # R-Car V3U
- const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
- const: renesas,hscif # generic HSCIF compatible UART
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
` (2 preceding siblings ...)
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 18:23 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add " Wolfram Sang
2020-12-28 11:27 ` [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Wolfram Sang
5 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Michael Turquette,
Stephen Boyd, linux-clk, linux-kernel
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index d85c31a465e1..f518c9e12a49 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -166,6 +166,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("csi41", 400, R8A779A0_CLK_CSI0),
DEF_MOD("csi42", 401, R8A779A0_CLK_CSI0),
DEF_MOD("csi43", 402, R8A779A0_CLK_CSI0),
+ DEF_MOD("hscif0", 514, R8A779A0_CLK_S1D2),
+ DEF_MOD("hscif1", 515, R8A779A0_CLK_S1D2),
+ DEF_MOD("hscif2", 516, R8A779A0_CLK_S1D2),
+ DEF_MOD("hscif3", 517, R8A779A0_CLK_S1D2),
DEF_MOD("i2c0", 518, R8A779A0_CLK_S3D2),
DEF_MOD("i2c1", 519, R8A779A0_CLK_S3D2),
DEF_MOD("i2c2", 520, R8A779A0_CLK_S3D2),
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add HSCIF support
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
` (3 preceding siblings ...)
2020-12-28 11:27 ` [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 18:22 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Wolfram Sang
5 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Linh Phung, Wolfram Sang, Geert Uytterhoeven, Magnus Damm,
Rob Herring, devicetree, linux-kernel
From: Linh Phung <linh.phung.jy@renesas.com>
Define the generic parts of the HSCIF[0-3] device nodes.
Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
[wsa: double checked & rebased]
Signed-off-by: Wolfram Sang <wsa@kernel.org>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 64 +++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 583cf2e232a0..4741d167b707 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -313,6 +313,70 @@ i2c2: i2c@e6510000 {
status = "disabled";
};
+ hscif0: serial@e6540000 {
+ compatible = "renesas,hscif-r8a779a0",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe6540000 0 0x60>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 514>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 514>;
+ status = "disabled";
+ };
+
+ hscif1: serial@e6550000 {
+ compatible = "renesas,hscif-r8a779a0",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe6550000 0 0x60>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 515>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 515>;
+ status = "disabled";
+ };
+
+ hscif2: serial@e6560000 {
+ compatible = "renesas,hscif-r8a779a0",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe6560000 0 0x60>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 516>;
+ status = "disabled";
+ };
+
+ hscif3: serial@e66a0000 {
+ compatible = "renesas,hscif-r8a779a0",
+ "renesas,rcar-gen3-hscif", "renesas,hscif";
+ reg = <0 0xe66a0000 0 0x60>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x37>, <&dmac1 0x36>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 517>;
+ status = "disabled";
+ };
+
i2c3: i2c@e66d0000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
` (4 preceding siblings ...)
2020-12-28 11:27 ` [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add " Wolfram Sang
@ 2020-12-28 11:27 ` Wolfram Sang
2021-01-05 16:24 ` Geert Uytterhoeven
5 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2020-12-28 11:27 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
devicetree, linux-kernel
Mainly for testing the HSCIF0 node. We could make this switch permanent,
but we never did for any other SoC. So, I think this is not to be
applied.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
index 54763c73dc74..e2bbaa7a72e3 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
@@ -14,7 +14,7 @@ / {
compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
aliases {
- serial0 = &scif0;
+ serial0 = &hscif0;
};
chosen {
@@ -352,9 +352,9 @@ mmc_pins: mmc {
power-source = <1800>;
};
- scif0_pins: scif0 {
- groups = "scif0_data", "scif0_ctrl";
- function = "scif0";
+ hscif0_pins: hscif0 {
+ groups = "hscif0_data", "hscif0_ctrl";
+ function = "hscif0";
};
scif_clk_pins: scif_clk {
@@ -369,7 +369,11 @@ &rwdt {
};
&scif0 {
- pinctrl-0 = <&scif0_pins>;
+ status = "disabled";
+};
+
+&hscif0 {
+ pinctrl-0 = <&hscif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0
2020-12-28 11:27 ` [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Wolfram Sang
@ 2021-01-05 16:24 ` Geert Uytterhoeven
0 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 16:24 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Magnus Damm, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Mon, Dec 28, 2020 at 12:28 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Mainly for testing the HSCIF0 node. We could make this switch permanent,
> but we never did for any other SoC. So, I think this is not to be
> applied.
The choice of serial console has to match the bootloader.
That's why we didn't do it for other SoCs where the serial console can be
muxed to different serial instances.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
> @@ -14,7 +14,7 @@ / {
> compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
>
> aliases {
> - serial0 = &scif0;
> + serial0 = &hscif0;
> };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
@ 2021-01-05 18:06 ` Geert Uytterhoeven
2021-01-14 20:57 ` Wolfram Sang
0 siblings, 1 reply; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 18:06 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Linh Phung, Magnus Damm, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
Missing "From: Linh Phung <linh.phung.jy@renesas.com>"?
> This is the result of multiple patches taken from the BSP, combined,
> rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
> entirely new.
>
> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -656,11 +656,61 @@ scif0: serial@e6e60000 {
> <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> <&scif_clk>;
> clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x51>, <&dmac1 0x50>;
> + dma-names = "tx", "rx";
It may be prudent to leave out the DMA properties until we can
validate DMA operation.
> power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> resets = <&cpg 702>;
> status = "disabled";
> };
>
> + scif1: serial@e6e68000 {
> + compatible = "renesas,scif-r8a779a0",
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6e68000 0 64>;
> + interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 703>,
> + <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x53>, <&dmac1 0x52>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 703>;
> + status = "disabled";
> + };
> +
> + scif4: serial@e6c40000 {
> + compatible = "renesas,scif-r8a779a0",
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6c40000 0 64>;
> + interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 705>,
> + <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x59>, <&dmac1 0x58>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 705>;
> + status = "disabled";
> + };
> +
> + scif3: serial@e6c50000 {
Please move scif3 before scif4.
> + compatible = "renesas,scif-r8a779a0",
> + "renesas,rcar-gen3-scif", "renesas,scif";
> + reg = <0 0xe6c50000 0 64>;
> + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 704>,
> + <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x57>, <&dmac1 0x56>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 704>;
> + status = "disabled";
> + };
> +
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes
2020-12-28 11:27 ` [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes Wolfram Sang
@ 2021-01-05 18:12 ` Geert Uytterhoeven
2021-01-12 11:42 ` Geert Uytterhoeven
0 siblings, 1 reply; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 18:12 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Magnus Damm, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> SCIF0 has been enabled by the firmware, so it worked already. Still, add
> the proper nodes to make it work in any case.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
@ 2021-01-05 18:19 ` Geert Uytterhoeven
2021-01-08 3:41 ` Rob Herring
2021-01-19 22:16 ` Wolfram Sang
2 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 18:19 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Greg Kroah-Hartman, Rob Herring,
open list:SERIAL DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add HSCIF support
2020-12-28 11:27 ` [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add " Wolfram Sang
@ 2021-01-05 18:22 ` Geert Uytterhoeven
0 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 18:22 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Linh Phung, Wolfram Sang, Magnus Damm,
Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Linh Phung <linh.phung.jy@renesas.com>
>
> Define the generic parts of the HSCIF[0-3] device nodes.
>
> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
> [wsa: double checked & rebased]
> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -313,6 +313,70 @@ i2c2: i2c@e6510000 {
> status = "disabled";
> };
>
> + hscif0: serial@e6540000 {
> + compatible = "renesas,hscif-r8a779a0",
> + "renesas,rcar-gen3-hscif", "renesas,hscif";
> + reg = <0 0xe6540000 0 0x60>;
> + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 514>,
> + <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x31>, <&dmac1 0x30>;
> + dma-names = "tx", "rx";
It may be prudent to omit the DMA properties, until we can test DMA
operation.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support
2020-12-28 11:27 ` [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support Wolfram Sang
@ 2021-01-05 18:23 ` Geert Uytterhoeven
0 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-05 18:23 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Michael Turquette, Stephen Boyd, linux-clk,
Linux Kernel Mailing List
On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.12.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
2021-01-05 18:19 ` Geert Uytterhoeven
@ 2021-01-08 3:41 ` Rob Herring
2021-01-19 22:16 ` Wolfram Sang
2 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-01-08 3:41 UTC (permalink / raw)
To: Wolfram Sang
Cc: Rob Herring, devicetree, linux-kernel, Greg Kroah-Hartman,
linux-renesas-soc, linux-serial, Geert Uytterhoeven
On Mon, 28 Dec 2020 12:27:10 +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
> Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes
2021-01-05 18:12 ` Geert Uytterhoeven
@ 2021-01-12 11:42 ` Geert Uytterhoeven
0 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-12 11:42 UTC (permalink / raw)
To: Wolfram Sang
Cc: Linux-Renesas, Magnus Damm, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Tue, Jan 5, 2021 at 7:12 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
> <wsa+renesas@sang-engineering.com> wrote:
> > SCIF0 has been enabled by the firmware, so it worked already. Still, add
> > the proper nodes to make it work in any case.
> >
> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Upon second look, this should be added to r8a779a0-falcon-cpu.dtsi,
which already extends the scif0 node.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes
2021-01-05 18:06 ` Geert Uytterhoeven
@ 2021-01-14 20:57 ` Wolfram Sang
2021-01-15 8:00 ` Geert Uytterhoeven
0 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2021-01-14 20:57 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Linux-Renesas, Linh Phung, Magnus Damm, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
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> > + scif3: serial@e6c50000 {
>
> Please move scif3 before scif4.
I thought we are sorting by reg value?
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes
2021-01-14 20:57 ` Wolfram Sang
@ 2021-01-15 8:00 ` Geert Uytterhoeven
0 siblings, 0 replies; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-15 8:00 UTC (permalink / raw)
To: Wolfram Sang, Linux-Renesas, Linh Phung, Magnus Damm,
Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Wolfram,
On Thu, Jan 14, 2021 at 9:57 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > > + scif3: serial@e6c50000 {
> >
> > Please move scif3 before scif4.
>
> I thought we are sorting by reg value?
Yeah, but we group nodes of the same type, and sort them by
label within the group.
We really need a script to take care of the sorting...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
2021-01-05 18:19 ` Geert Uytterhoeven
2021-01-08 3:41 ` Rob Herring
@ 2021-01-19 22:16 ` Wolfram Sang
2021-01-20 8:00 ` Greg Kroah-Hartman
2 siblings, 1 reply; 21+ messages in thread
From: Wolfram Sang @ 2021-01-19 22:16 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Greg Kroah-Hartman, Rob Herring, Geert Uytterhoeven,
linux-serial, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1096 bytes --]
On Mon, Dec 28, 2020 at 12:27:10PM +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
Can we apply this via the serial tree? Or shall we take it via
renesas-soc? Thanks!
> Documentation/devicetree/bindings/serial/renesas,hscif.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
> index c139c5edb93e..512a84942f78 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml
> @@ -51,6 +51,7 @@ properties:
> - renesas,hscif-r8a77980 # R-Car V3H
> - renesas,hscif-r8a77990 # R-Car E3
> - renesas,hscif-r8a77995 # R-Car D3
> + - renesas,hscif-r8a779a0 # R-Car V3U
> - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
> - const: renesas,hscif # generic HSCIF compatible UART
>
> --
> 2.29.2
>
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2021-01-19 22:16 ` Wolfram Sang
@ 2021-01-20 8:00 ` Greg Kroah-Hartman
2021-01-20 8:02 ` Geert Uytterhoeven
0 siblings, 1 reply; 21+ messages in thread
From: Greg Kroah-Hartman @ 2021-01-20 8:00 UTC (permalink / raw)
To: Wolfram Sang, linux-renesas-soc, Rob Herring, Geert Uytterhoeven,
linux-serial, devicetree, linux-kernel
On Tue, Jan 19, 2021 at 11:16:24PM +0100, Wolfram Sang wrote:
> On Mon, Dec 28, 2020 at 12:27:10PM +0100, Wolfram Sang wrote:
> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > ---
>
> Can we apply this via the serial tree? Or shall we take it via
> renesas-soc? Thanks!
I can take it, but normally I try to wait for a DT maintainer ack.
If you want to take it, feel free to as well.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2021-01-20 8:00 ` Greg Kroah-Hartman
@ 2021-01-20 8:02 ` Geert Uytterhoeven
2021-01-20 17:47 ` Greg Kroah-Hartman
0 siblings, 1 reply; 21+ messages in thread
From: Geert Uytterhoeven @ 2021-01-20 8:02 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Wolfram Sang, Linux-Renesas, Rob Herring, Geert Uytterhoeven,
open list:SERIAL DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
Hi Greg,
On Wed, Jan 20, 2021 at 9:00 AM Greg Kroah-Hartman
<gregkh@linuxfoundation.org> wrote:
> On Tue, Jan 19, 2021 at 11:16:24PM +0100, Wolfram Sang wrote:
> > On Mon, Dec 28, 2020 at 12:27:10PM +0100, Wolfram Sang wrote:
> > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > > ---
> >
> > Can we apply this via the serial tree? Or shall we take it via
> > renesas-soc? Thanks!
>
> I can take it, but normally I try to wait for a DT maintainer ack.
>
> If you want to take it, feel free to as well.
Acked on Jan 8:
https://lore.kernel.org/linux-devicetree/20210108034114.GA1845830@robh.at.kernel.org/
Thanks for applying!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support
2021-01-20 8:02 ` Geert Uytterhoeven
@ 2021-01-20 17:47 ` Greg Kroah-Hartman
0 siblings, 0 replies; 21+ messages in thread
From: Greg Kroah-Hartman @ 2021-01-20 17:47 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Wolfram Sang, Linux-Renesas, Rob Herring, Geert Uytterhoeven,
open list:SERIAL DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List
On Wed, Jan 20, 2021 at 09:02:58AM +0100, Geert Uytterhoeven wrote:
> Hi Greg,
>
> On Wed, Jan 20, 2021 at 9:00 AM Greg Kroah-Hartman
> <gregkh@linuxfoundation.org> wrote:
> > On Tue, Jan 19, 2021 at 11:16:24PM +0100, Wolfram Sang wrote:
> > > On Mon, Dec 28, 2020 at 12:27:10PM +0100, Wolfram Sang wrote:
> > > > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > > > ---
> > >
> > > Can we apply this via the serial tree? Or shall we take it via
> > > renesas-soc? Thanks!
> >
> > I can take it, but normally I try to wait for a DT maintainer ack.
> >
> > If you want to take it, feel free to as well.
>
> Acked on Jan 8:
> https://lore.kernel.org/linux-devicetree/20210108034114.GA1845830@robh.at.kernel.org/
>
> Thanks for applying!
Ah, missed that, sorry, now queued up.
greg k-h
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2021-01-20 17:50 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
2021-01-05 18:06 ` Geert Uytterhoeven
2021-01-14 20:57 ` Wolfram Sang
2021-01-15 8:00 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes Wolfram Sang
2021-01-05 18:12 ` Geert Uytterhoeven
2021-01-12 11:42 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
2021-01-05 18:19 ` Geert Uytterhoeven
2021-01-08 3:41 ` Rob Herring
2021-01-19 22:16 ` Wolfram Sang
2021-01-20 8:00 ` Greg Kroah-Hartman
2021-01-20 8:02 ` Geert Uytterhoeven
2021-01-20 17:47 ` Greg Kroah-Hartman
2020-12-28 11:27 ` [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support Wolfram Sang
2021-01-05 18:23 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add " Wolfram Sang
2021-01-05 18:22 ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Wolfram Sang
2021-01-05 16:24 ` Geert Uytterhoeven
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