From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_RED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69DEAC4332E for ; Mon, 28 Dec 2020 14:29:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4DDED207B2 for ; Mon, 28 Dec 2020 14:29:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2503510AbgL1O3R (ORCPT ); Mon, 28 Dec 2020 09:29:17 -0500 Received: from mail.kernel.org ([198.145.29.99]:36226 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2503385AbgL1O3I (ORCPT ); Mon, 28 Dec 2020 09:29:08 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id B6F3B21D94; Mon, 28 Dec 2020 14:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1609165733; bh=XWfkJ90ZUZMKKxIK35F7z9Ojg58b3v77qPv/u26X71s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dr4cTRT8fN6tKbjk5AUnTf113vuRdXrxwhaTrJiSAiXFDtn2U3RcoMwoXa6b8ITDU uNw693ZyhgnubsdH2boISuAZ7DicGtGmBhNh2BHmqKjhtJNa8q3Nqz3DXUSmLSsWB9 W61Pt1ay4Fr2Ot7uBi/hfsWF3pTr/Gu7j2/VVmo8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Bas Nieuwenhuizen , Alex Deucher , Nicholas Kazlauskas Subject: [PATCH 5.10 635/717] drm/amd/display: Honor the offset for plane 0. Date: Mon, 28 Dec 2020 13:50:33 +0100 Message-Id: <20201228125051.345050198@linuxfoundation.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201228125020.963311703@linuxfoundation.org> References: <20201228125020.963311703@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bas Nieuwenhuizen commit be7b9b327e79cd2db07b659af599867b629b2f66 upstream. With modifiers I'd like to support non-dedicated buffers for images. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Alex Deucher Reviewed-by: Nicholas Kazlauskas Cc: stable@vger.kernel.org # 5.1.0 Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3746,6 +3746,7 @@ fill_plane_dcc_attributes(struct amdgpu_ struct dc *dc = adev->dm.dc; struct dc_dcc_surface_param input; struct dc_surface_dcc_cap output; + uint64_t plane_address = afb->address + afb->base.offsets[0]; uint32_t offset = AMDGPU_TILING_GET(info, DCC_OFFSET_256B); uint32_t i64b = AMDGPU_TILING_GET(info, DCC_INDEPENDENT_64B) != 0; uint64_t dcc_address; @@ -3789,7 +3790,7 @@ fill_plane_dcc_attributes(struct amdgpu_ AMDGPU_TILING_GET(info, DCC_PITCH_MAX) + 1; dcc->independent_64b_blks = i64b; - dcc_address = get_dcc_address(afb->address, info); + dcc_address = get_dcc_address(plane_address, info); address->grph.meta_addr.low_part = lower_32_bits(dcc_address); address->grph.meta_addr.high_part = upper_32_bits(dcc_address); @@ -3820,6 +3821,8 @@ fill_plane_buffer_attributes(struct amdg address->tmz_surface = tmz_surface; if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) { + uint64_t addr = afb->address + fb->offsets[0]; + plane_size->surface_size.x = 0; plane_size->surface_size.y = 0; plane_size->surface_size.width = fb->width; @@ -3828,9 +3831,10 @@ fill_plane_buffer_attributes(struct amdg fb->pitches[0] / fb->format->cpp[0]; address->type = PLN_ADDR_TYPE_GRAPHICS; - address->grph.addr.low_part = lower_32_bits(afb->address); - address->grph.addr.high_part = upper_32_bits(afb->address); + address->grph.addr.low_part = lower_32_bits(addr); + address->grph.addr.high_part = upper_32_bits(addr); } else if (format < SURFACE_PIXEL_FORMAT_INVALID) { + uint64_t luma_addr = afb->address + fb->offsets[0]; uint64_t chroma_addr = afb->address + fb->offsets[1]; plane_size->surface_size.x = 0; @@ -3851,9 +3855,9 @@ fill_plane_buffer_attributes(struct amdg address->type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE; address->video_progressive.luma_addr.low_part = - lower_32_bits(afb->address); + lower_32_bits(luma_addr); address->video_progressive.luma_addr.high_part = - upper_32_bits(afb->address); + upper_32_bits(luma_addr); address->video_progressive.chroma_addr.low_part = lower_32_bits(chroma_addr); address->video_progressive.chroma_addr.high_part =