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From: Wei Liu <wei.liu@kernel.org>
To: Linux on Hyper-V List <linux-hyperv@vger.kernel.org>
Cc: virtualization@lists.linux-foundation.org,
	Linux Kernel List <linux-kernel@vger.kernel.org>,
	Michael Kelley <mikelley@microsoft.com>,
	Vineeth Pillai <viremana@linux.microsoft.com>,
	Sunil Muthuswamy <sunilmut@microsoft.com>,
	Nuno Das Neves <nunodasneves@linux.microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)),
	"H. Peter Anvin" <hpa@zytor.com>,
	David Woodhouse <dwmw@amazon.co.uk>,
	Joerg Roedel <jroedel@suse.de>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Gustavo A. R. Silva" <gustavoars@kernel.org>,
	Jon Derrick <jonathan.derrick@intel.com>
Subject: [PATCH v4 16/17] x86/ioapic: export a few functions and data structures via io_apic.h
Date: Wed,  6 Jan 2021 20:33:49 +0000	[thread overview]
Message-ID: <20210106203350.14568-17-wei.liu@kernel.org> (raw)
In-Reply-To: <20210106203350.14568-1-wei.liu@kernel.org>

We are about to implement an irqchip for IO-APIC when Linux runs as root
on Microsoft Hypervisor. At the same time we would like to reuse
existing code as much as possible.

Move mp_chip_data to io_apic.h and make a few helper functions
non-static.

No functional change.

Signed-off-by: Wei Liu <wei.liu@kernel.org>
---
 arch/x86/include/asm/io_apic.h | 22 ++++++++++++++++++++++
 arch/x86/kernel/apic/io_apic.c | 25 ++++++++-----------------
 2 files changed, 30 insertions(+), 17 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 437aa8d00e53..8e2b78a0edbd 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -87,6 +87,15 @@ struct IO_APIC_route_entry {
 	};
 } __attribute__ ((packed));
 
+struct mp_chip_data {
+	struct list_head		irq_2_pin;
+	struct IO_APIC_route_entry	entry;
+	bool				is_level;
+	bool				active_low;
+	bool				isa_irq;
+	u32 count;
+};
+
 struct irq_alloc_info;
 struct ioapic_domain_cfg;
 
@@ -174,6 +183,19 @@ extern void clear_IO_APIC(void);
 extern void restore_boot_irq_mode(void);
 extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);
 extern void print_IO_APICs(void);
+
+struct irq_data;
+extern struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin);
+extern void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e);
+extern void mask_ioapic_irq(struct irq_data *irq_data);
+extern void unmask_ioapic_irq(struct irq_data *irq_data);
+extern int ioapic_set_affinity(struct irq_data *irq_data, const struct cpumask *mask, bool force);
+extern struct irq_domain *mp_ioapic_irqdomain(int ioapic);
+enum irqchip_irq_state;
+extern int ioapic_irq_get_chip_state(struct irq_data *irqd,
+				enum irqchip_irq_state which,
+				bool *state);
+
 #else  /* !CONFIG_X86_IO_APIC */
 
 #define IO_APIC_IRQ(x)		0
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index e4ab4804b20d..05cc91d3d607 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -88,15 +88,6 @@ struct irq_pin_list {
 	int apic, pin;
 };
 
-struct mp_chip_data {
-	struct list_head		irq_2_pin;
-	struct IO_APIC_route_entry	entry;
-	bool				is_level;
-	bool				active_low;
-	bool				isa_irq;
-	u32 count;
-};
-
 struct mp_ioapic_gsi {
 	u32 gsi_base;
 	u32 gsi_end;
@@ -154,7 +145,7 @@ static inline bool mp_is_legacy_irq(int irq)
 	return irq >= 0 && irq < nr_legacy_irqs();
 }
 
-static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)
+struct irq_domain *mp_ioapic_irqdomain(int ioapic)
 {
 	return ioapics[ioapic].irqdomain;
 }
@@ -296,7 +287,7 @@ static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin)
 	return entry;
 }
 
-static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
+struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
 {
 	struct IO_APIC_route_entry entry;
 	unsigned long flags;
@@ -320,7 +311,7 @@ static void __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e
 	io_apic_write(apic, 0x10 + 2*pin, e.w1);
 }
 
-static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
+void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 {
 	unsigned long flags;
 
@@ -440,7 +431,7 @@ static void io_apic_sync(struct irq_pin_list *entry)
 	readl(&io_apic->data);
 }
 
-static void mask_ioapic_irq(struct irq_data *irq_data)
+void mask_ioapic_irq(struct irq_data *irq_data)
 {
 	struct mp_chip_data *data = irq_data->chip_data;
 	unsigned long flags;
@@ -455,7 +446,7 @@ static void __unmask_ioapic(struct mp_chip_data *data)
 	io_apic_modify_irq(data, false, NULL);
 }
 
-static void unmask_ioapic_irq(struct irq_data *irq_data)
+void unmask_ioapic_irq(struct irq_data *irq_data)
 {
 	struct mp_chip_data *data = irq_data->chip_data;
 	unsigned long flags;
@@ -1906,8 +1897,8 @@ static void ioapic_configure_entry(struct irq_data *irqd)
 		__ioapic_write_entry(entry->apic, entry->pin, mpd->entry);
 }
 
-static int ioapic_set_affinity(struct irq_data *irq_data,
-			       const struct cpumask *mask, bool force)
+int ioapic_set_affinity(struct irq_data *irq_data,
+		       const struct cpumask *mask, bool force)
 {
 	struct irq_data *parent = irq_data->parent_data;
 	unsigned long flags;
@@ -1936,7 +1927,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data,
  *
  * Verify that the corresponding Remote-IRR bits are clear.
  */
-static int ioapic_irq_get_chip_state(struct irq_data *irqd,
+int ioapic_irq_get_chip_state(struct irq_data *irqd,
 				   enum irqchip_irq_state which,
 				   bool *state)
 {
-- 
2.20.1


  parent reply	other threads:[~2021-01-06 20:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-06 20:33 [PATCH v4 00/17] Introducing Linux root partition support for Microsoft Hypervisor Wei Liu
2021-01-06 20:33 ` [PATCH v4 01/17] asm-generic/hyperv: change HV_CPU_POWER_MANAGEMENT to HV_CPU_MANAGEMENT Wei Liu
2021-01-06 20:33 ` [PATCH v4 02/17] x86/hyperv: detect if Linux is the root partition Wei Liu
2021-01-06 20:33 ` [PATCH v4 03/17] Drivers: hv: vmbus: skip VMBus initialization if Linux is root Wei Liu
2021-01-06 20:33 ` [PATCH v4 04/17] iommu/hyperv: don't setup IRQ remapping when running as root Wei Liu
2021-01-06 20:33 ` [PATCH v4 05/17] clocksource/hyperv: use MSR-based access if " Wei Liu
2021-01-06 20:33 ` [PATCH v4 06/17] x86/hyperv: allocate output arg pages if required Wei Liu
2021-01-06 20:33 ` [PATCH v4 07/17] x86/hyperv: extract partition ID from Microsoft Hypervisor if necessary Wei Liu
2021-01-06 20:33 ` [PATCH v4 08/17] x86/hyperv: handling hypercall page setup for root Wei Liu
2021-01-06 20:33 ` [PATCH v4 09/17] x86/hyperv: provide a bunch of helper functions Wei Liu
2021-01-06 20:33 ` [PATCH v4 10/17] x86/hyperv: implement and use hv_smp_prepare_cpus Wei Liu
2021-01-06 20:33 ` [PATCH v4 11/17] asm-generic/hyperv: update hv_msi_entry Wei Liu
2021-01-06 20:33 ` [PATCH v4 12/17] asm-generic/hyperv: update hv_interrupt_entry Wei Liu
2021-01-06 20:33 ` [PATCH v4 13/17] asm-generic/hyperv: introduce hv_device_id and auxiliary structures Wei Liu
2021-01-06 20:33 ` [PATCH v4 14/17] asm-generic/hyperv: import data structures for mapping device interrupts Wei Liu
2021-01-06 20:33 ` [PATCH v4 15/17] x86/hyperv: implement an MSI domain for root partition Wei Liu
2021-01-06 22:21   ` kernel test robot
2021-01-07 15:05     ` Wei Liu
2021-01-06 20:33 ` Wei Liu [this message]
2021-01-09 16:38   ` [PATCH v4 16/17] x86/ioapic: export a few functions and data structures via io_apic.h Wei Liu
2021-01-06 20:33 ` [PATCH v4 17/17] x86/hyperv: handle IO-APIC when running as root Wei Liu
2021-01-09 16:45   ` Wei Liu

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