From: Chenyi Qiang <chenyi.qiang@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Xiaoyao Li <xiaoyao.li@intel.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [RESEND PATCH 0/2] Add KVM support for bus lock debug exception
Date: Fri, 8 Jan 2021 14:49:22 +0800 [thread overview]
Message-ID: <20210108064924.1677-1-chenyi.qiang@intel.com> (raw)
Hi all,
Any comment on this rebased version? I'd appreciate it if anyone has
time to review this short series.
---
A bus lock is acquired either through split locked access to writeback
(WB) memory or by using locks to uncacheable (UC) memory. This is
typically > 1000 cycles slower than atomic opertaion within a cache
line. It also disrupts performance on other cores.
Bus lock debug exception is a sub-feature of bus lock detection. It is
an ability to notify the kernel by an #DB trap after the instruction
acquires a bus lock when CPL>0. This allows the kernel to enforce user
application throttling or mitigatioins.
Expose the bus lock debug exception to guest by the enumeration of
CPUID.(EAX=7,ECX=0).ECX[24]. Software in guest can enable these
exceptions by setting the DEBUGCTLMSR_BUS_LOCK_DETECT(bit 2) of
MSR_IA32_DEBUTCTL.
The bus lock #DB exception can also be intercepted by the VMM and
identified through the bit 11 of the exit qualification at VM exit. The
bit 11 (DR6_BUS_LOCK) of DR6 register is introduced to indicate a bus
lock #DB exception. DR6_BUS_LOCK has formerly always been 1 and delivery
of a bus lock #DB clears it. The VMM should emulate the exceptions by
clearing the bit 11 of the guest DR6.
The kernel support patches for bus lock debug exception is available at
https://lore.kernel.org/lkml/20201124205245.4164633-1-fenghua.yu@intel.com/
Document for Bus Lock Detection is now available at the latest "Intel
Architecture Instruction Set Extensions Programming Reference".
Document Link:
https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
---
Changelogs
RFC->v1:
- rebase on top of v5.11-rc1, no difference compared with the last version
- v1:https://lore.kernel.org/lkml/20201119092957.16940-1-chenyi.qiang@intel.com/
Chenyi Qiang (2):
KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit
KVM: X86: Expose bus lock debug exception to guest
arch/x86/include/asm/kvm_host.h | 5 ++--
arch/x86/kvm/cpuid.c | 3 ++-
arch/x86/kvm/emulate.c | 2 +-
arch/x86/kvm/svm/svm.c | 6 ++---
arch/x86/kvm/vmx/nested.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 29 +++++++++++++++++++---
arch/x86/kvm/x86.c | 44 ++++++++++++++-------------------
arch/x86/kvm/x86.h | 2 ++
8 files changed, 56 insertions(+), 37 deletions(-)
--
2.17.1
next reply other threads:[~2021-01-08 6:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 6:49 Chenyi Qiang [this message]
2021-01-08 6:49 ` [RESEND PATCH 1/2] KVM: X86: Add support for the emulation of DR6_BUS_LOCK bit Chenyi Qiang
2021-01-08 16:38 ` kernel test robot
2021-01-26 16:31 ` Paolo Bonzini
2021-01-27 1:48 ` Chenyi Qiang
2021-01-27 3:41 ` Xiaoyao Li
2021-01-27 10:04 ` Paolo Bonzini
2021-01-28 7:17 ` Xiaoyao Li
2021-01-28 7:25 ` Paolo Bonzini
2021-01-28 7:41 ` Xiaoyao Li
2021-01-08 6:49 ` [RESEND PATCH 2/2] KVM: X86: Expose bus lock debug exception to guest Chenyi Qiang
2021-01-08 18:16 ` kernel test robot
2021-01-26 16:33 ` Paolo Bonzini
2021-01-27 0:57 ` Chenyi Qiang
2021-01-27 12:31 ` Paolo Bonzini
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