On Thu, Dec 31, 2020 at 03:29:38PM +0100, Paul Kocialkowski wrote:
> Bits related to the interface data width are only applicable to the
> parallel interface and are irrelevant when the CSI controller is taking
> input from the MIPI CSI-2 controller.
> 
> In prevision of adding support for this case, set these bits
> conditionally so there is no ambiguity. The conditional block is
> moved around before the interlaced conditional block for nicer code
> symmetry (conditional blocks first) while at it.
> 
> Co-developed-by: Kévin L'hôpital <kevin.lhopital@bootlin.com>
> Signed-off-by: Kévin L'hôpital <kevin.lhopital@bootlin.com>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>

Acked-by: Maxime Ripard <mripard@kernel.org>

Thanks!
Maxime