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From: mgross@linux.intel.com
To: markgross@kernel.org, mgross@linux.intel.com, arnd@arndb.de,
	bp@suse.de, damien.lemoal@wdc.com, dragan.cvetic@xilinx.com,
	gregkh@linuxfoundation.org, corbet@lwn.net,
	leonard.crestez@nxp.com, palmerdabbelt@google.com,
	paul.walmsley@sifive.com, peng.fan@nxp.com, robh+dt@kernel.org,
	shawnguo@kernel.org, jassisinghbrar@gmail.com
Cc: linux-kernel@vger.kernel.org, "C,
	Udhayakumar" <udhayakumar.c@intel.com>,
	C@linux.intel.com
Subject: [PATCH v2 30/34] misc:intel_tsens: Intel Keem Bay tsens driver.
Date: Fri,  8 Jan 2021 13:25:56 -0800
Message-ID: <20210108212600.36850-31-mgross@linux.intel.com> (raw)
In-Reply-To: <20210108212600.36850-1-mgross@linux.intel.com>

From: "C, Udhayakumar" <udhayakumar.c@intel.com>

Add keembey_thermal driver to expose on chip temperature
sensors, and register call back functions for periodic sampling.

This driver does following:
* Reads temperature data from on chip sensors present in Keem Bay
  platform.
* Registers callback function to intel tsens driver for sampling
  temperature values periodically.
* Decode the raw values from registers to Celsius.

Acked-by: mark gross <mgross@linux.intel.com>
Signed-off-by: C, Udhayakumar <udhayakumar.c@intel.com>
---
 drivers/misc/intel_tsens/Kconfig           |  12 +
 drivers/misc/intel_tsens/Makefile          |   1 +
 drivers/misc/intel_tsens/keembay_thermal.c | 169 ++++++++++
 drivers/misc/intel_tsens/keembay_tsens.h   | 366 +++++++++++++++++++++
 4 files changed, 548 insertions(+)
 create mode 100644 drivers/misc/intel_tsens/keembay_thermal.c
 create mode 100644 drivers/misc/intel_tsens/keembay_tsens.h

diff --git a/drivers/misc/intel_tsens/Kconfig b/drivers/misc/intel_tsens/Kconfig
index c2138339bd89..bdd87518a1bc 100644
--- a/drivers/misc/intel_tsens/Kconfig
+++ b/drivers/misc/intel_tsens/Kconfig
@@ -28,6 +28,18 @@ config INTEL_TSENS_I2C_SLAVE
 	  management controller
 	  Say Y if using a processor that includes the Intel VPU such as
 	  Keem Bay.  If unsure, say N.
+
+config KEEMBAY_THERMAL
+	tristate "Temperature sensor driver for intel Keem Bay"
+	depends on INTEL_TSENS_LOCAL_HOST && ARCH_KEEMBAY
+	help
+	  Enable this option if you want to have support for Keem Bay
+	  thermal management sensors.
+
+	  This driver is used for reading onchip temperature sensor
+	  values from Keem Bay SoC.
+	  Say Y if using a processor that includes the Intel VPU such as
+	  Keem Bay.  If unsure, say N.
 config INTEL_TSENS_IA_HOST
 	tristate "Temperature sensor driver for intel tsens remote host"
 	depends on I2C && THERMAL
diff --git a/drivers/misc/intel_tsens/Makefile b/drivers/misc/intel_tsens/Makefile
index f6f41bbca80c..00f63c2d5b2f 100644
--- a/drivers/misc/intel_tsens/Makefile
+++ b/drivers/misc/intel_tsens/Makefile
@@ -7,3 +7,4 @@
 obj-$(CONFIG_INTEL_TSENS_LOCAL_HOST)	+= intel_tsens_thermal.o
 obj-$(CONFIG_INTEL_TSENS_I2C_SLAVE)	+= intel_tsens_i2c.o
 obj-$(CONFIG_INTEL_TSENS_IA_HOST)	+= intel_tsens_host.o
+obj-$(CONFIG_KEEMBAY_THERMAL)		+= keembay_thermal.o
diff --git a/drivers/misc/intel_tsens/keembay_thermal.c b/drivers/misc/intel_tsens/keembay_thermal.c
new file mode 100644
index 000000000000..d6c8fa8fc3aa
--- /dev/null
+++ b/drivers/misc/intel_tsens/keembay_thermal.c
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ *
+ * Intel Keem Bay thermal Driver
+ *
+ * Copyright (C) 2020 Intel Corporation
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/thermal.h>
+#include "intel_tsens_thermal.h"
+#include "keembay_tsens.h"
+
+struct keembay_thermal_priv {
+	const char *name;
+	void __iomem *base_addr;
+	/* sensor lock*/
+	spinlock_t lock;
+	int current_temp[KEEMBAY_SENSOR_MAX];
+	struct intel_tsens_plat_data *plat_data;
+};
+
+static void kmb_sensor_read_temp(void __iomem *regs_val,
+				 int offset,
+				 int sample_valid_mask,
+				 int sample_value,
+				 int bit_shift,
+				 int *temp)
+{
+	int reg_val, kmb_raw_index;
+
+	/* clear the bit of TSENS_EN and re-enable again */
+	iowrite32(0x00, regs_val + AON_TSENS_CFG);
+	iowrite32(CFG_MASK_MANUAL, regs_val + AON_TSENS_CFG);
+	reg_val = ioread32(regs_val + offset);
+	if (reg_val & sample_valid_mask) {
+		reg_val = (reg_val >> bit_shift) & sample_value;
+		kmb_raw_index = reg_val - KEEMBAY_SENSOR_BASE_TEMP;
+		if (kmb_raw_index < 0)
+			reg_val = raw_kmb[0];
+		else if (kmb_raw_index > (raw_kmb_size - 1))
+			reg_val = raw_kmb[raw_kmb_size - 1];
+		else
+			reg_val = raw_kmb[kmb_raw_index];
+		*temp = reg_val;
+	} else {
+		*temp = -255;
+	}
+}
+
+/*The lock is assumed to be held by the caller.*/
+static int keembay_get_temp(struct platform_device *pdev, int type, int *temp)
+{
+	struct keembay_thermal_priv *priv = platform_get_drvdata(pdev);
+
+	spin_lock(&priv->lock);
+	switch (type) {
+	case KEEMBAY_SENSOR_MSS:
+		kmb_sensor_read_temp(priv->base_addr,
+				     AON_TSENS_DATA0,
+				     MSS_T_SAMPLE_VALID,
+				     MSS_T_SAMPLE,
+				     MSS_BIT_SHIFT,
+				     temp);
+		priv->current_temp[KEEMBAY_SENSOR_MSS] = *temp;
+		break;
+
+	case KEEMBAY_SENSOR_CSS:
+		kmb_sensor_read_temp(priv->base_addr,
+				     AON_TSENS_DATA0,
+				     CSS_T_SAMPLE_VALID,
+				     CSS_T_SAMPLE,
+				     CSS_BIT_SHIFT,
+				     temp);
+		priv->current_temp[KEEMBAY_SENSOR_CSS] = *temp;
+		break;
+
+	case KEEMBAY_SENSOR_NCE:
+	{
+		int nce0, nce1;
+
+		kmb_sensor_read_temp(priv->base_addr,
+				     AON_TSENS_DATA1,
+				     NCE0_T_SAMPLE_VALID,
+				     NCE0_T_SAMPLE,
+				     NCE0_BIT_SHIFT,
+				     &nce0);
+		kmb_sensor_read_temp(priv->base_addr,
+				     AON_TSENS_DATA1,
+				     NCE1_T_SAMPLE_VALID,
+				     NCE1_T_SAMPLE,
+				     NCE1_BIT_SHIFT,
+				     &nce1);
+		*temp = max(nce0, nce1);
+		priv->current_temp[KEEMBAY_SENSOR_NCE] = *temp;
+	}
+		break;
+
+	case KEEMBAY_SENSOR_SOC:
+	{
+		int i;
+
+		*temp = 0;
+		for (i = 0; i < KEEMBAY_SENSOR_MAX; i++)
+			*temp = max(*temp, priv->current_temp[i]);
+	}
+		break;
+
+	default:
+		break;
+	}
+	spin_unlock(&priv->lock);
+
+	return 0;
+}
+
+static int keembay_thermal_probe(struct platform_device *pdev)
+{
+	struct intel_tsens_plat_data *plat_data;
+	struct keembay_thermal_priv *priv;
+
+	plat_data = pdev->dev.platform_data;
+	if (!plat_data) {
+		dev_err(&pdev->dev, "Platform data not found\n");
+		return -EINVAL;
+	}
+	if (!plat_data->base_addr)
+		return -EINVAL;
+
+	priv = devm_kzalloc(&pdev->dev,
+			    sizeof(struct keembay_thermal_priv),
+			    GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	priv->name = plat_data->name;
+	priv->base_addr = plat_data->base_addr;
+	priv->plat_data = plat_data;
+	plat_data->get_temp = keembay_get_temp;
+	spin_lock_init(&priv->lock);
+	platform_set_drvdata(pdev, priv);
+	dev_info(&pdev->dev, "Thermal driver loaded for %s\n",
+		 plat_data->name);
+	return 0;
+}
+
+static struct platform_driver keembay_thermal_driver = {
+	.probe = keembay_thermal_probe,
+	.driver = {
+		.name = "intel,keembay_thermal",
+	},
+};
+
+module_platform_driver(keembay_thermal_driver);
+
+MODULE_DESCRIPTION("Keem Bay Thermal Driver");
+MODULE_AUTHOR("Sandeep Singh <sandeep1.singh@intel.com>");
+MODULE_AUTHOR("Raja Subramanian, Lakshmi Bai <lakshmi.bai.raja.subramanian@intel.com>");
+MODULE_AUTHOR("Udhayakumar C <udhayakumar.c@intel.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/misc/intel_tsens/keembay_tsens.h b/drivers/misc/intel_tsens/keembay_tsens.h
new file mode 100644
index 000000000000..7a61c09de261
--- /dev/null
+++ b/drivers/misc/intel_tsens/keembay_tsens.h
@@ -0,0 +1,366 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ *
+ * Intel Keem Bay thermal Driver
+ *
+ * Copyright (C) 2020 Intel Corporation
+ *
+ */
+
+#ifndef _LINUX_KEEMBAY_TSENS_H
+#define _LINUX_KEEMBAY_TSENS_H
+
+#include <linux/thermal.h>
+
+/* Register values for keembay temperature (PVT Sensor) */
+#define AON_TSENS_TRIM0_CFG		0x0030
+#define AON_TSENS_TRIM1_CFG		0x0034
+#define AON_TSENS_CFG			0x0038
+#define AON_TSENS_INT0			0x203c
+#define AON_TSENS_INT1			0x2040
+#define AON_TSENS_IRQ_CLEAR		0x0044
+#define AON_TSENS_DATA0			0x0048
+#define MSS_T_SAMPLE_VALID		0x80000000
+#define MSS_T_SAMPLE			0x3ff
+#define CSS_T_SAMPLE_VALID		0x8000
+#define CSS_T_SAMPLE			0x3ff
+#define NCE1_T_SAMPLE_VALID		0x80000000
+#define NCE1_T_SAMPLE			0x3ff
+#define NCE0_T_SAMPLE_VALID		0x8000
+#define NCE0_T_SAMPLE			0x3ff
+#define AON_TSENS_DATA1			0x004c
+#define AON_INTERFACE			0x20260000
+/* Bit shift for registers*/
+#define MSS_BIT_SHIFT			16
+#define CSS_BIT_SHIFT			0
+#define NCE0_BIT_SHIFT			0
+#define NCE1_BIT_SHIFT			16
+/* mask values for config register */
+#define CFG_MASK_AUTO			0x80ff //(auto configuration)
+#define CFG_IRQ_MASK			0x8fff
+#define CFG_MASK_MANUAL		0x000f // TSENS_EN (manual config)
+
+/**
+ * KEEMBAY_SENSOR_MSS - Media subsystem junction temperature.
+ * KEEMBAY_SENSOR_CSS - Compute subsystem junction temperature.
+ * KEEMBAY_SENSOR_NCE - Neural computing engine junction temperature.
+ *			For NCE two sensors are available in kemmaby paltform,
+ *			maximum temperature of these two sensors will be
+ *			returned as NCE temperature.
+ * KEEMBAY_SENSOR_SOC - Soc temperature.
+ *			Maximum of MSS, CSS and NCE would be returned as
+ *			SOC temperature.
+ */
+enum keembay_thermal_sensor_en {
+	KEEMBAY_SENSOR_MSS,
+	KEEMBAY_SENSOR_CSS,
+	KEEMBAY_SENSOR_NCE,
+	KEEMBAY_SENSOR_SOC,
+	KEEMBAY_SENSOR_MAX
+};
+
+#define KEEMBAY_SENSOR_BASE_TEMP 27
+
+static int const raw_kmb[] = {
+39956,  -39637, -39319, -39001, -38684,
+
+38367,  -38050, -37734, -37418, -37103,
+
+36787,  -36472, -36158, -35844, -35530,
+
+35216,  -34903, -34590, -34278, -33966,
+
+33654,  -33343, -33032, -32721, -32411,
+
+32101,  -31791, -31482, -31173, -30864,
+
+30556,  -30248, -29940, -29633, -29326,
+
+29020,  -28713, -28407, -28102, -27797,
+
+27492,  -27187, -26883, -26579, -26276,
+
+25973,  -25670, -25367, -25065, -24763,
+
+24462,  -24160, -23860, -23559, -23259,
+
+22959,  -22660, -22360, -22062, -21763,
+
+21465,  -21167, -20869, -20572, -20275,
+
+19979,  -19683, -19387, -19091, -18796,
+
+18501,  -18206, -17912, -17618, -17325,
+
+-17031, -16738,  -16446, -16153, -15861,
+
+-15570, -15278,  -14987, -14697, -14406,
+
+-14116, -13826,  -13537, -13248, -12959,
+
+-12670, -12382,  -12094, -11807, -11520,
+
+-11233, -10946,  -10660, -10374, -10088,
+
+-9803, -9518, -9233, -8949, -8665,
+
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+
+-6967, -6685, -6403, -6122, -5841,
+
+-5560, -5279, -4999, -4720, -4440,
+
+-4161, -3882, -3603, -3325, -3047,
+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
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+
+104984, 105155, 105325, 105495, 105665,
+
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+
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+
+107524, 107692, 107860, 108028, 108195,
+
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+
+109198, 109365, 109531, 109698, 109864,
+
+110030, 110196, 110362, 110528, 110693,
+
+110858, 111024, 111189, 111354, 111518,
+
+111683, 111848, 112012, 112176, 112340,
+
+112504, 112668, 112832, 112995, 113159,
+
+113322, 113485, 113648, 113811, 113973,
+
+114136, 114298, 114461, 114623, 114785,
+
+114947, 115108, 115270, 115431, 115593,
+
+115754, 115915, 116076, 116236, 116397,
+
+116558, 116718, 116878, 117038, 117198,
+
+117358, 117518, 117677, 117836, 117996,
+
+118155, 118314, 118473, 118631, 118790,
+
+118948, 119107, 119265, 119423, 119581,
+
+119739, 119896, 120054, 120211, 120368,
+
+120525, 120682, 120839, 120996, 121153,
+
+121309, 121465, 121622, 121778, 121934,
+
+122089, 122245, 122400, 122556, 122711,
+
+122866, 123021, 123176, 123331, 123486,
+
+123640, 123794, 123949, 124103, 124257,
+
+124411, 124564, 124718, 124871, 125025,
+};
+
+static int raw_kmb_size = sizeof(raw_kmb) / sizeof(int);
+
+#endif /* _LINUX_KEEMBAY_TSENS_H */
-- 
2.17.1


  parent reply index

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-08 21:25 [PATCH v2 00/34] Intel Vision Processing base enabling mgross
2021-01-08 21:25 ` [PATCH v2 01/34] Add Vision Processing Unit (VPU) documentation mgross
2021-01-08 21:25 ` [PATCH v2 02/34] dt-bindings: mailbox: Add Intel VPU IPC mailbox bindings mgross
2021-01-08 21:25 ` [PATCH v2 03/34] mailbox: vpu-ipc-mailbox: Add support for Intel VPU IPC mailbox mgross
2021-01-08 21:25 ` [PATCH v2 04/34] dt-bindings: Add bindings for Keem Bay IPC driver mgross
2021-01-08 21:25 ` [PATCH v2 05/34] keembay-ipc: Add Keem Bay IPC module mgross
2021-01-08 21:25 ` [PATCH v2 06/34] dt-bindings: Add bindings for Keem Bay VPU IPC driver mgross
2021-01-10 17:18   ` Rob Herring
2021-01-11 19:24   ` Rob Herring
2021-01-19 14:32     ` Alessandrelli, Daniele
2021-01-08 21:25 ` [PATCH v2 07/34] keembay-vpu-ipc: Add Keem Bay VPU IPC module mgross
2021-01-08 21:25 ` [PATCH v2 08/34] misc: xlink-pcie: Add documentation for XLink PCIe driver mgross
2021-01-19 19:36   ` Randy Dunlap
2021-01-24 18:27     ` Thokala, Srikanth
2021-01-08 21:25 ` [PATCH v2 09/34] misc: xlink-pcie: lh: Add PCIe EPF driver for Local Host mgross
2021-01-20 17:57   ` Greg KH
2021-01-24 11:48     ` Thokala, Srikanth
2021-01-24 11:56       ` Greg KH
2021-01-24 18:18         ` Thokala, Srikanth
2021-01-08 21:25 ` [PATCH v2 10/34] misc: xlink-pcie: lh: Add PCIe EP DMA functionality mgross
2021-01-08 21:25 ` [PATCH v2 11/34] misc: xlink-pcie: lh: Add core communication logic mgross
2021-01-08 21:25 ` [PATCH v2 12/34] misc: xlink-pcie: lh: Prepare changes for adding remote host driver mgross
2021-01-08 21:25 ` [PATCH v2 13/34] misc: xlink-pcie: rh: Add PCIe EP driver for Remote Host mgross
2021-01-08 21:25 ` [PATCH v2 14/34] misc: xlink-pcie: rh: Add core communication logic mgross
2021-01-08 21:25 ` [PATCH v2 15/34] misc: xlink-pcie: Add XLink API interface mgross
2021-01-20 17:59   ` Greg KH
2021-01-21 23:20     ` mark gross
2021-01-24 11:46     ` Thokala, Srikanth
2021-01-08 21:25 ` [PATCH v2 16/34] misc: xlink-pcie: Add asynchronous event notification support for XLink mgross
2021-01-08 21:25 ` [PATCH v2 17/34] xlink-ipc: Add xlink ipc device tree bindings mgross
2021-01-10 17:18   ` Rob Herring
2021-01-08 21:25 ` [PATCH v2 18/34] xlink-ipc: Add xlink ipc driver mgross
2021-01-08 21:25 ` [PATCH v2 19/34] xlink-core: Add xlink core device tree bindings mgross
2021-01-10 17:18   ` Rob Herring
2021-01-11 19:27   ` Rob Herring
2021-01-08 21:25 ` [PATCH v2 20/34] xlink-core: Add xlink core driver xLink mgross
2021-01-19 19:58   ` Randy Dunlap
2021-01-08 21:25 ` [PATCH v2 21/34] xlink-core: Enable xlink protocol over pcie mgross
2021-01-08 21:25 ` [PATCH v2 22/34] xlink-core: Enable VPU IP management and runtime control mgross
2021-01-08 21:25 ` [PATCH v2 23/34] xlink-core: add async channel and events mgross
2021-01-08 21:25 ` [PATCH v2 24/34] dt-bindings: misc: Add Keem Bay vpumgr mgross
2021-01-08 21:25 ` [PATCH v2 25/34] misc: Add Keem Bay VPU manager mgross
2021-01-08 21:25 ` [PATCH v2 26/34] dt-bindings: misc: intel_tsens: Add tsens thermal bindings documentation mgross
2021-01-08 21:25 ` [PATCH v2 27/34] misc: Tsens ARM host thermal driver mgross
2021-01-08 21:25 ` [PATCH v2 28/34] misc: Intel tsens IA host driver mgross
2021-01-08 21:25 ` [PATCH v2 29/34] Intel tsens i2c slave driver mgross
2021-01-12  7:15   ` Randy Dunlap
2021-01-25 23:39     ` mark gross
2021-01-26  7:45       ` Arnd Bergmann
2021-01-26 14:56         ` Gross, Mark
2021-01-27  4:45         ` C, Udhayakumar
2021-01-27  4:44       ` C, Udhayakumar
2021-01-08 21:25 ` mgross [this message]
2021-01-08 21:25 ` [PATCH v2 31/34] Intel Keem Bay XLink SMBus driver mgross
2021-01-08 21:25 ` [PATCH v2 32/34] dt-bindings: misc: hddl_dev: Add hddl device management documentation mgross
2021-01-08 21:25 ` [PATCH v2 33/34] misc: Hddl device management for local host mgross
2021-01-08 21:26 ` [PATCH v2 34/34] misc: HDDL device management for IA host mgross

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