From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
coresight@lists.linaro.org, Stephen Boyd <swboyd@chromium.org>,
Denis Nikitin <denik@chromium.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Al Grant <al.grant@arm.com>,
leo.yan@linaro.org, mnissler@google.com
Subject: Re: [PATCH] coresight: etm4x: Add config to exclude kernel mode tracing
Date: Mon, 18 Jan 2021 13:23:54 -0700 [thread overview]
Message-ID: <20210118202354.GC464579@xps15> (raw)
In-Reply-To: <dd400fd7017a5d92b55880cf28378267@codeaurora.org>
On Fri, Jan 15, 2021 at 11:16:24AM +0530, Sai Prakash Ranjan wrote:
> Hello Mathieu, Suzuki
>
> On 2020-10-15 21:32, Mathieu Poirier wrote:
> > On Thu, Oct 15, 2020 at 06:15:22PM +0530, Sai Prakash Ranjan wrote:
> > > On production systems with ETMs enabled, it is preferred to
> > > exclude kernel mode(NS EL1) tracing for security concerns and
> > > support only userspace(NS EL0) tracing. So provide an option
> > > via kconfig to exclude kernel mode tracing if it is required.
> > > This config is disabled by default and would not affect the
> > > current configuration which has both kernel and userspace
> > > tracing enabled by default.
> > >
> >
> > One requires root access (or be part of a special trace group) to be
> > able to use
> > the cs_etm PMU. With this kind of elevated access restricting tracing
> > at EL1
> > provides little in terms of security.
> >
>
> Apart from the VM usecase discussed, I am told there are other
> security concerns here regarding need to exclude kernel mode tracing
> even for the privileged users/root. One such case being the ability
> to analyze cryptographic code execution since ETMs can record all
> branch instructions including timestamps in the kernel and there may
> be other cases as well which I may not be aware of and hence have
> added Denis and Mattias. Please let us know if you have any questions
> further regarding this not being a security concern.
Even if we were to apply this patch there are many ways to compromise a system
or get the kernel to reveal important information using the perf subsystem. I
would perfer to tackle the problem at that level rather than concentrating on
coresight.
>
> After this discussion, I would like to post a v2 based on Suzuki's
> feedback earlier. @Suzuki, I have a common config for ETM3 and ETM4
> but couldn't get much idea on how to implement it for Intel PTs, if
> you have any suggestions there, please do share or we can have this
> only for Coresight ETMs.
>
> Thanks,
> Sai
>
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2021-01-18 20:25 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-15 12:45 [PATCH] coresight: etm4x: Add config to exclude kernel mode tracing Sai Prakash Ranjan
2020-10-15 14:27 ` Suzuki K Poulose
2020-10-16 8:30 ` Sai Prakash Ranjan
2020-10-15 16:02 ` Mathieu Poirier
[not found] ` <CADDJ8CXS8gGuXL45vR6xiHwJhZNcUJPvHMVYSGR6LDETRPJFiQ@mail.gmail.com>
2020-10-16 7:24 ` Leo Yan
2020-10-16 8:40 ` Sai Prakash Ranjan
2020-10-16 9:24 ` Leo Yan
2020-10-16 10:30 ` Sai Prakash Ranjan
2020-10-16 11:38 ` Suzuki Poulose
2020-10-16 13:14 ` Leo Yan
2020-10-16 13:17 ` Suzuki Poulose
2020-10-16 11:11 ` Suzuki Poulose
2021-01-15 5:46 ` Sai Prakash Ranjan
2021-01-18 14:47 ` Mattias Nissler
2021-01-19 5:12 ` Sai Prakash Ranjan
2021-01-18 20:23 ` Mathieu Poirier [this message]
2021-01-19 5:21 ` Sai Prakash Ranjan
2021-01-19 8:36 ` Al Grant
2021-01-19 9:51 ` Sai Prakash Ranjan
2021-01-19 10:33 ` Suzuki K Poulose
2021-01-19 11:56 ` Al Grant
2021-01-20 5:13 ` Sai Prakash Ranjan
2021-01-19 12:00 ` Sai Prakash Ranjan
2021-01-20 18:48 ` Mathieu Poirier
2021-01-21 6:03 ` Sai Prakash Ranjan
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