From: kernel test robot <lkp@intel.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzk@kernel.org>
Subject: arch/arm/mach-s3c/pm-s3c2410.c:45:49: sparse: sparse: incorrect type in argument 1 (different address spaces)
Date: Wed, 3 Feb 2021 18:10:20 +0800 [thread overview]
Message-ID: <202102031808.sqFsjFhf-lkp@intel.com> (raw)
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 3aaf0a27ffc29b19a62314edd684b9bc6346f9a8
commit: 71b9114d2c13a648fbe6523dd859e611c316ad90 ARM: s3c: move into a common directory
date: 6 months ago
config: arm-randconfig-s032-20210203 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-215-g0fb77bb6-dirty
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=71b9114d2c13a648fbe6523dd859e611c316ad90
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 71b9114d2c13a648fbe6523dd859e611c316ad90
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
"sparse warnings: (new ones prefixed by >>)"
>> arch/arm/mach-s3c/pm-s3c2410.c:45:49: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got void * @@
arch/arm/mach-s3c/pm-s3c2410.c:45:49: sparse: expected void const volatile [noderef] __iomem *addr
arch/arm/mach-s3c/pm-s3c2410.c:45:49: sparse: got void *
>> arch/arm/mach-s3c/pm-s3c2410.c:47:48: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void volatile [noderef] __iomem *addr @@ got void * @@
arch/arm/mach-s3c/pm-s3c2410.c:47:48: sparse: expected void volatile [noderef] __iomem *addr
arch/arm/mach-s3c/pm-s3c2410.c:47:48: sparse: got void *
arch/arm/mach-s3c/pm-s3c2410.c:61:49: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got void * @@
arch/arm/mach-s3c/pm-s3c2410.c:61:49: sparse: expected void const volatile [noderef] __iomem *addr
arch/arm/mach-s3c/pm-s3c2410.c:61:49: sparse: got void *
arch/arm/mach-s3c/pm-s3c2410.c:63:48: sparse: sparse: incorrect type in argument 2 (different address spaces) @@ expected void volatile [noderef] __iomem *addr @@ got void * @@
arch/arm/mach-s3c/pm-s3c2410.c:63:48: sparse: expected void volatile [noderef] __iomem *addr
arch/arm/mach-s3c/pm-s3c2410.c:63:48: sparse: got void *
vim +45 arch/arm/mach-s3c/pm-s3c2410.c
232910d6bf8d95 arch/arm/mach-s3c24xx/pm-s3c2410.c Kukjin Kim 2013-01-02 27
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 28 static void s3c2410_pm_prepare(void)
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 29 {
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 30 /* ensure at least GSTATUS3 has the resume address */
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 31
64fc2a947a9873 arch/arm/mach-s3c24xx/pm-s3c2410.c Florian Fainelli 2017-01-15 32 __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2410_GSTATUS3);
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 33
6419711a164ba1 arch/arm/mach-s3c2410/pm.c Ben Dooks 2008-12-12 34 S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
6419711a164ba1 arch/arm/mach-s3c2410/pm.c Ben Dooks 2008-12-12 35 S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 36
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 37 if (machine_is_h1940()) {
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 38 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 39 unsigned long ptr;
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 40 unsigned long calc = 0;
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 41
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 42 /* generate check for the bootloader to check on resume */
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 43
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 44 for (ptr = 0; ptr < 0x40000; ptr += 0x400)
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 @45 calc += __raw_readl(base+ptr);
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 46
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 @47 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 48 }
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 49
0741b7d2699d1e arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 50 /* RX3715 and RX1950 use similar to H1940 code and the
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 51 * same offsets for resume and checksum pointers */
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 52
0741b7d2699d1e arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 53 if (machine_is_rx3715() || machine_is_rx1950()) {
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 54 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 55 unsigned long ptr;
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 56 unsigned long calc = 0;
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 57
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 58 /* generate check for the bootloader to check on resume */
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 59
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 60 for (ptr = 0; ptr < 0x40000; ptr += 0x4)
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 61 calc += __raw_readl(base+ptr);
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 62
a21765a70ec06b arch/arm/mach-s3c2410/pm.c Ben Dooks 2007-02-11 63 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 64 }
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 65
949117356e84ef arch/arm/mach-s3c24xx/pm-s3c2410.c Sylwester Nawrocki 2012-07-13 66 if (machine_is_aml_m5900()) {
949117356e84ef arch/arm/mach-s3c24xx/pm-s3c2410.c Sylwester Nawrocki 2012-07-13 67 gpio_request_one(S3C2410_GPF(2), GPIOF_OUT_INIT_HIGH, NULL);
949117356e84ef arch/arm/mach-s3c24xx/pm-s3c2410.c Sylwester Nawrocki 2012-07-13 68 gpio_free(S3C2410_GPF(2));
949117356e84ef arch/arm/mach-s3c24xx/pm-s3c2410.c Sylwester Nawrocki 2012-07-13 69 }
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 70
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 71 if (machine_is_rx1950()) {
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 72 /* According to S3C2442 user's manual, page 7-17,
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 73 * when the system is operating in NAND boot mode,
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 74 * the hardware pin configuration - EINT[23:21] –
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 75 * must be set as input for starting up after
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 76 * wakeup from sleep mode
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 77 */
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 78 s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT);
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 79 s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT);
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 80 s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT);
192ff91fc84e06 arch/arm/mach-s3c2410/pm.c Vasily Khoruzhick 2010-05-11 81 }
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 82 }
^1da177e4c3f41 arch/arm/mach-s3c2410/pm.c Linus Torvalds 2005-04-16 83
:::::: The code at line 45 was first introduced by commit
:::::: a21765a70ec06be175d3997320a83fa66fcc8955 [ARM] 4157/2: S3C24XX: move arch/arch/mach-s3c2410 into cpu components
:::::: TO: Ben Dooks <ben-linux@fluff.org>
:::::: CC: Russell King <rmk+kernel@arm.linux.org.uk>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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next reply other threads:[~2021-02-03 10:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-03 10:10 kernel test robot [this message]
2021-05-06 14:11 arch/arm/mach-s3c/pm-s3c2410.c:45:49: sparse: sparse: incorrect type in argument 1 (different address spaces) kernel test robot
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