From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66FB5C433DB for ; Thu, 11 Feb 2021 03:24:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 29BC464E8B for ; Thu, 11 Feb 2021 03:24:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229702AbhBKDYs (ORCPT ); Wed, 10 Feb 2021 22:24:48 -0500 Received: from mga07.intel.com ([134.134.136.100]:29999 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229452AbhBKDYm (ORCPT ); Wed, 10 Feb 2021 22:24:42 -0500 IronPort-SDR: FNAFSLJgrWH1AQKvRvDWPhjwxTXqwRyYXqSlEK4STUcSOw8Rz1nSqvr+ihaQa+hRgZxUJOAizi /d7O43SzBDrg== X-IronPort-AV: E=McAfee;i="6000,8403,9891"; a="246254538" X-IronPort-AV: E=Sophos;i="5.81,169,1610438400"; d="scan'208";a="246254538" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2021 19:24:01 -0800 IronPort-SDR: sX9m+dDYjM4M2XOb+9MawTFHw0tQR4vEHE+NRVEnN+ljifYfbHMcfa9ixK+xx/SuRmmX7/qoYE p025Z5E1yCKQ== X-IronPort-AV: E=Sophos;i="5.81,169,1610438400"; d="scan'208";a="586826398" Received: from rontiver-mobl.amr.corp.intel.com (HELO intel.com) ([10.212.99.95]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2021 19:23:59 -0800 Date: Wed, 10 Feb 2021 22:23:58 -0500 From: Rodrigo Vivi To: Lyude Paul Cc: intel-gfx@lists.freedesktop.org, Karthik B S , David Airlie , Pankaj Bharadiya , "open list:DRM DRIVERS" , open list , Chris Wilson , Manasi Navare , Yijun Shen , =?iso-8859-1?Q?Jos=E9?= Roberto de Souza , Dave Airlie , Tejas Upadhyay Subject: Re: [PATCH v5 4/4] drm/i915/gen9_bc: Add W/A for missing STRAP config on TGP PCH + CML combos Message-ID: <20210211032358.GD82362@intel.com> References: <20210209212832.1401815-1-lyude@redhat.com> <20210209212832.1401815-5-lyude@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210209212832.1401815-5-lyude@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 09, 2021 at 04:28:31PM -0500, Lyude Paul wrote: > Apparently the new gen9_bc platforms that Intel has introduced don't > provide us with a STRAP config register to read from for initializing DDI > B, C, and D detection. So, workaround this by hard-coding our strap config > in intel_setup_outputs(). > > Changes since v4: > * Split this into it's own commit > > Cc: Matt Roper > Cc: Jani Nikula > Cc: Ville Syrjala > [originally from Tejas's work] > Signed-off-by: Tejas Upadhyay > Signed-off-by: Lyude Paul > --- > drivers/gpu/drm/i915/display/intel_display.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index beed08c00b6c..4dee37f8659d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -11943,7 +11943,14 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) > > /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP > * register */ > - found = intel_de_read(dev_priv, SFUSE_STRAP); > + if (HAS_PCH_TGP(dev_priv)) { > + /* W/A due to lack of STRAP config on TGP PCH*/ > + found = (SFUSE_STRAP_DDIB_DETECTED | > + SFUSE_STRAP_DDIC_DETECTED | > + SFUSE_STRAP_DDID_DETECTED); we have somewhere in this function these forced fuse straps for gen9 platform... don't we have a ways to combine them? Afterall, the reason that we need these forced bits is because it is a gen9, not because it is a TGP... > + } else { > + found = intel_de_read(dev_priv, SFUSE_STRAP); > + } > > if (found & SFUSE_STRAP_DDIB_DETECTED) > intel_ddi_init(dev_priv, PORT_B); > -- > 2.29.2 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel