From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 009DFC433DB for ; Sun, 14 Feb 2021 19:35:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B91FF64E29 for ; Sun, 14 Feb 2021 19:35:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229818AbhBNTfK (ORCPT ); Sun, 14 Feb 2021 14:35:10 -0500 Received: from mga12.intel.com ([192.55.52.136]:53951 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229642AbhBNTfI (ORCPT ); Sun, 14 Feb 2021 14:35:08 -0500 IronPort-SDR: O9MjSacBhjWCgLheiIbex1RVbMh2ZZmKyzfMbHuZ7FsoQb69tWnDcH7WBb3L4S0B+YV5JvDnTl pmIa0sQMwqnw== X-IronPort-AV: E=McAfee;i="6000,8403,9895"; a="161736102" X-IronPort-AV: E=Sophos;i="5.81,179,1610438400"; d="scan'208";a="161736102" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2021 11:33:22 -0800 IronPort-SDR: V2grEBjIPBMLQfK0YatjbkaTnDA5f3Ijs8X5sKxsnCJ6c3Kkf0XqQ0YrVNYTefrvBZKIwoq8D/ uOxLM2jO5kSg== X-IronPort-AV: E=Sophos;i="5.81,179,1610438400"; d="scan'208";a="376990409" Received: from tassilo.jf.intel.com ([10.54.74.11]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2021 11:33:22 -0800 Date: Sun, 14 Feb 2021 11:33:20 -0800 From: Andi Kleen To: Dave Hansen Cc: Andy Lutomirski , Sean Christopherson , Kuppuswamy Sathyanarayanan , Peter Zijlstra , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Dan Williams , Raj Ashok , LKML , Sean Christopherson Subject: Re: [RFC v1 05/26] x86/traps: Add #VE support for TDX guest Message-ID: <20210214193320.GH365765@tassilo.jf.intel.com> References: <8c23bbfd-e371-a7cf-7f77-ec744181547b@intel.com> <514734d9-d8be-03ee-417e-4d0ad2f56276@intel.com> <7d0b08c4-5ae7-f914-e217-767a9fae7b78@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 12, 2021 at 01:48:36PM -0800, Dave Hansen wrote: > On 2/12/21 1:47 PM, Andy Lutomirski wrote: > >> What about adding a property to the TD, e.g. via a flag set during TD creation, > >> that controls whether unaccepted accesses cause #VE or are, for all intents and > >> purposes, fatal? That would allow Linux to pursue treating EPT #VEs for private > >> GPAs as fatal, but would give us a safety and not prevent others from utilizing > >> #VEs. > > That seems reasonable. > > Ditto. > > We first need to double check to see if the docs are right, though. I confirmed with the TDX module owners that #VE can only happen for: - unaccepted pages - instructions like MSR access or CPUID - specific instructions that are no in the syscall gap Also if there are future asynchronous #VEs they would only happen with IF=1, which would also protect the gap. So no need to make #VE an IST. -Andi