From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9718DC433E0 for ; Mon, 15 Feb 2021 17:28:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D13464DEB for ; Mon, 15 Feb 2021 17:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232625AbhBOR14 (ORCPT ); Mon, 15 Feb 2021 12:27:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231774AbhBOQ1p (ORCPT ); Mon, 15 Feb 2021 11:27:45 -0500 Received: from mail-qt1-x834.google.com (mail-qt1-x834.google.com [IPv6:2607:f8b0:4864:20::834]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66E95C06178C for ; Mon, 15 Feb 2021 08:27:04 -0800 (PST) Received: by mail-qt1-x834.google.com with SMTP id n28so5137131qtv.12 for ; Mon, 15 Feb 2021 08:27:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L2b11X7RX6S9uuGP/RiVj8dxHh//FmXWH5wSG8YTYW4=; b=MuJgvEB0ZpIC9h67r8fVYYq/jQlxeFLFcjO30PFkl06L2uTt1L38nnXaPOqtyRhYWe 6fzUPoQoa8NPKaeP8mT8JD5TlGePOUN/ExN1FZk5wyUhu9LzquVFp9A2WHo+KOYvmthq AAWe0z1jcpEjQ78MibVQdGpNhxbIPbb5GONQbC+aJaplQtcl2AKJho3Ea5SWwnomLD59 6by+LgGx0NleG0hdxEGFy1d7GU3+yRVt6sJuI3hdzj1Sw8liz6z8nGk0Qj89r208yduS zrMkYEbOM1vQlCtCKP/PBK7exMpWgoyLs8/06RrXSc+cO7WYgePAym00dRbwEXLuPR9i ZlmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L2b11X7RX6S9uuGP/RiVj8dxHh//FmXWH5wSG8YTYW4=; b=corxdpIGm7L96LKE92qCntCZwCpS2l0pfDQikFGC4JAq6BFikh9fEXLgh65Z8g4bH7 9vwjWQeQYH4VmS/T5wtNSuhBYsl3k/dJelqeW9x/n69JMGYd+IlHZwguoptal4eKsPUu CGTC05ymEIXsmxcmUHXFcM2gHGvAbp5EPWejb2gZ1HUsD7ZG7BtaPT2o7zC1w7eJClA5 1TbIsrtjmlJzKZZKeVjoCoGJjHQOEg9QE33dtpIAn9Ja43jEsN+xXzAPmZ+8UygLD6Je jc861BDSArG+ghhreMd/4/3vWxeDNSvkpZBAKFo67D106KpSVoob2mwLwlw13RTPfrDb T/pQ== X-Gm-Message-State: AOAM533yVaLeuxlZa5EnR0PnWNHuSTFk75VVmmny/hh2lBq2RaUtx9Fn HnmdYZktkN5wyrb/pombMN0RGw== X-Google-Smtp-Source: ABdhPJyyAN5o6cHtOzDq559SJRuK26oNIP7uZjHkmGmB3ZKRW92mYDz7qjvzMkJdv/1CRxH+qebACg== X-Received: by 2002:ac8:3693:: with SMTP id a19mr8916544qtc.54.1613406423689; Mon, 15 Feb 2021 08:27:03 -0800 (PST) Received: from localhost.localdomain (modemcable068.184-131-66.mc.videotron.ca. [66.131.184.68]) by smtp.gmail.com with ESMTPSA id u7sm10928811qta.75.2021.02.15.08.27.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Feb 2021 08:27:03 -0800 (PST) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Rob Herring , Dmitry Baryshkov , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 2/2] arm64: dts: qcom: sm8250: fix display nodes Date: Mon, 15 Feb 2021 11:26:05 -0500 Message-Id: <20210215162607.21360-3-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210215162607.21360-1-jonathan@marek.ca> References: <20210215162607.21360-1-jonathan@marek.ca> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Apply these fixes to the newly added sm8250 display ndoes - Use sm8250 compatibles instead of sdm845 compatibles - Remove "notused" interconnect (which apparently was blindly copied from my old patches) - Use dispcc node example from dt-bindings, removing clocks which aren't documented or used by the driver and fixing the region size. Fixes: 7c1dffd471b1 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes") Signed-off-by: Jonathan Marek --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 31 +++++++--------------------- 1 file changed, 8 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 947e1accae3a..693ac533f9b6 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2323,14 +2323,13 @@ usb_2_dwc3: dwc3@a800000 { }; mdss: mdss@ae00000 { - compatible = "qcom,sdm845-mdss"; + compatible = "qcom,sm8250-mdss"; reg = <0 0x0ae00000 0 0x1000>; reg-names = "mdss"; - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_DISPLAY_CFG>, - <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, + interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>, <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>; - interconnect-names = "notused", "mdp0-mem", "mdp1-mem"; + interconnect-names = "mdp0-mem", "mdp1-mem"; power-domains = <&dispcc MDSS_GDSC>; @@ -2356,7 +2355,7 @@ mdss: mdss@ae00000 { ranges; mdss_mdp: mdp@ae01000 { - compatible = "qcom,sdm845-dpu"; + compatible = "qcom,sm8250-dpu"; reg = <0 0x0ae01000 0 0x8f000>, <0 0x0aeb0000 0 0x2008>; reg-names = "mdp", "vbif"; @@ -2580,7 +2579,7 @@ opp-358000000 { dispcc: clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; - reg = <0 0x0af00000 0 0x20000>; + reg = <0 0x0af00000 0 0x10000>; mmcx-supply = <&mmcx_reg>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&dsi0_phy 0>, @@ -2588,28 +2587,14 @@ dispcc: clock-controller@af00000 { <&dsi1_phy 0>, <&dsi1_phy 1>, <0>, - <0>, - <0>, - <0>, - <0>, - <0>, - <0>, - <0>, - <&sleep_clk>; + <0>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk", "dsi1_phy_pll_out_byteclk", "dsi1_phy_pll_out_dsiclk", - "dp_link_clk_divsel_ten", - "dp_vco_divided_clk_src_mux", - "dptx1_phy_pll_link_clk", - "dptx1_phy_pll_vco_div_clk", - "dptx2_phy_pll_link_clk", - "dptx2_phy_pll_vco_div_clk", - "edp_phy_pll_link_clk", - "edp_phy_pll_vco_div_clk", - "sleep_clk"; + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; -- 2.26.1