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Wed, 17 Feb 2021 06:03:15 -0500 (EST) Date: Wed, 17 Feb 2021 12:03:13 +0100 From: Maxime Ripard To: Marjan Pascolo Cc: wens@csie.org, Jernej Skrabec , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] pinctrl/sunxi: adding input-debounce-ns property Message-ID: <20210217110313.ly5ly5u5vyh2s7dh@gilmour> References: <20210114081732.9386-1-giulio.benetti@benettiengineering.com> <20210114114219.faulkwww3dhdqwmc@gilmour> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="4d4ux434tr5bcsek" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --4d4ux434tr5bcsek Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, Feb 10, 2021 at 05:22:37PM +0100, Marjan Pascolo wrote: > On Allwinner SoC interrupt debounce can be controlled by two oscillator > (32KHz and 24MHz) and a prescale divider. > Oscillator and prescale divider are set through > device tree property "input-debounce" which have 1uS accuracy. > For acheive nS precision a new device tree poperty is made > named "input-debounce-ns". > "input-debounce-ns" is checked only if "input-debounce" > property is not defined. >=20 > Suggested-by: Maxime Ripard > Signed-off-by: Marjan Pascolo > --- > --- > =A0.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml=A0 |=A0 9 +++++++ > =A0drivers/pinctrl/sunxi/pinctrl-sunxi.c=A0=A0=A0=A0=A0=A0=A0=A0 | 25 +++= +++++++++++++--- > =A02 files changed, 30 insertions(+), 4 deletions(-) >=20 > diff --git > a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.y= aml > b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.y= aml > index 5240487dfe50..346776de3a44 100644 > --- > a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.y= aml > +++ > b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.y= aml > @@ -93,6 +93,15 @@ properties: > =A0=A0=A0=A0 minItems: 1 > =A0=A0=A0=A0 maxItems: 5 >=20 > +=A0 input-debounce-ns: > +=A0=A0=A0 description: > +=A0=A0=A0=A0=A0 Debouncing periods in nanoseconds, one period per interr= upt > +=A0=A0=A0=A0=A0 bank found in the controller. > +=A0=A0=A0=A0=A0 Only checked if input-debounce is not present > +=A0=A0=A0 $ref: /schemas/types.yaml#/definitions/uint32-array > +=A0=A0=A0 minItems: 1 > +=A0=A0=A0 maxItems: 5 > + This should be a separate patch, with the DT maintainers in Cc.=20 You should enforce that the properties are mutually exclusive through the schema too > =A0patternProperties: > =A0=A0 # It's pretty scary, but the basic idea is that: > =A0=A0 #=A0=A0 - One node name can start with either s- or r- for PRCM no= des, > diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > index dc8d39ae045b..869b6d5743ba 100644 > --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c > +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c > @@ -1335,14 +1335,31 @@ static int sunxi_pinctrl_setup_debounce(struct > sunxi_pinctrl *pctl, > =A0=A0=A0=A0 struct clk *hosc, *losc; > =A0=A0=A0=A0 u8 div, src; > =A0=A0=A0=A0 int i, ret; > +=A0=A0=A0 /* Keeping for loop below clean */ > +=A0=A0=A0 const char* debounce_prop_name; > +=A0=A0=A0 unsigned long debounce_dividend; >=20 > =A0=A0=A0=A0 /* Deal with old DTs that didn't have the oscillators */ > =A0=A0=A0=A0 if (of_clk_get_parent_count(node) !=3D 3) > =A0=A0=A0=A0 =A0=A0=A0 return 0; >=20 > +=A0=A0=A0 /* > +=A0=A0=A0 =A0* Distinguish between simple input-debounce > +=A0=A0=A0 =A0* and new input-debounce-ns > +=A0=A0=A0 =A0*/ > + I'm not sure that comment should stay, the code is obvious enough > =A0=A0=A0=A0 /* If we don't have any setup, bail out */ > -=A0=A0=A0 if (!of_find_property(node, "input-debounce", NULL)) > -=A0=A0=A0 =A0=A0=A0 return 0; > +=A0=A0=A0 if (!of_find_property(node, "input-debounce", NULL)) { > +=A0=A0=A0 =A0=A0=A0 if(!of_find_property(node, "input-debounce-ns", NULL= )) { > +=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 return 0; > +=A0=A0=A0 =A0=A0=A0 } else { > +=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 debounce_prop_name=3D"input-debounce-ns"; > +=A0=A0=A0 =A0=A0=A0 =A0=A0=A0 debounce_dividend=3DNSEC_PER_SEC; > +=A0=A0=A0 =A0=A0=A0 } > +=A0=A0=A0 } else { > +=A0=A0=A0 =A0=A0=A0 debounce_prop_name=3D"input-debounce"; > +=A0=A0=A0 =A0=A0=A0 debounce_dividend=3DUSEC_PER_SEC; > +=A0=A0=A0 } This doesn't follow the kernel coding style, make sure to run scripts/checkpatch.pl on your patches before sending them. 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