Hi Huacai, FYI, the error/warning still remains. tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b commit: f83e4f9896eff614d0f2547a561fa5f39f9cddde MIPS: Loongson-3: Add some unaligned instructions emulation date: 10 months ago config: mips-randconfig-r005-20210221 (attached as .config) compiler: mips64el-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f83e4f9896eff614d0f2547a561fa5f39f9cddde git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout f83e4f9896eff614d0f2547a561fa5f39f9cddde # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): arch/mips/loongson64/cop2-ex.c: In function 'loongson_cu2_call': arch/mips/loongson64/cop2-ex.c:44:15: error: implicit declaration of function '__is_fpu_owner'; did you mean 'is_fpu_owner'? [-Werror=implicit-function-declaration] 44 | fpu_owned = __is_fpu_owner(); | ^~~~~~~~~~~~~~ | is_fpu_owner >> arch/mips/loongson64/cop2-ex.c:97:29: error: 'struct thread_struct' has no member named 'fpu' 97 | set_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:99:29: error: 'struct thread_struct' has no member named 'fpu' 99 | set_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:132:42: error: 'struct thread_struct' has no member named 'fpu' 132 | value_next = get_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:139:37: error: 'struct thread_struct' has no member named 'fpu' 139 | value = get_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:206:29: error: 'struct thread_struct' has no member named 'fpu' 206 | set_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:223:29: error: 'struct thread_struct' has no member named 'fpu' 223 | set_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:288:37: error: 'struct thread_struct' has no member named 'fpu' 288 | value = get_fpr64(current->thread.fpu.fpr, | ^ arch/mips/loongson64/cop2-ex.c:307:37: error: 'struct thread_struct' has no member named 'fpu' 307 | value = get_fpr64(current->thread.fpu.fpr, | ^ cc1: some warnings being treated as errors vim +97 arch/mips/loongson64/cop2-ex.c 26 27 static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action, 28 void *data) 29 { 30 unsigned int res, fpu_owned; 31 unsigned long ra, value, value_next; 32 union mips_instruction insn; 33 int fr = !test_thread_flag(TIF_32BIT_FPREGS); 34 struct pt_regs *regs = (struct pt_regs *)data; 35 void __user *addr = (void __user *)regs->cp0_badvaddr; 36 unsigned int __user *pc = (unsigned int __user *)exception_epc(regs); 37 38 ra = regs->regs[31]; 39 __get_user(insn.word, pc); 40 41 switch (action) { 42 case CU2_EXCEPTION: 43 preempt_disable(); 44 fpu_owned = __is_fpu_owner(); 45 if (!fr) 46 set_c0_status(ST0_CU1 | ST0_CU2); 47 else 48 set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR); 49 enable_fpu_hazard(); 50 KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2); 51 if (fr) 52 KSTK_STATUS(current) |= ST0_FR; 53 else 54 KSTK_STATUS(current) &= ~ST0_FR; 55 /* If FPU is owned, we needn't init or restore fp */ 56 if (!fpu_owned) { 57 set_thread_flag(TIF_USEDFPU); 58 init_fp_ctx(current); 59 _restore_fp(current); 60 } 61 preempt_enable(); 62 63 return NOTIFY_STOP; /* Don't call default notifier */ 64 65 case CU2_LWC2_OP: 66 if (insn.loongson3_lswc2_format.ls == 0) 67 goto sigbus; 68 69 if (insn.loongson3_lswc2_format.fr == 0) { /* gslq */ 70 if (!access_ok(addr, 16)) 71 goto sigbus; 72 73 LoadDW(addr, value, res); 74 if (res) 75 goto fault; 76 77 LoadDW(addr + 8, value_next, res); 78 if (res) 79 goto fault; 80 81 regs->regs[insn.loongson3_lswc2_format.rt] = value; 82 regs->regs[insn.loongson3_lswc2_format.rq] = value_next; 83 compute_return_epc(regs); 84 } else { /* gslqc1 */ 85 if (!access_ok(addr, 16)) 86 goto sigbus; 87 88 lose_fpu(1); 89 LoadDW(addr, value, res); 90 if (res) 91 goto fault; 92 93 LoadDW(addr + 8, value_next, res); 94 if (res) 95 goto fault; 96 > 97 set_fpr64(current->thread.fpu.fpr, 98 insn.loongson3_lswc2_format.rt, value); 99 set_fpr64(current->thread.fpu.fpr, 100 insn.loongson3_lswc2_format.rq, value_next); 101 compute_return_epc(regs); 102 own_fpu(1); 103 } 104 return NOTIFY_STOP; /* Don't call default notifier */ 105 106 case CU2_SWC2_OP: 107 if (insn.loongson3_lswc2_format.ls == 0) 108 goto sigbus; 109 110 if (insn.loongson3_lswc2_format.fr == 0) { /* gssq */ 111 if (!access_ok(addr, 16)) 112 goto sigbus; 113 114 /* write upper 8 bytes first */ 115 value_next = regs->regs[insn.loongson3_lswc2_format.rq]; 116 117 StoreDW(addr + 8, value_next, res); 118 if (res) 119 goto fault; 120 value = regs->regs[insn.loongson3_lswc2_format.rt]; 121 122 StoreDW(addr, value, res); 123 if (res) 124 goto fault; 125 126 compute_return_epc(regs); 127 } else { /* gssqc1 */ 128 if (!access_ok(addr, 16)) 129 goto sigbus; 130 131 lose_fpu(1); 132 value_next = get_fpr64(current->thread.fpu.fpr, 133 insn.loongson3_lswc2_format.rq); 134 135 StoreDW(addr + 8, value_next, res); 136 if (res) 137 goto fault; 138 139 value = get_fpr64(current->thread.fpu.fpr, 140 insn.loongson3_lswc2_format.rt); 141 142 StoreDW(addr, value, res); 143 if (res) 144 goto fault; 145 146 compute_return_epc(regs); 147 own_fpu(1); 148 } 149 return NOTIFY_STOP; /* Don't call default notifier */ 150 151 case CU2_LDC2_OP: 152 switch (insn.loongson3_lsdc2_format.opcode1) { 153 /* 154 * Loongson-3 overridden ldc2 instructions. 155 * opcode1 instruction 156 * 0x1 gslhx: load 2 bytes to GPR 157 * 0x2 gslwx: load 4 bytes to GPR 158 * 0x3 gsldx: load 8 bytes to GPR 159 * 0x6 gslwxc1: load 4 bytes to FPR 160 * 0x7 gsldxc1: load 8 bytes to FPR 161 */ 162 case 0x1: 163 if (!access_ok(addr, 2)) 164 goto sigbus; 165 166 LoadHW(addr, value, res); 167 if (res) 168 goto fault; 169 170 compute_return_epc(regs); 171 regs->regs[insn.loongson3_lsdc2_format.rt] = value; 172 break; 173 case 0x2: 174 if (!access_ok(addr, 4)) 175 goto sigbus; 176 177 LoadW(addr, value, res); 178 if (res) 179 goto fault; 180 181 compute_return_epc(regs); 182 regs->regs[insn.loongson3_lsdc2_format.rt] = value; 183 break; 184 case 0x3: 185 if (!access_ok(addr, 8)) 186 goto sigbus; 187 188 LoadDW(addr, value, res); 189 if (res) 190 goto fault; 191 192 compute_return_epc(regs); 193 regs->regs[insn.loongson3_lsdc2_format.rt] = value; 194 break; 195 case 0x6: 196 die_if_kernel("Unaligned FP access in kernel code", regs); 197 BUG_ON(!used_math()); 198 if (!access_ok(addr, 4)) 199 goto sigbus; 200 201 lose_fpu(1); 202 LoadW(addr, value, res); 203 if (res) 204 goto fault; 205 206 set_fpr64(current->thread.fpu.fpr, 207 insn.loongson3_lsdc2_format.rt, value); 208 compute_return_epc(regs); 209 own_fpu(1); 210 211 break; 212 case 0x7: 213 die_if_kernel("Unaligned FP access in kernel code", regs); 214 BUG_ON(!used_math()); 215 if (!access_ok(addr, 8)) 216 goto sigbus; 217 218 lose_fpu(1); 219 LoadDW(addr, value, res); 220 if (res) 221 goto fault; 222 223 set_fpr64(current->thread.fpu.fpr, 224 insn.loongson3_lsdc2_format.rt, value); 225 compute_return_epc(regs); 226 own_fpu(1); 227 break; 228 229 } 230 return NOTIFY_STOP; /* Don't call default notifier */ 231 232 case CU2_SDC2_OP: 233 switch (insn.loongson3_lsdc2_format.opcode1) { 234 /* 235 * Loongson-3 overridden sdc2 instructions. 236 * opcode1 instruction 237 * 0x1 gsshx: store 2 bytes from GPR 238 * 0x2 gsswx: store 4 bytes from GPR 239 * 0x3 gssdx: store 8 bytes from GPR 240 * 0x6 gsswxc1: store 4 bytes from FPR 241 * 0x7 gssdxc1: store 8 bytes from FPR 242 */ 243 case 0x1: 244 if (!access_ok(addr, 2)) 245 goto sigbus; 246 247 compute_return_epc(regs); 248 value = regs->regs[insn.loongson3_lsdc2_format.rt]; 249 250 StoreHW(addr, value, res); 251 if (res) 252 goto fault; 253 254 break; 255 case 0x2: 256 if (!access_ok(addr, 4)) 257 goto sigbus; 258 259 compute_return_epc(regs); 260 value = regs->regs[insn.loongson3_lsdc2_format.rt]; 261 262 StoreW(addr, value, res); 263 if (res) 264 goto fault; 265 266 break; 267 case 0x3: 268 if (!access_ok(addr, 8)) 269 goto sigbus; 270 271 compute_return_epc(regs); 272 value = regs->regs[insn.loongson3_lsdc2_format.rt]; 273 274 StoreDW(addr, value, res); 275 if (res) 276 goto fault; 277 278 break; 279 280 case 0x6: 281 die_if_kernel("Unaligned FP access in kernel code", regs); 282 BUG_ON(!used_math()); 283 284 if (!access_ok(addr, 4)) 285 goto sigbus; 286 287 lose_fpu(1); 288 value = get_fpr64(current->thread.fpu.fpr, 289 insn.loongson3_lsdc2_format.rt); 290 291 StoreW(addr, value, res); 292 if (res) 293 goto fault; 294 295 compute_return_epc(regs); 296 own_fpu(1); 297 298 break; 299 case 0x7: 300 die_if_kernel("Unaligned FP access in kernel code", regs); 301 BUG_ON(!used_math()); 302 303 if (!access_ok(addr, 8)) 304 goto sigbus; 305 306 lose_fpu(1); 307 value = get_fpr64(current->thread.fpu.fpr, 308 insn.loongson3_lsdc2_format.rt); 309 310 StoreDW(addr, value, res); 311 if (res) 312 goto fault; 313 314 compute_return_epc(regs); 315 own_fpu(1); 316 317 break; 318 } 319 return NOTIFY_STOP; /* Don't call default notifier */ 320 } 321 322 return NOTIFY_OK; /* Let default notifier send signals */ 323 324 fault: 325 /* roll back jump/branch */ 326 regs->regs[31] = ra; 327 regs->cp0_epc = (unsigned long)pc; 328 /* Did we have an exception handler installed? */ 329 if (fixup_exception(regs)) 330 return NOTIFY_STOP; /* Don't call default notifier */ 331 332 die_if_kernel("Unhandled kernel unaligned access", regs); 333 force_sig(SIGSEGV); 334 335 return NOTIFY_STOP; /* Don't call default notifier */ 336 337 sigbus: 338 die_if_kernel("Unhandled kernel unaligned access", regs); 339 force_sig(SIGBUS); 340 341 return NOTIFY_STOP; /* Don't call default notifier */ 342 } 343 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org