From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
devicetree@vger.kernel.org, Stephen Boyd <swboyd@chromium.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Rajendra Nayak <rnayak@codeaurora.org>,
Sibi Sankar <sibis@codeaurora.org>
Subject: Re: [PATCH 5/9] arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoC
Date: Thu, 25 Feb 2021 19:42:19 +0530 [thread overview]
Message-ID: <20210225141219.GB28614@work> (raw)
In-Reply-To: <2e51420bf293e6e82a056a743e5a95f2cc70104c.1614244789.git.saiprakash.ranjan@codeaurora.org>
On Thu, Feb 25, 2021 at 03:00:21PM +0530, Sai Prakash Ranjan wrote:
> Add the IPCC DT node which is used to send and receive IPC
> signals with remoteprocs for SC7280 SoC.
>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index aeeb47c70c3a..65c1e0f2fb56 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/mailbox/qcom-ipcc.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> @@ -315,6 +316,15 @@ gcc: clock-controller@100000 {
> #power-domain-cells = <1>;
> };
>
> + ipcc: mailbox@408000 {
> + compatible = "qcom,sc7280-ipcc", "qcom,ipcc";
> + reg = <0 0x00408000 0 0x1000>;
> + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + #mbox-cells = <2>;
> + };
> +
> qupv3_id_0: geniqup@9c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0 0x009c0000 0 0x2000>;
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>
next prev parent reply other threads:[~2021-02-25 14:13 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-25 9:30 [PATCH 0/9] qcom/sc7280: Enable various hardware blocks on SC7280 SoC Sai Prakash Ranjan
2021-02-25 9:30 ` [PATCH 1/9] dt-bindings: arm: msm: Add LLCC for SC7280 Sai Prakash Ranjan
2021-02-25 19:35 ` Stephen Boyd
2021-03-06 20:47 ` Rob Herring
2021-02-25 9:30 ` [PATCH 2/9] soc: qcom: llcc: Add configuration data " Sai Prakash Ranjan
2021-02-25 9:30 ` [PATCH 3/9] arm64: dts: qcom: sc7280: Add device tree node for LLCC Sai Prakash Ranjan
2021-02-25 19:37 ` Stephen Boyd
2021-02-26 8:04 ` Sai Prakash Ranjan
2021-02-26 18:45 ` Stephen Boyd
2021-02-27 13:58 ` Sai Prakash Ranjan
2021-03-01 4:21 ` Stephen Boyd
2021-02-25 9:30 ` [PATCH 4/9] dt-bindings: mailbox: qcom-ipcc: Add compatible for SC7280 Sai Prakash Ranjan
2021-02-25 14:13 ` Manivannan Sadhasivam
2021-02-25 19:38 ` Stephen Boyd
2021-02-25 9:30 ` [PATCH 5/9] arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoC Sai Prakash Ranjan
2021-02-25 14:12 ` Manivannan Sadhasivam [this message]
2021-02-25 19:38 ` Stephen Boyd
2021-02-25 9:30 ` [PATCH 6/9] dt-bindings: soc: qcom: aoss: Add SC7280 compatible Sai Prakash Ranjan
2021-02-25 19:40 ` Stephen Boyd
2021-03-06 20:53 ` Rob Herring
2021-02-25 9:30 ` [PATCH 7/9] soc: qcom: aoss: Add AOSS QMP support for SC7280 Sai Prakash Ranjan
2021-02-25 19:40 ` Stephen Boyd
2021-02-25 9:30 ` [PATCH 8/9] arm64: dts: qcom: sc7280: Add AOSS QMP node Sai Prakash Ranjan
2021-02-25 19:41 ` Stephen Boyd
2021-02-26 7:51 ` Sai Prakash Ranjan
2021-02-26 18:46 ` Stephen Boyd
2021-02-27 13:56 ` Sai Prakash Ranjan
2021-03-09 5:58 ` Sibi Sankar
2021-03-23 3:38 ` Stephen Boyd
2021-03-24 7:05 ` Sibi Sankar
2021-02-25 9:30 ` [PATCH 9/9] arm64: dts: qcom: sc7280: Add Coresight support Sai Prakash Ranjan
2021-03-11 23:14 ` [PATCH 0/9] qcom/sc7280: Enable various hardware blocks on SC7280 SoC Bjorn Andersson
2021-03-14 19:05 ` Sai Prakash Ranjan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210225141219.GB28614@work \
--to=manivannan.sadhasivam@linaro.org \
--cc=agross@kernel.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=rnayak@codeaurora.org \
--cc=saiprakash.ranjan@codeaurora.org \
--cc=sibis@codeaurora.org \
--cc=swboyd@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).