From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-msm@vger.kernel.org
Cc: bhupesh.sharma@linaro.org,
Thara Gopinath <thara.gopinath@linaro.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
bhupesh.linux@gmail.com
Subject: [PATCH 8/8] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine.
Date: Wed, 10 Mar 2021 10:55:03 +0530 [thread overview]
Message-ID: <20210310052503.3618486-9-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20210310052503.3618486-1-bhupesh.sharma@linaro.org>
Add crypto engine (CE) and CE BAM related nodes and definitions to
"sm8250.dtsi".
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 36 ++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 947e1accae3a..4f7482dbc2bf 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3744,6 +3744,42 @@ cpufreq_hw: cpufreq@18591000 {
#freq-domain-cells = <1>;
};
+
+ cryptobam: dma@1dc4000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rpmhcc RPMH_CE_CLK>;
+ clock-names = "bam_clk";
+ num-channels = <2>;
+ qcom,num-ees = <1>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely = <1>;
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x592 0>,
+ <&apps_smmu 0x598 0>,
+ <&apps_smmu 0x599 0>,
+ <&apps_smmu 0x59F 0>;
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,crypto-v5.5";
+ reg = <0 0x01dfa000 0 0x6000>;
+ clocks = <&gcc GCC_CE1_AHB_CLK>,
+ <&gcc GCC_CE1_AHB_CLK>,
+ <&rpmhcc RPMH_CE_CLK>;
+ clock-names = "iface", "bus", "core";
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x584 0x0011>,
+ <&apps_smmu 0x594 0x0011>,
+ <&apps_smmu 0x592 0>,
+ <&apps_smmu 0x598 0>,
+ <&apps_smmu 0x599 0>,
+ <&apps_smmu 0x59F 0>;
+ };
};
timer {
--
2.29.2
prev parent reply other threads:[~2021-03-10 5:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 5:24 [PATCH 0/8] Enable Qualcomm Crypto Engine on sm8250 Bhupesh Sharma
2021-03-10 5:24 ` [PATCH 1/8] dt-bindings: qcom-qce: Add 'iommus' to required properties Bhupesh Sharma
2021-03-10 5:24 ` [PATCH 2/8] dt-bindings: crypto : Add new compatible strings for qcom-qce Bhupesh Sharma
2021-03-16 22:28 ` Rob Herring
2021-03-17 13:20 ` Bhupesh Sharma
2021-03-17 14:25 ` Thara Gopinath
2021-03-10 5:24 ` [PATCH 3/8] arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly Bhupesh Sharma
2021-03-10 5:24 ` [PATCH 4/8] dt-bindings/clock: qcom: sm8250: Add gcc clocks for sm8250 crypto block Bhupesh Sharma
[not found] ` <161567012068.1478170.1203237376997442299@swboyd.mtv.corp.google.com>
2021-03-15 7:01 ` Bhupesh Sharma
2021-03-10 5:25 ` [PATCH 5/8] clk: qcom: clk-rpmh: Add CE clock on sm8250 Bhupesh Sharma
2021-03-10 5:25 ` [PATCH 6/8] clk: qcom: Add gcc clocks for crypto block " Bhupesh Sharma
2021-03-10 5:25 ` [PATCH 7/8] drivers: crypto: qce: Enable support for crypto engine " Bhupesh Sharma
2021-03-10 5:25 ` Bhupesh Sharma [this message]
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