From: Jiuyang Liu <liu@jiuyang.me>
To: unlisted-recipients:; (no To-header on input)
Cc: Andrew Waterman <waterman@eecs.berkeley.edu>,
Jiuyang Liu <liu@jiuyang.me>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atish.patra@wdc.com>,
Andrew Morton <akpm@linux-foundation.org>,
Anup Patel <anup.patel@wdc.com>,
Kefeng Wang <wangkefeng.wang@huawei.com>,
Mike Rapoport <rppt@kernel.org>,
Greentime Hu <greentime.hu@sifive.com>,
Zong Li <zong.li@sifive.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/2] Bug Fix for last patch
Date: Tue, 16 Mar 2021 01:53:25 +0000 [thread overview]
Message-ID: <20210316015328.13516-1-liu@jiuyang.me> (raw)
In-Reply-To: <20210310062250.74583-1-liu@jiuyang.me>
Sorry for the noise, Andrew gave me feedbacks, and pointed two bugs in
last patch.
1. asid should be thread safe, which is not the intent.
2. asid extracting logic was wrong.
This patch fixes these bugs.
Signed-off-by: Jiuyang Liu <liu@jiuyang.me>
---
arch/riscv/include/asm/tlbflush.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h
index 4b25f51f163d..1f9b62b3670b 100644
--- a/arch/riscv/include/asm/tlbflush.h
+++ b/arch/riscv/include/asm/tlbflush.h
@@ -22,10 +22,14 @@ static inline void local_flush_tlb_page(unsigned long addr)
__asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory");
}
-static unsigned long asid;
+static inline unsigned long get_current_asid(void)
+{
+ return (csr_read(CSR_SATP) >> SATP_ASID_SHIFT) & SATP_ASID_MASK;
+}
+
static inline void local_flush_tlb_asid(void)
{
- asid = csr_read(CSR_SATP) | (SATP_ASID_MASK << SATP_ASID_SHIFT);
+ unsigned long asid = get_current_asid();
__asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (asid) : "memory");
}
--
2.30.2
next prev parent reply other threads:[~2021-03-16 1:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 6:22 [PATCH] Insert SFENCE.VMA in function set_pte_at for RISCV Jiuyang
2021-03-16 1:53 ` Jiuyang Liu [this message]
2021-03-16 3:15 ` [PATCH 2/2] Bug Fix for last patch Yixun Lan
2021-03-16 3:40 ` Andrew Morton
2021-03-16 3:46 ` [PATCH] Insert SFENCE.VMA in function set_pte_at for RISCV Jiuyang Liu
2021-03-16 5:05 ` Anup Patel
2021-03-16 6:56 ` Jiuyang Liu
2021-03-16 7:32 ` Anup Patel
2021-03-16 8:29 ` Andrew Waterman
2021-03-16 8:40 ` Anup Patel
2021-03-16 12:05 ` Alex Ghiti
2021-03-16 22:03 ` Andrew Waterman
2021-03-18 2:10 ` Jiuyang Liu
2021-03-19 7:14 ` Alex Ghiti
2021-03-30 23:35 ` Palmer Dabbelt
2021-03-17 4:17 ` Palmer Dabbelt
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