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From: "Pali Rohár" <pali@kernel.org>
To: Jianjun Wang <jianjun.wang@mediatek.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Amey Narkhede <ameynarkhede03@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	maz@kernel.org, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Sj Huang <sj.huang@mediatek.com>,
	youlin.pei@mediatek.com, chuanjia.liu@mediatek.com,
	qizhong.cheng@mediatek.com, sin_jieyang@mediatek.com,
	drinkcat@chromium.org, Rex-BC.Chen@mediatek.com,
	anson.chuang@mediatek.com
Subject: Re: [v8,3/7] PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
Date: Tue, 23 Mar 2021 15:51:24 +0100	[thread overview]
Message-ID: <20210323145124.6myowqcjga5ro2pn@pali> (raw)
In-Reply-To: <1616463094.25961.8.camel@mhfsdcap03>

On Tuesday 23 March 2021 09:31:34 Jianjun Wang wrote:
> One more question, is there any chance that we can put this linkup flow
> to a more "standard" way, such as drivers provides the ops of the PERST#
> pin and let the framework to decide how to start a link training, or we
> just use macro to replace this timeout value in the future?

This is something about which I was thinking that could be useful for
pci-aardvark.c driver. But I was not sure if some other driver can
benefit from such "framework". But now I see that your driver is another
candidate which can benefit from it.

Currently there is no such "framework" in kernel and the hardest part
would be to design it.

Having this API would allow kernel to implement and export PCIe Warm
Reset (which is done via PERST# signal) and easily extend Amey's reset
patches to export also Warm Reset via sysfs.

But to implement this framework and using it for reset we first need to
answer questions which I have sent in email:
https://lore.kernel.org/linux-pci/20210310110535.zh4pnn4vpmvzwl5q@pali/

Bjorn, Alex: any opinion about PERST#?

Also see Enrico's email, where confirmed that there are platforms which
shares one PERST# signal for more endpoint cards:
https://lore.kernel.org/linux-pci/1da0fa2c-8056-9ae8-6ce4-ab645317772d@metux.net/

  reply	other threads:[~2021-03-23 14:52 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24  6:11 [v8,0/7] PCI: mediatek: Add new generation controller support Jianjun Wang
2021-02-24  6:11 ` [v8,1/7] dt-bindings: PCI: mediatek-gen3: Add YAML schema Jianjun Wang
2021-03-06 20:09   ` Rob Herring
2021-02-24  6:11 ` [v8,2/7] PCI: Export pci_pio_to_address() for module use Jianjun Wang
2021-02-24  6:11 ` [v8,3/7] PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 Jianjun Wang
2021-02-24 13:36   ` Krzysztof Wilczyński
2021-02-25  3:07     ` Jianjun Wang
2021-03-11 12:38   ` Pali Rohár
2021-03-13  7:43     ` Jianjun Wang
2021-03-18  0:02       ` Pali Rohár
2021-03-18  5:48         ` Jianjun Wang
2021-03-19 18:53           ` Pali Rohár
2021-03-23  1:31             ` Jianjun Wang
2021-03-23 14:51               ` Pali Rohár [this message]
2021-03-29 22:58           ` Pali Rohár
2021-02-24  6:11 ` [v8,4/7] PCI: mediatek-gen3: Add INTx support Jianjun Wang
2021-02-24 14:24   ` Krzysztof Wilczyński
2021-02-25  3:10     ` Jianjun Wang
2021-03-09 11:10   ` Marc Zyngier
2021-03-10  3:05     ` Jianjun Wang
2021-02-24  6:11 ` [v8,5/7] PCI: mediatek-gen3: Add MSI support Jianjun Wang
2021-02-24 14:31   ` Krzysztof Wilczyński
2021-02-25  3:09     ` Jianjun Wang
2021-03-09 11:23   ` Marc Zyngier
2021-03-10  6:48     ` Jianjun Wang
     [not found]       ` <87a6rbxs4w.wl-maz@kernel.org>
2021-03-11  9:47         ` Jianjun Wang
2021-03-11  0:05   ` Pali Rohár
2021-03-11  8:19     ` Marc Zyngier
2021-03-11  9:50       ` Jianjun Wang
2021-02-24  6:11 ` [v8,6/7] PCI: mediatek-gen3: Add system PM support Jianjun Wang
2021-02-24 14:10   ` Krzysztof Wilczyński
2021-02-25  3:34     ` Jianjun Wang
2021-02-25 22:00       ` Krzysztof Wilczyński
2021-02-26 10:06         ` Jianjun Wang
2021-02-24  6:11 ` [v8,7/7] MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer Jianjun Wang

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