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From: Alain Volmat <avolmat@me.com>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Lee Jones <lee.jones@linaro.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Alain Volmat <avolmat@me.com>
Subject: [PATCH v2 14/16] ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
Date: Thu, 25 Mar 2021 08:50:16 +0100	[thread overview]
Message-ID: <20210325075018.6598-15-avolmat@me.com> (raw)
In-Reply-To: <20210325075018.6598-1-avolmat@me.com>

The clkgen-fsyn driver now embed the clock names (assuming the
right compatible is used). Remove all clock-output-names property
and update when necessary the compatible.

Signed-off-by: Alain Volmat <avolmat@me.com>
---
 arch/arm/boot/dts/stih407-clock.dtsi | 27 +++------------------------
 1 file changed, 3 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi
index 2603226a6ca8..9cce9541e26b 100644
--- a/arch/arm/boot/dts/stih407-clock.dtsi
+++ b/arch/arm/boot/dts/stih407-clock.dtsi
@@ -93,12 +93,6 @@
 			reg = <0x9103000 0x1000>;
 
 			clocks = <&clk_sysin>;
-
-			clock-output-names = "clk-s-c0-fs0-ch0",
-					     "clk-s-c0-fs0-ch1",
-					     "clk-s-c0-fs0-ch2",
-					     "clk-s-c0-fs0-ch3";
-			clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
 		};
 
 		clk_s_c0: clockgen-c@9103000 {
@@ -150,15 +144,10 @@
 
 		clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {
 			#clock-cells = <1>;
-			compatible = "st,quadfs";
+			compatible = "st,quadfs-d0";
 			reg = <0x9104000 0x1000>;
 
 			clocks = <&clk_sysin>;
-
-			clock-output-names = "clk-s-d0-fs0-ch0",
-					     "clk-s-d0-fs0-ch1",
-					     "clk-s-d0-fs0-ch2",
-					     "clk-s-d0-fs0-ch3";
 		};
 
 		clockgen-d0@9104000 {
@@ -179,15 +168,10 @@
 
 		clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {
 			#clock-cells = <1>;
-			compatible = "st,quadfs";
+			compatible = "st,quadfs-d2";
 			reg = <0x9106000 0x1000>;
 
 			clocks = <&clk_sysin>;
-
-			clock-output-names = "clk-s-d2-fs0-ch0",
-					     "clk-s-d2-fs0-ch1",
-					     "clk-s-d2-fs0-ch2",
-					     "clk-s-d2-fs0-ch3";
 		};
 
 		clockgen-d2@9106000 {
@@ -210,15 +194,10 @@
 
 		clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {
 			#clock-cells = <1>;
-			compatible = "st,quadfs";
+			compatible = "st,quadfs-d3";
 			reg = <0x9107000 0x1000>;
 
 			clocks = <&clk_sysin>;
-
-			clock-output-names = "clk-s-d3-fs0-ch0",
-					     "clk-s-d3-fs0-ch1",
-					     "clk-s-d3-fs0-ch2",
-					     "clk-s-d3-fs0-ch3";
 		};
 
 		clockgen-d3@9107000 {
-- 
2.17.1


  parent reply	other threads:[~2021-03-25  7:53 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-25  7:50 [PATCH v2 00/16] clk: st: embed clock outputs within drivers Alain Volmat
2021-03-25  7:50 ` [PATCH v2 01/16] clk: st: clkgen-pll: remove used variable of struct clkgen_pll Alain Volmat
2021-03-25  7:50 ` [PATCH v2 02/16] clk: st: flexgen: embed soc clock outputs within compatible data Alain Volmat
2021-03-25  7:50 ` [PATCH v2 03/16] dt-bindings: clock: st: flexgen: add new introduced compatible Alain Volmat
2021-03-27 17:43   ` Rob Herring
2021-03-25  7:50 ` [PATCH v2 04/16] clk: st: clkgen-pll: embed soc clock outputs within compatible data Alain Volmat
2021-03-25  7:50 ` [PATCH v2 05/16] dt-bindings: clock: st: clkgen-pll: add new introduced compatible Alain Volmat
2021-03-27 17:46   ` Rob Herring
2021-03-25  7:50 ` [PATCH v2 06/16] clk: st: clkgen-fsyn: embed soc clock outputs within compatible data Alain Volmat
2021-03-25  7:50 ` [PATCH v2 07/16] dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible Alain Volmat
2021-03-25  7:50 ` [PATCH v2 08/16] ARM: dts: sti: update flexgen compatible within stih418-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 09/16] ARM: dts: sti: update flexgen compatible within stih407-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 10/16] ARM: dts: sti: update flexgen compatible within stih410-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 11/16] ARM: dts: sti: update clkgen-pll entries in stih407-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 12/16] ARM: dts: sti: update clkgen-pll entries in stih410-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 13/16] ARM: dts: sti: update clkgen-pll entries in stih418-clock Alain Volmat
2021-03-25  7:50 ` Alain Volmat [this message]
2021-03-25  7:50 ` [PATCH v2 15/16] ARM: dts: sti: update clkgen-fsyn entries in stih410-clock Alain Volmat
2021-03-25  7:50 ` [PATCH v2 16/16] ARM: dts: sti: update clkgen-fsyn entries in stih418-clock Alain Volmat
2021-03-30  2:01 ` [PATCH v2 00/16] clk: st: embed clock outputs within drivers Stephen Boyd

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