From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFBECC433E3 for ; Fri, 26 Mar 2021 06:26:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8D4DC61A69 for ; Fri, 26 Mar 2021 06:26:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230274AbhCZG0d (ORCPT ); Fri, 26 Mar 2021 02:26:33 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:14485 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230146AbhCZGZs (ORCPT ); Fri, 26 Mar 2021 02:25:48 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4F6BkR0RpgzyP0l; Fri, 26 Mar 2021 14:23:43 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.179.202) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.498.0; Fri, 26 Mar 2021 14:25:34 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Joerg Roedel" , linux-arm-kernel , iommu , linux-kernel , Yong Wu , "Matthias Brugger" , linux-mediatek , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "David Woodhouse" , Lu Baolu CC: Zhen Lei Subject: [PATCH 8/8] iommu/vt-d: fix a couple of spelling mistakes Date: Fri, 26 Mar 2021 14:24:12 +0800 Message-ID: <20210326062412.1262-9-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210326062412.1262-1-thunder.leizhen@huawei.com> References: <20210326062412.1262-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.174.179.202] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are several spelling mistakes, as follows: guarentees ==> guarantees resgister ==> register insufficent ==> insufficient creats ==> creates tabke ==> take Signed-off-by: Zhen Lei --- drivers/iommu/intel/dmar.c | 6 +++--- drivers/iommu/intel/iommu.c | 2 +- drivers/iommu/intel/irq_remapping.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c index d5c51b5c20aff4b..bb6f0880f6f4db0 100644 --- a/drivers/iommu/intel/dmar.c +++ b/drivers/iommu/intel/dmar.c @@ -45,7 +45,7 @@ struct dmar_res_callback { /* * Assumptions: - * 1) The hotplug framework guarentees that DMAR unit will be hot-added + * 1) The hotplug framework guarantees that DMAR unit will be hot-added * before IO devices managed by that unit. * 2) The hotplug framework guarantees that DMAR unit will be hot-removed * after IO devices managed by that unit. @@ -960,10 +960,10 @@ static void unmap_iommu(struct intel_iommu *iommu) /** * map_iommu: map the iommu's registers * @iommu: the iommu to map - * @phys_addr: the physical address of the base resgister + * @phys_addr: the physical address of the base register * * Memory map the iommu's registers. Start w/ a single page, and - * possibly expand if that turns out to be insufficent. + * possibly expand if that turns out to be insufficient. */ static int map_iommu(struct intel_iommu *iommu, u64 phys_addr) { diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index ee0932307d646bb..f9a2277fba99f9f 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -288,7 +288,7 @@ static inline void context_clear_entry(struct context_entry *context) /* * This domain is a statically identity mapping domain. - * 1. This domain creats a static 1:1 mapping to all usable memory. + * 1. This domain creates a static 1:1 mapping to all usable memory. * 2. It maps to each iommu if successful. * 3. Each iommu mapps to this domain if successful. */ diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c index 611ef5243cb63b9..12e9f2cf84e5101 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -74,7 +74,7 @@ struct intel_ir_data { * ->iommu->register_lock * Note: * intel_irq_remap_ops.{supported,prepare,enable,disable,reenable} are called - * in single-threaded environment with interrupt disabled, so no need to tabke + * in single-threaded environment with interrupt disabled, so no need to take * the dmar_global_lock. */ DEFINE_RAW_SPINLOCK(irq_2_ir_lock); -- 1.8.3