From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC774C433B4 for ; Mon, 5 Apr 2021 16:06:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 97348613B8 for ; Mon, 5 Apr 2021 16:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238923AbhDEQGd (ORCPT ); Mon, 5 Apr 2021 12:06:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:56730 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242214AbhDEQFI (ORCPT ); Mon, 5 Apr 2021 12:05:08 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 30CEF613D5; Mon, 5 Apr 2021 16:05:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1617638702; bh=mIpMHbgtarwGrt6vg+yVjTI4jWbgZVAP5Q+APwJgb44=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sqcdWKJegYtVLOhrH4XKG5WcJsTc5x2+9zHZFXBjHBS/3w0uBKDvg5jsVrZCIm7Ak rVspe6C9hd9toI7O/I6SOtJTSsdDe10YTJj+lny7+9KaHr3SO7bzr0Krnv4+8b5WAt qcpGtxW0iBUhSsPtO9HkANCvHvbxp9M27SP446D3fnTPRNqwl2YSbd0TVNf3WtHXCl SPWWQpqekderuY/BRw59wodplpeohBkCbf6ST6prDTe67WpYi8dSRo3kGmiY2Oncxr g3fOqZOCBuHgIMnGZBzSiHv0Oi/k71ez+CJAHbTI8KCDa7MLjBZOcqv3HEFYqeBLM8 aIOlAbb5BA+OQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Suzuki K Poulose , Will Deacon , Catalin Marinas , Mark Rutland , Marc Zyngier , Sasha Levin , linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.4 02/13] KVM: arm64: Hide system instruction access to Trace registers Date: Mon, 5 Apr 2021 12:04:47 -0400 Message-Id: <20210405160459.268794-2-sashal@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210405160459.268794-1-sashal@kernel.org> References: <20210405160459.268794-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suzuki K Poulose [ Upstream commit 1d676673d665fd2162e7e466dcfbe5373bfdb73e ] Currently we advertise the ID_AA6DFR0_EL1.TRACEVER for the guest, when the trace register accesses are trapped (CPTR_EL2.TTA == 1). So, the guest will get an undefined instruction, if trusts the ID registers and access one of the trace registers. Lets be nice to the guest and hide the feature to avoid unexpected behavior. Even though this can be done at KVM sysreg emulation layer, we do this by removing the TRACEVER from the sanitised feature register field. This is fine as long as the ETM drivers can handle the individual trace units separately, even when there are differences among the CPUs. Cc: Will Deacon Cc: Catalin Marinas Cc: Mark Rutland Signed-off-by: Suzuki K Poulose Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20210323120647.454211-2-suzuki.poulose@arm.com Signed-off-by: Sasha Levin --- arch/arm64/kernel/cpufeature.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 79caab15ccbf..acdef8d76c64 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -277,7 +277,6 @@ static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = { * of support. */ S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_EXACT, ID_AA64DFR0_PMUVER_SHIFT, 4, 0), - ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_TRACEVER_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64DFR0_DEBUGVER_SHIFT, 4, 0x6), ARM64_FTR_END, }; -- 2.30.2