linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <mani@kernel.org>
To: Jarvis Jiang <jarvis.w.jiang@gmail.com>
Cc: hemantk@codeaurora.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, cchen50@lenovo.com,
	mpearson@lenovo.com
Subject: Re: [PATCH] bus: mhi: pci_generic: Introduce Foxconn T99W175 support
Date: Wed, 7 Apr 2021 12:16:41 +0530	[thread overview]
Message-ID: <20210407064641.GH8675@work> (raw)
In-Reply-To: <20210407025029.2616-1-jarvis.w.jiang@gmail.com>

On Tue, Apr 06, 2021 at 07:50:29PM -0700, Jarvis Jiang wrote:
> Add support for T99W175 modems, this modem series is based on SDX55
> qcom chip. The modem is mainly based on MBIM protocol for both the
> data and control path.
> 

List the modems whose support is being added.

> This patch was tested with Ubuntu 20.04 X86_64 PC as host
> 
> Signed-off-by: Jarvis Jiang <jarvis.w.jiang@gmail.com>
> ---
>  drivers/bus/mhi/pci_generic.c | 58 +++++++++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index 5cf44bcfe040..3e396c65a758 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -260,6 +260,52 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
>  	.dma_data_width = 32
>  };
>  
> +static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
> +	MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(4, "DIAG", 32, 1),
> +	MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 1),
> +	MHI_CHANNEL_CONFIG_UL(12, "MBIM", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(16, "QMI1", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(17, "QMI1", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(18, "IP_CTRL", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(19, "IP_CTRL", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(20, "IPCR", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(21, "IPCR", 32, 0),
> +	MHI_CHANNEL_CONFIG_UL(32, "AT", 32, 0),
> +	MHI_CHANNEL_CONFIG_DL(33, "AT", 32, 0),
> +	MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
> +	MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
> +};
> +
> +static struct mhi_event_config mhi_foxconn_sdx55_events[] = {
> +	MHI_EVENT_CONFIG_CTRL(0, 128),
> +	MHI_EVENT_CONFIG_DATA(1, 128),
> +	MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
> +	MHI_EVENT_CONFIG_HW_DATA(3, 1024, 101)
> +};
> +
> +static struct mhi_controller_config modem_foxconn_sdx55_config = {
> +	.max_channels = 128,
> +	.timeout_ms = 20000,
> +	.num_channels = ARRAY_SIZE(mhi_foxconn_sdx55_channels),
> +	.ch_cfg = mhi_foxconn_sdx55_channels,
> +	.num_events = ARRAY_SIZE(mhi_foxconn_sdx55_events),
> +	.event_cfg = mhi_foxconn_sdx55_events,
> +};
> +
> +static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
> +	.name = "foxconn-sdx55",
> +	.fw = "qcom/sdx55m/sbl1.mbn",
> +	.edl = "qcom/sdx55m/edl.mbn",
> +	.config = &modem_foxconn_sdx55_config,
> +	.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> +	.dma_data_width = 32
> +};
> +
>  static const struct pci_device_id mhi_pci_id_table[] = {
>  	{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306),
>  		.driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info },
> @@ -269,6 +315,18 @@ static const struct pci_device_id mhi_pci_id_table[] = {
>  		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
>  	{ PCI_DEVICE(0x1eac, 0x1002), /* EM160R-GL (sdx24) */
>  		.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
> +	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab), /* T99W175 (sdx55) */
> +		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
> +	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b2), /* T99W175 (sdx55) */
> +		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
> +	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b3), /* T99W175 (sdx55) */
> +		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },

Please add a comment about these devices as you did below. Using T99W175 (sdx55)
for all is not sufficient.

Thanks,
Mani

> +	/* DW5930e (sdx55), With eSIM, It's also T99W175 */
> +	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b0),
> +		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
> +	/* DW5930e (sdx55), Non-eSIM, It's also T99W175 */
> +	{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b1),
> +		.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
>  	{  }
>  };
>  MODULE_DEVICE_TABLE(pci, mhi_pci_id_table);
> -- 
> 2.25.1
> 

  reply	other threads:[~2021-04-07  6:46 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-07  2:50 [PATCH] bus: mhi: pci_generic: Introduce Foxconn T99W175 support Jarvis Jiang
2021-04-07  6:46 ` Manivannan Sadhasivam [this message]
2021-04-07  8:16   ` Jarvis Jiang
2021-04-07  8:30 ` Loic Poulain
2021-04-08  6:10   ` Jarvis Jiang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210407064641.GH8675@work \
    --to=mani@kernel.org \
    --cc=cchen50@lenovo.com \
    --cc=hemantk@codeaurora.org \
    --cc=jarvis.w.jiang@gmail.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mpearson@lenovo.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).