From: Rob Herring <robh@kernel.org>
To: bpeled@marvell.com
Cc: thomas.petazzoni@bootlin.com, lorenzo.pieralisi@arm.com,
bhelgaas@google.com, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, sebastian.hesselbarth@gmail.com,
gregory.clement@bootlin.com, andrew@lunn.ch, mw@semihalf.com,
jaz@semihalf.com, kostap@marvell.com, nadavh@marvell.com,
stefanc@marvell.com, oferh@marvell.com
Subject: Re: [”PATCH” 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings
Date: Tue, 13 Apr 2021 10:10:13 -0500 [thread overview]
Message-ID: <20210413151013.GA1683364@robh.at.kernel.org> (raw)
In-Reply-To: <1618241456-27200-4-git-send-email-bpeled@marvell.com>
On Mon, Apr 12, 2021 at 06:30:54PM +0300, bpeled@marvell.com wrote:
> From: Ben Peled <bpeled@marvell.com>
>
> Adding optional system-controller and mac-reset-bit-mask
> needed for linkdown procedure.
>
> Signed-off-by: Ben Peled <bpeled@marvell.com>
> ---
> Documentation/devicetree/bindings/pci/pci-armada8k.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> index 7a813d0..2696e79 100644
> --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt
> @@ -24,6 +24,10 @@ Optional properties:
> - phy-names: names of the PHYs corresponding to the number of lanes.
> Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
> 2 PHYs.
> +- marvell,system-controller: address of system controller needed
> + in order to reset MAC used by link-down handle
> +- marvell,mac-reset-bit-mask: MAC reset bit of system controller
> + needed in order to reset MAC used by link-down handle
Seems like this should use the reset controller binding instead.
If not, this can be a single property with a phandle plus arg.
Rob
next prev parent reply other threads:[~2021-04-13 15:10 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-12 15:30 [”PATCH” 0/5] Asynchronous linkdown recovery bpeled
2021-04-12 15:30 ` [”PATCH” 1/5] PCI: armada8k: Disable LTSSM on link down interrupts bpeled
2021-04-12 15:30 ` [”PATCH” 2/5] PCI: armada8k: Add link-down handle bpeled
2021-04-14 12:42 ` Jonathan Cameron
2021-04-27 7:07 ` [EXT] " Ben Peled
2021-04-12 15:30 ` [”PATCH” 3/5] dt-bindings: pci: add system controller and MAC reset bit to Armada 7K/8K controller bindings bpeled
2021-04-13 15:10 ` Rob Herring [this message]
2021-04-26 15:58 ` [EXT] " Ben Peled
2021-04-12 15:30 ` [”PATCH” 4/5] arm64: dts: marvell: add pcie mac reset to pcie bpeled
2021-04-12 15:30 ` [”PATCH” 5/5] PCI: armada8k: add device reset to link-down handle bpeled
2021-04-13 10:14 ` [”PATCH” 0/5] Asynchronous linkdown recovery Ben Peled
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210413151013.GA1683364@robh.at.kernel.org \
--to=robh@kernel.org \
--cc=andrew@lunn.ch \
--cc=bhelgaas@google.com \
--cc=bpeled@marvell.com \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=jaz@semihalf.com \
--cc=kostap@marvell.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mw@semihalf.com \
--cc=nadavh@marvell.com \
--cc=oferh@marvell.com \
--cc=sebastian.hesselbarth@gmail.com \
--cc=stefanc@marvell.com \
--cc=thomas.petazzoni@bootlin.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).