From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>,
<linux@armlinux.org.uk>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH v3 10/24] ARM: at91: sfrbu: add sfrbu registers definitions for sama7g5
Date: Thu, 15 Apr 2021 13:49:56 +0300 [thread overview]
Message-ID: <20210415105010.569620-11-claudiu.beznea@microchip.com> (raw)
In-Reply-To: <20210415105010.569620-1-claudiu.beznea@microchip.com>
Add SFRBU registers definitions for SAMA7G5.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
include/soc/at91/sama7-sfrbu.h | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 include/soc/at91/sama7-sfrbu.h
diff --git a/include/soc/at91/sama7-sfrbu.h b/include/soc/at91/sama7-sfrbu.h
new file mode 100644
index 000000000000..76b740810d34
--- /dev/null
+++ b/include/soc/at91/sama7-sfrbu.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Microchip SAMA7 SFRBU registers offsets and bit definitions.
+ *
+ * Copyright (C) [2020] Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Claudu Beznea <claudiu.beznea@microchip.com>
+ */
+
+#ifndef __SAMA7_SFRBU_H__
+#define __SAMA7_SFRBU_H__
+
+#ifdef CONFIG_SOC_SAMA7
+
+#define AT91_SFRBU_PSWBU (0x00) /* SFRBU Power Switch BU Control Register */
+#define AT91_SFRBU_PSWBU_PSWKEY (0x4BD20C << 8) /* Specific value mandatory to allow writing of other register bits */
+#define AT91_SFRBU_PSWBU_STATE (1 << 2) /* Power switch BU state */
+#define AT91_SFRBU_PSWBU_SOFTSWITCH (1 << 1) /* Power switch BU source selection */
+#define AT91_SFRBU_PSWBU_CTRL (1 << 0) /* Power switch BU control */
+
+#define AT91_SFRBU_25LDOCR (0x0C) /* SFRBU 2.5V LDO Control Register */
+#define AT91_SFRBU_25LDOCR_LDOANAKEY (0x3B6E18 << 8) /* Specific value mandatory to allow writing of other register bits. */
+#define AT91_SFRBU_25LDOCR_STATE (1 << 3) /* LDOANA Switch On/Off Control */
+#define AT91_SFRBU_25LDOCR_LP (1 << 2) /* LDOANA Low-Power Mode Control */
+#define AT91_SFRBU_PD_VALUE_MSK (0x3)
+#define AT91_SFRBU_25LDOCR_PD_VALUE(v) ((v) & AT91_SFRBU_PD_VALUE_MSK) /* LDOANA Pull-down value */
+
+#define AT91_FRBU_DDRPWR (0x10) /* SFRBU DDR Power Control Register */
+#define AT91_FRBU_DDRPWR_STATE (1 << 0) /* DDR Power Mode State */
+
+#endif /* CONFIG_SOC_SAMA7 */
+
+#endif /* __SAMA7_SFRBU_H__ */
+
--
2.25.1
next prev parent reply other threads:[~2021-04-15 10:51 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-15 10:49 [PATCH v3 00/24] ARM: at91: pm: add support for sama7g5 Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 01/24] ARM: at91: pm: move pm_bu to soc_pm data structure Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 02/24] ARM: at91: pm: move the setup of soc_pm.bu->suspended Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 03/24] ARM: at91: pm: document at91_soc_pm structure Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 04/24] ARM: at91: pm: check for different controllers in at91_pm_modes_init() Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 05/24] ARM: at91: pm: do not initialize pdev Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 06/24] ARM: at91: pm: use r7 instead of tmp1 Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 07/24] ARM: at91: pm: avoid push and pop on stack while memory is in self-refersh Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 08/24] ARM: at91: pm: s/CONFIG_SOC_SAM9X60/CONFIG_HAVE_AT91_SAM9X60_PLL/g Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 09/24] ARM: at91: pm: add support for waiting MCK1..4 Claudiu Beznea
2021-04-15 10:49 ` Claudiu Beznea [this message]
2021-04-15 10:49 ` [PATCH v3 11/24] ARM: at91: ddr: add registers definitions for sama7g5's ddr Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 12/24] ARM: at91: pm: add self-refresh support for sama7g5 Claudiu Beznea
2021-04-15 10:49 ` [PATCH v3 13/24] ARM: at91: pm: add support for MCK1..4 save/restore for ulp modes Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 14/24] ARM: at91: pm: add support for 2.5V LDO regulator control Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 15/24] ARM: at91: pm: wait for ddr power mode off Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 16/24] dt-bindings: atmel-sysreg: add bindings for sama7g5 Claudiu Beznea
2021-04-15 20:59 ` Rob Herring
2021-04-15 10:50 ` [PATCH v3 17/24] ARM: at91: pm: add sama7g5 ddr controller Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 18/24] ARM: at91: pm: add sama7g5 ddr phy controller Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 19/24] ARM: at91: pm: save ddr phy calibration data to securam Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 20/24] ARM: at91: pm: add backup mode support for SAMA7G5 Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 21/24] ARM: at91: pm: add sama7g5's pmc Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 22/24] ARM: at91: sama7: introduce sama7 SoC family Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 23/24] ARM: at91: pm: add pm support for SAMA7G5 Claudiu Beznea
2021-04-15 10:50 ` [PATCH v3 24/24] ARM: at91: pm: add sama7g5 shdwc Claudiu Beznea
2021-07-16 18:03 ` [PATCH v3 00/24] ARM: at91: pm: add support for sama7g5 Nicolas Ferre
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