From: Nava kishore Manne <nava.manne@xilinx.com>
To: <robh+dt@kernel.org>, <michal.simek@xilinx.com>, <mdf@kernel.org>,
<trix@redhat.com>, <nava.manne@xilinx.com>,
<gregkh@linuxfoundation.org>, <arnd@arndb.de>,
<rajan.vaja@xilinx.com>, <amit.sunil.dhamne@xilinx.com>,
<manish.narani@xilinx.com>, <zou_wei@huawei.com>,
<lakshmi.sai.krishna.potthuri@xilinx.com>, <iwamatsu@nigauri.org>,
<wendy.liang@xilinx.com>, <linus.walleij@linaro.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-fpga@vger.kernel.org>,
<chinnikishore369@gmail.com>, <git@xilinx.com>
Subject: [PATCH v4 2/4] drivers: firmware: Add PDI load API support
Date: Thu, 29 Apr 2021 19:34:06 +0530 [thread overview]
Message-ID: <20210429140408.23194-3-nava.manne@xilinx.com> (raw)
In-Reply-To: <20210429140408.23194-1-nava.manne@xilinx.com>
This patch adds load PDI API support to enable full/partial PDI loading
from linux. Programmable Device Image (PDI) is combination of headers,
images and bitstream files to be loaded.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
-Updated API Doc and commit msg.
No functional changes.
Changes for v3:
-None.
Changes for v4:
-Rebased the changes on linux-next.
No functional changes
drivers/firmware/xilinx/zynqmp.c | 17 +++++++++++++++++
include/linux/firmware/xlnx-zynqmp.h | 10 ++++++++++
2 files changed, 27 insertions(+)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 15b138326ecc..2db571da9ad8 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -1011,6 +1011,23 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
}
EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
+/**
+ * zynqmp_pm_load_pdi - Load and process PDI
+ * @src: Source device where PDI is located
+ * @address: PDI src address
+ *
+ * This function provides support to load PDI from linux
+ *
+ * Return: Returns status, either success or error+reason
+ */
+int zynqmp_pm_load_pdi(const u32 src, const u64 address)
+{
+ return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
+ lower_32_bits(address),
+ upper_32_bits(address), 0, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
+
/**
* zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
* AES-GCM core.
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 9d1a5c175065..56b426fe020c 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -52,6 +52,10 @@
#define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U
#define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U
+/* Loader commands */
+#define PM_LOAD_PDI 0x701
+#define PDI_SRC_DDR 0xF
+
/*
* Firmware FPGA Manager flags
* XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
@@ -411,6 +415,7 @@ int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
u32 *value);
int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
u32 value);
+int zynqmp_pm_load_pdi(const u32 src, const u64 address);
#else
static inline int zynqmp_pm_get_api_version(u32 *version)
{
@@ -622,6 +627,11 @@ static inline int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
{
return -ENODEV;
}
+
+static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address)
+{
+ return -ENODEV;
+}
#endif
#endif /* __FIRMWARE_ZYNQMP_H__ */
--
2.17.1
next prev parent reply other threads:[~2021-04-29 14:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 14:04 [PATCH v4 0/4] Add Bitstream configuration support for Versal Nava kishore Manne
2021-04-29 14:04 ` [PATCH v4 1/4] dt-bindings: firmware: Add bindings for xilinx firmware Nava kishore Manne
2021-04-30 15:24 ` Rob Herring
2021-04-30 19:40 ` Rob Herring
2021-05-04 9:34 ` Nava kishore Manne
2021-05-04 13:40 ` Rob Herring
2021-05-12 12:45 ` Nava kishore Manne
2021-04-29 14:04 ` Nava kishore Manne [this message]
2021-04-29 14:04 ` [PATCH v4 3/4] dt-bindings: fpga: Add binding doc for versal fpga manager Nava kishore Manne
2021-04-29 14:04 ` [PATCH v4 4/4] fpga: versal-fpga: Add versal fpga manager driver Nava kishore Manne
2021-04-30 2:28 ` [PATCH v4 0/4] Add Bitstream configuration support for Versal Moritz Fischer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210429140408.23194-3-nava.manne@xilinx.com \
--to=nava.manne@xilinx.com \
--cc=amit.sunil.dhamne@xilinx.com \
--cc=arnd@arndb.de \
--cc=chinnikishore369@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=git@xilinx.com \
--cc=gregkh@linuxfoundation.org \
--cc=iwamatsu@nigauri.org \
--cc=lakshmi.sai.krishna.potthuri@xilinx.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=manish.narani@xilinx.com \
--cc=mdf@kernel.org \
--cc=michal.simek@xilinx.com \
--cc=rajan.vaja@xilinx.com \
--cc=robh+dt@kernel.org \
--cc=trix@redhat.com \
--cc=wendy.liang@xilinx.com \
--cc=zou_wei@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).