From: Bjorn Helgaas <helgaas@kernel.org>
To: Leon Romanovsky <leon@kernel.org>
Cc: Greentime Hu <greentime.hu@sifive.com>,
paul.walmsley@sifive.com, hes@sifive.com, erik.danie@sifive.com,
zong.li@sifive.com, bhelgaas@google.com, robh+dt@kernel.org,
aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org,
lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de,
alex.dewar90@gmail.com, khilman@baylibre.com,
hayashi.kunihiko@socionext.com, vidyas@nvidia.com,
jh80.chung@samsung.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v6 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
Date: Tue, 4 May 2021 11:23:31 -0500 [thread overview]
Message-ID: <20210504162331.GA1122904@bjorn-Precision-5520> (raw)
In-Reply-To: <YJE886bhppqes5LQ@unreal>
On Tue, May 04, 2021 at 03:24:19PM +0300, Leon Romanovsky wrote:
> On Tue, May 04, 2021 at 06:59:35PM +0800, Greentime Hu wrote:
> > We add pcie_aux clock in this patch so that pcie driver can use
> > clk_prepare_enable() and clk_disable_unprepare() to enable and disable
> > pcie_aux clock.
> >
> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> > Acked-by: Stephen Boyd <sboyd@kernel.org>
> > ---
> > drivers/clk/sifive/fu740-prci.c | 11 +++++
> > drivers/clk/sifive/fu740-prci.h | 2 +-
> > drivers/clk/sifive/sifive-prci.c | 41 +++++++++++++++++++
> > drivers/clk/sifive/sifive-prci.h | 9 ++++
> > include/dt-bindings/clock/sifive-fu740-prci.h | 1 +
> > 5 files changed, 63 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c
> > index 764d1097aa51..53f6e00a03b9 100644
> > --- a/drivers/clk/sifive/fu740-prci.c
> > +++ b/drivers/clk/sifive/fu740-prci.c
> > @@ -72,6 +72,12 @@ static const struct clk_ops sifive_fu740_prci_hfpclkplldiv_clk_ops = {
> > .recalc_rate = sifive_prci_hfpclkplldiv_recalc_rate,
>
> <...>
>
> > +/* PCIE AUX clock APIs for enable, disable. */
> > +int sifive_prci_pcie_aux_clock_is_enabled(struct clk_hw *hw)
>
> It should be bool
It's used via this function pointer:
struct clk_ops {
int (*is_enabled)(struct clk_hw *hw);
so I think "int" is actually appropriate here.
There are some weird/interesting bool vs int usages nearby, though:
"bool __is_clk_gate_enabled()" goes to some trouble to convert
int to bool ("return (reg_val & bit_mask) != 0;"), and then
kona_peri_clk_is_enabled() converts the bool back to int ("return
is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0;").
"int lpc32xx_clk_gate_is_enabled()" actually returns a bool that is
implicitly converted to int.
Many *_is_enabled() functions return !!(...) where !! is an
int-to-bool conversion that is arguably unnecessary and again
results in an implicit conversion to int.
I don't see any *problems* with any of these; it just seems like a
little more mental effort to think about all the explicit and implicit
conversions going on.
> > +int sifive_prci_pcie_aux_clock_enable(struct clk_hw *hw)
> > +{
> > + struct __prci_clock *pc = clk_hw_to_prci_clock(hw);
> > + struct __prci_data *pd = pc->pd;
> > + u32 r __maybe_unused;
> > +
> > + if (sifive_prci_pcie_aux_clock_is_enabled(hw))
> > + return 0;
>
> You actually call to this new function only once, put your
> __prci_readl() here.
Both sifive_prci_pcie_aux_clock_enable() and
sifive_prci_pcie_aux_clock_is_enabled() are used via the clk_ops
function pointers.
Maybe sifive_prci_pcie_aux_clock_is_enabled() could be replaced by the
__prci_readl() here, but I don't know enough about clk_ops internals
to know.
Bjorn
next prev parent reply other threads:[~2021-05-04 16:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-04 10:59 [PATCH v6 0/6] Add SiFive FU740 PCIe host controller driver support Greentime Hu
2021-05-04 10:59 ` [PATCH v6 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver Greentime Hu
2021-05-04 12:24 ` Leon Romanovsky
2021-05-04 16:23 ` Bjorn Helgaas [this message]
2021-05-04 18:12 ` Leon Romanovsky
2021-05-04 18:45 ` Bjorn Helgaas
2021-05-05 5:22 ` Leon Romanovsky
2021-05-04 10:59 ` [PATCH v6 2/6] clk: sifive: Use reset-simple " Greentime Hu
2021-05-04 10:59 ` [PATCH v6 3/6] MAINTAINERS: Add maintainers for SiFive FU740 " Greentime Hu
2021-05-04 10:59 ` [PATCH v6 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller Greentime Hu
2021-05-04 10:59 ` [PATCH v6 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver Greentime Hu
2021-05-04 13:46 ` Bjorn Helgaas
2021-05-04 14:23 ` Lorenzo Pieralisi
2021-05-05 4:26 ` Greentime Hu
2021-05-05 14:37 ` Bjorn Helgaas
2021-05-04 10:59 ` [PATCH v6 6/6] riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC Greentime Hu
2021-05-04 11:28 ` [PATCH v6 0/6] Add SiFive FU740 PCIe host controller driver support Lorenzo Pieralisi
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