From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C504C43616 for ; Wed, 12 May 2021 18:31:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 732F961430 for ; Wed, 12 May 2021 18:31:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355182AbhELS1e (ORCPT ); Wed, 12 May 2021 14:27:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:54972 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242286AbhELQeE (ORCPT ); Wed, 12 May 2021 12:34:04 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 71F7561CB5; Wed, 12 May 2021 15:59:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1620835150; bh=Fhfyz8opL3zqIOOAwHks1RGCX8Huwe+QPutvFkocZic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BA+40oHmAh7x0xW1Yg8P3XQbtn6VS28Q3ynM49wazCFL0CJV86IDljaNz853LNtyp R8SVVJ1mbSmJftEL60Is+okU1RxhxBnxUhzS8NMVBxv6VUUSyot+tfWHM+MDZSnvvG jHlbemblq+Sd682S8kBw/QEif0Rtm80uMFDa5HHY= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Sai Prakash Ranjan , Bjorn Andersson , Sasha Levin Subject: [PATCH 5.12 193/677] arm64: dts: qcom: sm8350: Fix level triggered PMU interrupt polarity Date: Wed, 12 May 2021 16:43:59 +0200 Message-Id: <20210512144843.662568725@linuxfoundation.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210512144837.204217980@linuxfoundation.org> References: <20210512144837.204217980@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sai Prakash Ranjan [ Upstream commit 794d3e309e44c99158d0166b1717f297341cf3ab ] As per interrupt documentation for SM8350 SoC, the polarity for level triggered PMU interrupt is low, fix this. Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Sai Prakash Ranjan Link: https://lore.kernel.org/r/ca57409198477f7815e32a6a7467dcdc9b93dc4f.1613468366.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 5ef460458f5c..e8bf3f95c674 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -153,7 +153,7 @@ pmu { compatible = "arm,armv8-pmuv3"; - interrupts = ; + interrupts = ; }; psci { -- 2.30.2