From: kernel test robot <lkp@intel.com>
To: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: kbuild-all@lists.01.org, clang-built-linux@googlegroups.com,
linux-clk@vger.kernel.org, punit1.agrawal@toshiba.co.jp,
yuji2.ishikawa@toshiba.co.jp,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Subject: Re: [PATCH 1/4] clk: visconti: Add support common clock driver and reset driver
Date: Tue, 25 May 2021 21:04:18 +0800 [thread overview]
Message-ID: <202105252001.Dh2GeGqy-lkp@intel.com> (raw)
In-Reply-To: <20210525084655.138465-2-nobuhiro1.iwamatsu@toshiba.co.jp>
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Hi Nobuhiro,
I love your patch! Perhaps something to improve:
[auto build test WARNING on clk/clk-next]
[also build test WARNING on robh/for-next pza/reset/next linus/master v5.13-rc3 next-20210525]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Nobuhiro-Iwamatsu/clk-visconti-Add-support-common-clock-driver-and-reset-driver/20210525-165001
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: arm64-randconfig-r004-20210525 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 99155e913e9bad5f7f8a247f8bb3a3ff3da74af1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/0day-ci/linux/commit/33e59a6bce486f3cb2bd6f9f4ed2f73a94769196
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Nobuhiro-Iwamatsu/clk-visconti-Add-support-common-clock-driver-and-reset-driver/20210525-165001
git checkout 33e59a6bce486f3cb2bd6f9f4ed2f73a94769196
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/clk/visconti/pll.c:260:13: warning: no previous prototype for function 'visconti_register_pll' [-Wmissing-prototypes]
struct clk *visconti_register_pll(struct visconti_pll_provider *ctx,
^
drivers/clk/visconti/pll.c:260:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct clk *visconti_register_pll(struct visconti_pll_provider *ctx,
^
static
1 warning generated.
vim +/visconti_register_pll +260 drivers/clk/visconti/pll.c
259
> 260 struct clk *visconti_register_pll(struct visconti_pll_provider *ctx,
261 const char *name,
262 const char *parent_name,
263 int offset,
264 const struct visconti_pll_rate_table *rate_table,
265 u8 clk_pll_flags,
266 spinlock_t *lock)
267 {
268 struct clk_init_data init;
269 struct visconti_pll *pll;
270 struct clk *pll_clk;
271 int len;
272
273 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
274 if (!pll)
275 return ERR_PTR(-ENOMEM);
276
277 /* Create the actual pll */
278 init.name = name;
279 init.flags = CLK_IGNORE_UNUSED;
280 init.parent_names = &parent_name;
281 init.num_parents = 1;
282
283 for (len = 0; rate_table[len].rate != 0; )
284 len++;
285 pll->rate_count = len;
286 pll->rate_table = kmemdup(rate_table,
287 pll->rate_count * sizeof(struct visconti_pll_rate_table),
288 GFP_KERNEL);
289 WARN(!pll->rate_table, "%s: could not allocate rate table for %s\n", __func__, name);
290
291 init.ops = &visconti_pll_ops;
292 pll->hw.init = &init;
293 pll->pll_base = ctx->reg_base + offset;
294 pll->flags = clk_pll_flags;
295 pll->lock = lock;
296 pll->ctx = ctx;
297
298 pll_clk = clk_register(NULL, &pll->hw);
299 if (IS_ERR(pll_clk)) {
300 pr_err("failed to register pll clock %s : %ld\n", name, PTR_ERR(pll_clk));
301 goto err;
302 }
303
304 return pll_clk;
305
306 err:
307 kfree(pll);
308 return pll_clk;
309 }
310
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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next prev parent reply other threads:[~2021-05-25 13:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-25 8:46 [PATCH 0/4] clk: visconti: Add support common clock driver and reset driver Nobuhiro Iwamatsu
2021-05-25 8:46 ` [PATCH 1/4] " Nobuhiro Iwamatsu
2021-05-25 10:36 ` kernel test robot
2021-05-25 13:04 ` kernel test robot [this message]
2021-05-25 8:46 ` [PATCH 2/4] dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV7700 SoC Nobuhiro Iwamatsu
2021-05-25 8:46 ` [PATCH 3/4] dt-bindings: clock: Add DT bindings for SMU " Nobuhiro Iwamatsu
2021-05-25 8:46 ` [PATCH 4/4] MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller Nobuhiro Iwamatsu
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