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* [PATCH 0/8] Misc Ingenic patches
@ 2021-05-30 17:17 Paul Cercueil
  2021-05-30 17:17 ` [PATCH 1/8] MIPS: mm: XBurst CPU requires sync after DMA Paul Cercueil
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

Hi Thomas,

Here is a set of misc patches that don't really have any relation
between themselves. I just thought you'd prefer one patchset than eight
individual patches :)

Cheers,
-Paul

Paul Cercueil (8):
  MIPS: mm: XBurst CPU requires sync after DMA
  MIPS: boot: Support specifying UART port on Ingenic SoCs
  MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)
  MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs
  MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
  MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc
  MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio
  MIPS: ingenic: rs90: Add dedicated VRAM memory region

 arch/mips/Kconfig                      |  3 +++
 arch/mips/Kconfig.debug                |  8 ++++++++
 arch/mips/boot/compressed/uart-16550.c |  4 ++--
 arch/mips/boot/dts/ingenic/gcw0.dts    |  5 ++---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 10 +++++-----
 arch/mips/boot/dts/ingenic/rs90.dts    | 14 ++++++++++++++
 arch/mips/ingenic/Kconfig              |  2 ++
 arch/mips/kernel/cpu-probe.c           |  5 +++++
 arch/mips/mm/dma-noncoherent.c         |  1 +
 9 files changed, 42 insertions(+), 10 deletions(-)

-- 
2.30.2


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/8] MIPS: mm: XBurst CPU requires sync after DMA
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
@ 2021-05-30 17:17 ` Paul Cercueil
  2021-05-30 17:17 ` [PATCH 2/8] MIPS: boot: Support specifying UART port on Ingenic SoCs Paul Cercueil
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

I am not sure why this is required, but if this is not enabled, reading
from a buffer in which data has been DMA'd may read incorrect values.

This used to happen for instance in mmc_app_send_scr()
(drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied
by the CPU to a different location.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig              | 1 +
 arch/mips/mm/dma-noncoherent.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ed51970c08e7..310ce50ad285 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -112,6 +112,7 @@ config MACH_INGENIC
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	select SYS_SUPPORTS_ZBOOT
 	select DMA_NONCOHERENT
+	select ARCH_HAS_SYNC_DMA_FOR_CPU
 	select IRQ_MIPS_CPU
 	select PINCTRL
 	select GPIOLIB
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index 212f3ce75a6b..3c4fc97b9f39 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -32,6 +32,7 @@ static inline bool cpu_needs_post_dma_flush(void)
 	case CPU_R12000:
 	case CPU_BMIPS5000:
 	case CPU_LOONGSON2EF:
+	case CPU_XBURST:
 		return true;
 	default:
 		/*
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/8] MIPS: boot: Support specifying UART port on Ingenic SoCs
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
  2021-05-30 17:17 ` [PATCH 1/8] MIPS: mm: XBurst CPU requires sync after DMA Paul Cercueil
@ 2021-05-30 17:17 ` Paul Cercueil
  2021-05-30 17:17 ` [PATCH 3/8] MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) Paul Cercueil
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

Allow specifying from the config the UART to use on Ingenic SoCs when
compressed kernel debugging is enabled.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig.debug                | 8 ++++++++
 arch/mips/boot/compressed/uart-16550.c | 4 ++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index f5832a49a881..43dbf5930796 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -102,6 +102,14 @@ config DEBUG_ZBOOT
 	  to reduce the kernel image size and speed up the booting procedure a
 	  little.
 
+config ZBOOT_INGENIC_UART
+	int "UART to use for compressed kernel debugging"
+	depends on DEBUG_ZBOOT && MACH_INGENIC_SOC
+	default 0
+	range 0 4
+	help
+	  Specify the UART that should be used for compressed kernel debugging.
+
 config SPINLOCK_TEST
 	bool "Enable spinlock timing tests in debugfs"
 	depends on DEBUG_FS
diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c
index aee8d7b8f091..c18d7f72d9d9 100644
--- a/arch/mips/boot/compressed/uart-16550.c
+++ b/arch/mips/boot/compressed/uart-16550.c
@@ -19,8 +19,8 @@
 #endif
 
 #ifdef CONFIG_MACH_INGENIC
-#define INGENIC_UART0_BASE_ADDR	0x10030000
-#define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset))
+#define INGENIC_UART_BASE_ADDR	(0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART)
+#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
 #endif
 
 #ifdef CONFIG_CPU_XLR
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/8] MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
  2021-05-30 17:17 ` [PATCH 1/8] MIPS: mm: XBurst CPU requires sync after DMA Paul Cercueil
  2021-05-30 17:17 ` [PATCH 2/8] MIPS: boot: Support specifying UART port on Ingenic SoCs Paul Cercueil
@ 2021-05-30 17:17 ` Paul Cercueil
  2021-05-30 17:17 ` [PATCH 4/8] MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs Paul Cercueil
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

Ingenic JZ4760 and JZ4760B do have a FPU, but the config registers don't
report it. Force the FPU detection in case the processor ID match the
JZ4760(B) one.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/kernel/cpu-probe.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 0ef240adefb5..630fcb4cb30e 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1840,6 +1840,11 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
 		 */
 		case PRID_COMP_INGENIC_D0:
 			c->isa_level &= ~MIPS_CPU_ISA_M32R2;
+
+			/* FPU is not properly detected on JZ4760(B). */
+			if (c->processor_id == 0x2ed0024f)
+				c->options |= MIPS_CPU_FPU;
+
 			fallthrough;
 
 		/*
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/8] MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (2 preceding siblings ...)
  2021-05-30 17:17 ` [PATCH 3/8] MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) Paul Cercueil
@ 2021-05-30 17:17 ` Paul Cercueil
  2021-05-30 17:17 ` [PATCH 5/8] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER Paul Cercueil
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

The MACH_INGENIC_GENERIC config option must select all SoCs, in order
for all the SoC-specific drivers to become available.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/ingenic/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/ingenic/Kconfig b/arch/mips/ingenic/Kconfig
index 3238e16febd5..f595b339a4b8 100644
--- a/arch/mips/ingenic/Kconfig
+++ b/arch/mips/ingenic/Kconfig
@@ -4,9 +4,11 @@ config MACH_INGENIC_GENERIC
 	bool
 	select MACH_INGENIC
 	select MACH_JZ4740
+	select MACH_JZ4725B
 	select MACH_JZ4770
 	select MACH_JZ4780
 	select MACH_X1000
+	select MACH_X1830
 
 choice
 	prompt "Machine type"
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 5/8] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (3 preceding siblings ...)
  2021-05-30 17:17 ` [PATCH 4/8] MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs Paul Cercueil
@ 2021-05-30 17:17 ` Paul Cercueil
  2021-05-30 17:18 ` [PATCH 6/8] MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc Paul Cercueil
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:17 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

The clock driving the XBurst CPUs in Ingenic SoCs is integer divided
from the main PLL. As such, it is possible to control the frequency of
the CPU, either by changing the divider, or by changing the rate of the
main PLL.

The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of
hardware in the SoC, provides this functionality.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 310ce50ad285..80d7c3fde056 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -429,6 +429,8 @@ config MACH_INGENIC_SOC
 	select MIPS_GENERIC
 	select MACH_INGENIC
 	select SYS_SUPPORTS_ZBOOT_UART16550
+	select CPU_SUPPORTS_CPUFREQ
+	select MIPS_EXTERNAL_TIMER
 
 config LANTIQ
 	bool "Lantiq based platforms"
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 6/8] MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (4 preceding siblings ...)
  2021-05-30 17:17 ` [PATCH 5/8] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER Paul Cercueil
@ 2021-05-30 17:18 ` Paul Cercueil
  2021-05-30 17:18 ` [PATCH 7/8] MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio Paul Cercueil
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:18 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback
compatible, as per the Device Tree documentation found in
Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 8d01feef7ff5..9e34f433b9b5 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -339,7 +339,7 @@ uart4: serial@10034000 {
 	};
 
 	i2c0: i2c@10050000 {
-		compatible = "ingenic,jz4780-i2c";
+		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
 		#address-cells = <1>;
 		#size-cells = <0>;
 
@@ -357,7 +357,7 @@ i2c0: i2c@10050000 {
 	};
 
 	i2c1: i2c@10051000 {
-		compatible = "ingenic,jz4780-i2c";
+		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x10051000 0x1000>;
@@ -374,7 +374,7 @@ i2c1: i2c@10051000 {
 	};
 
 	i2c2: i2c@10052000 {
-		compatible = "ingenic,jz4780-i2c";
+		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x10052000 0x1000>;
@@ -391,7 +391,7 @@ i2c2: i2c@10052000 {
 	};
 
 	i2c3: i2c@10053000 {
-		compatible = "ingenic,jz4780-i2c";
+		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x10053000 0x1000>;
@@ -408,7 +408,7 @@ i2c3: i2c@10053000 {
 	};
 
 	i2c4: i2c@10054000 {
-		compatible = "ingenic,jz4780-i2c";
+		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x10054000 0x1000>;
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 7/8] MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (5 preceding siblings ...)
  2021-05-30 17:18 ` [PATCH 6/8] MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc Paul Cercueil
@ 2021-05-30 17:18 ` Paul Cercueil
  2021-05-30 17:18 ` [PATCH 8/8] MIPS: ingenic: rs90: Add dedicated VRAM memory region Paul Cercueil
  2021-06-01  9:49 ` [PATCH 0/8] Misc Ingenic patches Thomas Bogendoerfer
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:18 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

When using the FM radio, we must not have capacitors on the headphones
line, since it is used as the antenna.

The "FM Radio" widget is removed so that the cap-less mode can be
enabled dynamically through DAPM when the line input is used.
This widget was useless anyway.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/gcw0.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/gcw0.dts b/arch/mips/boot/dts/ingenic/gcw0.dts
index f4c04f2263ea..4abb0318416c 100644
--- a/arch/mips/boot/dts/ingenic/gcw0.dts
+++ b/arch/mips/boot/dts/ingenic/gcw0.dts
@@ -74,7 +74,6 @@ sound {
 		simple-audio-card,widgets =
 			"Speaker", "Speaker",
 			"Headphone", "Headphones",
-			"Line", "FM Radio",
 			"Microphone", "Built-in Mic";
 		simple-audio-card,routing =
 			"Headphones Amp INL", "LHPOUT",
@@ -85,8 +84,8 @@ sound {
 			"Speaker Amp INR", "ROUT",
 			"Speaker", "Speaker Amp OUTL",
 			"Speaker", "Speaker Amp OUTR",
-			"LLINEIN", "FM Radio",
-			"RLINEIN", "FM Radio",
+			"LLINEIN", "Cap-less",
+			"RLINEIN", "Cap-less",
 			"Built-in Mic", "MICBIAS",
 			"MIC1P", "Built-in Mic",
 			"MIC1N", "Built-in Mic";
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 8/8] MIPS: ingenic: rs90: Add dedicated VRAM memory region
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (6 preceding siblings ...)
  2021-05-30 17:18 ` [PATCH 7/8] MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio Paul Cercueil
@ 2021-05-30 17:18 ` Paul Cercueil
  2021-06-01  9:49 ` [PATCH 0/8] Misc Ingenic patches Thomas Bogendoerfer
  8 siblings, 0 replies; 10+ messages in thread
From: Paul Cercueil @ 2021-05-30 17:18 UTC (permalink / raw)
  To: Thomas Bogendoerfer
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list, Paul Cercueil

Add a 1 MiB memory area dedicated to the video driver. This area will be
managed by Linux' CMA, so that the ingenic-drm driver can be sure to
always be able to allocate contiguous buffers.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/rs90.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/rs90.dts b/arch/mips/boot/dts/ingenic/rs90.dts
index 4eb1edbfc155..74fee7f01352 100644
--- a/arch/mips/boot/dts/ingenic/rs90.dts
+++ b/arch/mips/boot/dts/ingenic/rs90.dts
@@ -16,6 +16,18 @@ memory {
 		reg = <0x0 0x2000000>;
 	};
 
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		vmem: video-memory@1f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x1f00000 0x100000>;
+			reusable;
+		};
+	};
+
 	vcc: regulator {
 		compatible = "regulator-fixed";
 
@@ -300,6 +312,8 @@ &tcu {
 };
 
 &lcd {
+	memory-region = <&vmem>;
+
 	pinctrl-names = "default";
 	pinctrl-0 = <&pins_lcd>;
 };
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/8] Misc Ingenic patches
  2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
                   ` (7 preceding siblings ...)
  2021-05-30 17:18 ` [PATCH 8/8] MIPS: ingenic: rs90: Add dedicated VRAM memory region Paul Cercueil
@ 2021-06-01  9:49 ` Thomas Bogendoerfer
  8 siblings, 0 replies; 10+ messages in thread
From: Thomas Bogendoerfer @ 2021-06-01  9:49 UTC (permalink / raw)
  To: Paul Cercueil
  Cc: Rob Herring, 周琰杰,
	linux-mips, linux-kernel, devicetree, list

On Sun, May 30, 2021 at 06:17:54PM +0100, Paul Cercueil wrote:
> Hi Thomas,
> 
> Here is a set of misc patches that don't really have any relation
> between themselves. I just thought you'd prefer one patchset than eight
> individual patches :)

either way is good as long it has a common topic.

> 
> Paul Cercueil (8):
>   MIPS: mm: XBurst CPU requires sync after DMA
>   MIPS: boot: Support specifying UART port on Ingenic SoCs
>   MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)
>   MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs
>   MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>   MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc
>   MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio
>   MIPS: ingenic: rs90: Add dedicated VRAM memory region
> 
>  arch/mips/Kconfig                      |  3 +++
>  arch/mips/Kconfig.debug                |  8 ++++++++
>  arch/mips/boot/compressed/uart-16550.c |  4 ++--
>  arch/mips/boot/dts/ingenic/gcw0.dts    |  5 ++---
>  arch/mips/boot/dts/ingenic/jz4780.dtsi | 10 +++++-----
>  arch/mips/boot/dts/ingenic/rs90.dts    | 14 ++++++++++++++
>  arch/mips/ingenic/Kconfig              |  2 ++
>  arch/mips/kernel/cpu-probe.c           |  5 +++++
>  arch/mips/mm/dma-noncoherent.c         |  1 +
>  9 files changed, 42 insertions(+), 10 deletions(-)

series applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

^ permalink raw reply	[flat|nested] 10+ messages in thread

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Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2021-05-30 17:17 [PATCH 0/8] Misc Ingenic patches Paul Cercueil
2021-05-30 17:17 ` [PATCH 1/8] MIPS: mm: XBurst CPU requires sync after DMA Paul Cercueil
2021-05-30 17:17 ` [PATCH 2/8] MIPS: boot: Support specifying UART port on Ingenic SoCs Paul Cercueil
2021-05-30 17:17 ` [PATCH 3/8] MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) Paul Cercueil
2021-05-30 17:17 ` [PATCH 4/8] MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs Paul Cercueil
2021-05-30 17:17 ` [PATCH 5/8] MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER Paul Cercueil
2021-05-30 17:18 ` [PATCH 6/8] MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc Paul Cercueil
2021-05-30 17:18 ` [PATCH 7/8] MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio Paul Cercueil
2021-05-30 17:18 ` [PATCH 8/8] MIPS: ingenic: rs90: Add dedicated VRAM memory region Paul Cercueil
2021-06-01  9:49 ` [PATCH 0/8] Misc Ingenic patches Thomas Bogendoerfer

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