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From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Palmer Dabbelt <palmerdabbelt@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Pavel Machek <pavel@ucw.cz>, Rob Herring <robh+dt@kernel.org>
Cc: Sandeep Tripathy <milun.tripathy@gmail.com>,
	Atish Patra <atish.patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Liush <liush@allwinnertech.com>, Anup Patel <anup@brainfault.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Anup Patel <anup.patel@wdc.com>
Subject: [PATCH v5 8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine
Date: Wed,  2 Jun 2021 16:53:21 +0530	[thread overview]
Message-ID: <20210602112321.2241566-9-anup.patel@wdc.com> (raw)
In-Reply-To: <20210602112321.2241566-1-anup.patel@wdc.com>

We enable RISC-V SBI CPU Idle driver for QEMU virt machine to test
SBI HSM Supend on QEMU.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 arch/riscv/Kconfig.socs           | 3 +++
 arch/riscv/configs/defconfig      | 1 +
 arch/riscv/configs/rv32_defconfig | 1 +
 3 files changed, 5 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index ed963761fbd2..3ae937121a77 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -27,6 +27,9 @@ config SOC_VIRT
 	select GOLDFISH
 	select RTC_DRV_GOLDFISH if RTC_CLASS
 	select SIFIVE_PLIC
+	select PM_GENERIC_DOMAINS if PM
+	select PM_GENERIC_DOMAINS_OF if PM && OF
+	select RISCV_SBI_CPUIDLE if CPU_IDLE
 	help
 	  This enables support for QEMU Virt Machine.
 
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 57a24d40d43f..ed71f125cbc9 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_SIFIVE=y
 CONFIG_SOC_VIRT=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 97d899df2445..0088d6989332 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_VIRT=y
 CONFIG_ARCH_RV32I=y
 CONFIG_SMP=y
 CONFIG_HOTPLUG_CPU=y
+CONFIG_PM=y
 CONFIG_CPU_IDLE=y
 CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
-- 
2.25.1


      parent reply	other threads:[~2021-06-02 11:24 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-02 11:23 [PATCH v5 0/8] RISC-V CPU Idle Support Anup Patel
2021-06-02 11:23 ` [PATCH v5 1/8] RISC-V: Enable CPU_IDLE drivers Anup Patel
2021-06-02 11:23 ` [PATCH v5 2/8] RISC-V: Rename relocate() and make it global Anup Patel
2021-06-02 11:23 ` [PATCH v5 3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit Anup Patel
2021-06-02 11:23 ` [PATCH v5 4/8] RISC-V: Add SBI HSM suspend related defines Anup Patel
2021-06-02 11:23 ` [PATCH v5 5/8] cpuidle: Factor-out power domain related code from PSCI domain driver Anup Patel
2021-06-02 13:17   ` Ulf Hansson
2021-06-02 15:06     ` Anup Patel
2021-06-06 18:34   ` Samuel Holland
2021-06-09  8:01     ` Anup Patel
2021-06-02 11:23 ` [PATCH v5 6/8] cpuidle: Add RISC-V SBI CPU idle driver Anup Patel
2021-06-06 18:39   ` Samuel Holland
2021-06-09 10:36     ` Anup Patel
2021-06-02 11:23 ` [PATCH v5 7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states Anup Patel
2021-06-02 11:23 ` Anup Patel [this message]

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