From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01512C47083 for ; Wed, 2 Jun 2021 16:48:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D83AF61C1D for ; Wed, 2 Jun 2021 16:48:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231154AbhFBQuS (ORCPT ); Wed, 2 Jun 2021 12:50:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:33356 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230153AbhFBQuF (ORCPT ); Wed, 2 Jun 2021 12:50:05 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id CF22061C1A; Wed, 2 Jun 2021 16:48:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1622652502; bh=pafE5wcer39gXcqZHlz9lHrMw5dGFhRfhX54ca9HDrY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KIoBTbU371shj+t06uh4FCwPHXSx8kWHcuvw5GCUi1zMVxONmufwHgcBgjVVWWAjD ThHWbtebGjOkrTfnfQ1fGd/osGhMSNOX/a0AvB33k+y6xXTFqniNah7uRryXVeHytf Ic6kgfPf8pBcSY1WkV5kV7SYpUs4Mm6vQyfARw6iXDRf0RiohDMokZEXv00YWQ/H6Q 43Nkn1/Tq16qTUhQ/9lnummXp1UACfm+zubdVel7lgCK/DBhtm+sMUsje6v/yNBTth c/r8NaTAOzAadTknrWBokV9PN6SoB0AYAkbzPBPFZHNtKAgapUSdQB7an/cqDBDDCX 7n7hwryFCNjwQ== From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Will Deacon , Catalin Marinas , Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Qais Yousef , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , "Rafael J. Wysocki" , Dietmar Eggemann , Daniel Bristot de Oliveira , Valentin Schneider , kernel-team@android.com Subject: [PATCH v8 13/19] arm64: Implement task_cpu_possible_mask() Date: Wed, 2 Jun 2021 17:47:13 +0100 Message-Id: <20210602164719.31777-14-will@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210602164719.31777-1-will@kernel.org> References: <20210602164719.31777-1-will@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Provide an implementation of task_cpu_possible_mask() so that we can prevent 64-bit-only cores being added to the 'cpus_mask' for compat tasks on systems with mismatched 32-bit support at EL0, Reviewed-by: Catalin Marinas Signed-off-by: Will Deacon --- arch/arm64/include/asm/mmu_context.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index d3cef9133539..bb9b7510f334 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -231,6 +231,19 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, update_saved_ttbr0(tsk, next); } +static inline const struct cpumask * +task_cpu_possible_mask(struct task_struct *p) +{ + if (!static_branch_unlikely(&arm64_mismatched_32bit_el0)) + return cpu_possible_mask; + + if (!is_compat_thread(task_thread_info(p))) + return cpu_possible_mask; + + return system_32bit_el0_cpumask(); +} +#define task_cpu_possible_mask task_cpu_possible_mask + void verify_cpu_asid_bits(void); void post_ttbr_update_workaround(void); -- 2.32.0.rc0.204.g9fa02ecfa5-goog