From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: Anup Patel <anup@brainfault.org>, Alex Ghiti <alex@ghiti.fr>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Jisheng Zhang <jszhang@kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Zong Li <zong.li@sifive.com>,
linux-riscv <linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org List"
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/3] riscv: Factorize xip and !xip kernel address conversion macros
Date: Thu, 3 Jun 2021 21:53:37 +0800 [thread overview]
Message-ID: <20210603215337.4da052e2@xhacker> (raw)
In-Reply-To: <CAAhSdy2kPPrBzFCA01NSvWptoftY27+PsMzLDWFzvOzNdUByhA@mail.gmail.com>
On Thu, 3 Jun 2021 18:46:47 +0530
Anup Patel <anup@brainfault.org> wrote:
> On Thu, Jun 3, 2021 at 6:27 PM Alex Ghiti <alex@ghiti.fr> wrote:
> >
> > Hi Jisheng,
Hi,
> >
> > Le 3/06/2021 à 14:27, Jisheng Zhang a écrit :
> > > On Thu, 3 Jun 2021 10:27:47 +0200
> > > Alexandre Ghiti <alex@ghiti.fr> wrote:
> > >
> > >> To simplify the kernel address conversion code, make the same definition of
> > >> kernel_mapping_pa_to_va and kernel_mapping_va_to_pa compatible for both xip
> > >> and !xip kernel by defining XIP_OFFSET to 0 in !xip kernel.
> > >>
> > >> Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
> > >> ---
> > >> arch/riscv/include/asm/page.h | 14 +++-----------
> > >> arch/riscv/include/asm/pgtable.h | 2 ++
> > >> 2 files changed, 5 insertions(+), 11 deletions(-)
> > >>
> > >> diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h
> > >> index 6a7761c86ec2..6e004d8fda4d 100644
> > >> --- a/arch/riscv/include/asm/page.h
> > >> +++ b/arch/riscv/include/asm/page.h
> > >> @@ -93,9 +93,7 @@ extern unsigned long va_pa_offset;
> > >> #ifdef CONFIG_64BIT
> > >> extern unsigned long va_kernel_pa_offset;
> > >> #endif
> > >> -#ifdef CONFIG_XIP_KERNEL
> > >> extern unsigned long va_kernel_xip_pa_offset;
> > >> -#endif
> > >> extern unsigned long pfn_base;
> > >> #define ARCH_PFN_OFFSET (pfn_base)
> > >> #else
> > >> @@ -103,6 +101,7 @@ extern unsigned long pfn_base;
> > >> #ifdef CONFIG_64BIT
> > >> #define va_kernel_pa_offset 0
> > >> #endif
> > >> +#define va_kernel_xip_pa_offset 0
> > >> #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
> > >> #endif /* CONFIG_MMU */
> > >>
> > >> @@ -110,29 +109,22 @@ extern unsigned long kernel_virt_addr;
> > >>
> > >> #ifdef CONFIG_64BIT
> > >> #define linear_mapping_pa_to_va(x) ((void *)((unsigned long)(x) + va_pa_offset))
> > >> -#ifdef CONFIG_XIP_KERNEL
> > >> #define kernel_mapping_pa_to_va(y) ({ \
> > >> unsigned long _y = y; \
> > >> (_y >= CONFIG_PHYS_RAM_BASE) ?
> > >
> > > This CONFIG_PHYS_RAM_BASE is only available for XIP, could result in a
> > > compiler error for !XIP?
> >
> > You're right, I have this patch in my branch and forgot to squash it
> >
> > >
> > > I'm also concerned with the unecessary overhead of kernel_mapping_pa_to_va()
> > > for !XIP case, there's a "if" condition branch, and extra symbol: va_kernel_xip_pa_offset
> >
> > I understand your concerns even if I don't find that the overhead is
> > that important here, I prefer the readability improvement. I can always
For readability, we still can avoid introducing va_kernel_xip_pa_offset
symbol by simply define va_kernel_xip_pa_offset as 0 if XIP as you did
for XIP_OFFSET
PS: this may need a preparation patch:
http://lists.infradead.org/pipermail/linux-riscv/2021-June/006802.html
> > add unlikely/likely builtin to improve things or completely remove this
> > patch if others agree with you.
>
> I would also prefer readable code for long-term maintainability. Currently,
> the nested "#ifdefs" are increasing causing developers to easily break
> untested combinations.
>
> Regards,
> Anup
>
> >
> > Thanks,
> >
> > Alex
> >
> > >
> > >> (void *)((unsigned long)(_y) + va_kernel_pa_offset + XIP_OFFSET) : \
> > >> (void *)((unsigned long)(_y) + va_kernel_xip_pa_offset); \
> > >> })
> > >> -#else
> > >> -#define kernel_mapping_pa_to_va(x) ((void *)((unsigned long)(x) + va_kernel_pa_offset))
> > >> -#endif
> > >> #define __pa_to_va_nodebug(x) linear_mapping_pa_to_va(x)
> > >>
> > >> #define linear_mapping_va_to_pa(x) ((unsigned long)(x) - va_pa_offset)
> > >> -#ifdef CONFIG_XIP_KERNEL
> > >> #define kernel_mapping_va_to_pa(y) ({ \
> > >> unsigned long _y = y; \
> > >> (_y < kernel_virt_addr + XIP_OFFSET) ? \
> > >> ((unsigned long)(_y) - va_kernel_xip_pa_offset) : \
> > >> ((unsigned long)(_y) - va_kernel_pa_offset - XIP_OFFSET); \
> > >> })
> > >
> > > Similar as kernel_mapping_pa_to_va(), an overhead of "if" condition branch
> > > for !XIP and extra va_kernel_xip_pa_offset symbol.
> > >
> > >> -#else
> > >> -#define kernel_mapping_va_to_pa(x) ((unsigned long)(x) - va_kernel_pa_offset)
> > >> -#endif
> > >> +
> > >> #define __va_to_pa_nodebug(x) ({ \
> > >> unsigned long _x = x; \
> > >> (_x < kernel_virt_addr) ? \
> > >> @@ -141,7 +133,7 @@ extern unsigned long kernel_virt_addr;
> > >> #else
> > >> #define __pa_to_va_nodebug(x) ((void *)((unsigned long) (x) + va_pa_offset))
> > >> #define __va_to_pa_nodebug(x) ((unsigned long)(x) - va_pa_offset)
> > >> -#endif
> > >> +#endif /* CONFIG_64BIT */
> > >>
> > >> #ifdef CONFIG_DEBUG_VIRTUAL
> > >> extern phys_addr_t __virt_to_phys(unsigned long x);
> > >> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> > >> index bde8ce3bfe7c..d98e931a31e5 100644
> > >> --- a/arch/riscv/include/asm/pgtable.h
> > >> +++ b/arch/riscv/include/asm/pgtable.h
> > >> @@ -77,6 +77,8 @@
> > >>
> > >> #ifdef CONFIG_XIP_KERNEL
> > >> #define XIP_OFFSET SZ_8M
> > >> +#else
> > >> +#define XIP_OFFSET 0
> > >> #endif
> > >>
> > >> #ifndef __ASSEMBLY__
> > >
> > >
> > >
> > > _______________________________________________
> > > linux-riscv mailing list
> > > linux-riscv@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-riscv
> > >
next prev parent reply other threads:[~2021-06-03 13:59 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 8:27 [PATCH v3 0/3] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-03 8:27 ` [PATCH v3 1/3] riscv: Factorize xip and !xip kernel address conversion macros Alexandre Ghiti
2021-06-03 11:39 ` Anup Patel
2021-06-03 12:27 ` Jisheng Zhang
2021-06-03 12:49 ` Jisheng Zhang
2021-06-03 15:51 ` Vitaly Wool
2021-06-03 15:49 ` Jisheng Zhang
2021-06-03 12:57 ` Alex Ghiti
2021-06-03 13:16 ` Anup Patel
2021-06-03 13:53 ` Jisheng Zhang [this message]
2021-06-03 15:06 ` Alex Ghiti
2021-06-03 15:16 ` Jisheng Zhang
2021-06-03 8:27 ` [PATCH v3 2/3] riscv: Introduce set_kernel_memory helper Alexandre Ghiti
2021-06-03 11:35 ` Anup Patel
2021-06-03 8:27 ` [PATCH v3 3/3] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-03 11:45 ` Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210603215337.4da052e2@xhacker \
--to=jszhang3@mail.ustc.edu.cn \
--cc=alex@ghiti.fr \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=hch@infradead.org \
--cc=jszhang@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=zong.li@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).