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From: Jon Lin <jon.lin@rock-chips.com>
To: linux-spi@vger.kernel.org
Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org,
	heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com,
	yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	macroalpha82@gmail.com, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, mturquette@baylibre.com,
	sboyd@kernel.org, linux-clk@vger.kernel.org,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v7 5/9] clk: rockchip: Add support for hclk_sfc on rk3036
Date: Wed,  9 Jun 2021 22:13:44 +0800	[thread overview]
Message-ID: <20210609141348.19178-1-jon.lin@rock-chips.com> (raw)
In-Reply-To: <20210609140412.16058-1-jon.lin@rock-chips.com>

From: Chris Morgan <macromorgan@hotmail.com>

Add support for the bus clock for the serial flash controller on the
rk3036. Taken from the Rockchip BSP kernel but not tested on real
hardware (as I lack a 3036 based SoC to test).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
---

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None

 drivers/clk/rockchip/clk-rk3036.c      | 2 +-
 include/dt-bindings/clock/rk3036-cru.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 1986856d94b2..828af715d92e 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -404,7 +404,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 	GATE(HCLK_OTG0, "hclk_otg0", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 13, GFLAGS),
 	GATE(HCLK_OTG1, "hclk_otg1", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 3, GFLAGS),
 	GATE(HCLK_I2S, "hclk_i2s", "hclk_peri", 0, RK2928_CLKGATE_CON(7), 2, GFLAGS),
-	GATE(0, "hclk_sfc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(3), 14, GFLAGS),
+	GATE(HCLK_SFC, "hclk_sfc", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 14, GFLAGS),
 	GATE(HCLK_MAC, "hclk_mac", "hclk_peri", 0, RK2928_CLKGATE_CON(3), 5, GFLAGS),
 
 	/* pclk_peri gates */
diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h
index 35a5a01f9697..a96a9870ad59 100644
--- a/include/dt-bindings/clock/rk3036-cru.h
+++ b/include/dt-bindings/clock/rk3036-cru.h
@@ -81,6 +81,7 @@
 #define HCLK_OTG0		449
 #define HCLK_OTG1		450
 #define HCLK_NANDC		453
+#define HCLK_SFC		454
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459
-- 
2.17.1




  parent reply	other threads:[~2021-06-09 14:14 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-09 14:04 [PATCH v7 0/9] Add Rockchip SFC(serial flash controller) support Jon Lin
2021-06-09 14:04 ` [PATCH v7 1/9] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Jon Lin
2021-06-09 16:16   ` Rob Herring
2021-06-10  2:43   ` Rob Herring
2021-06-10  3:02     ` Kever Yang
2021-06-11 16:32       ` Ezequiel Garcia
2021-06-16 15:38         ` Rob Herring
2021-06-17  1:51           ` Kever Yang
2021-06-09 14:04 ` [PATCH v7 2/9] spi: rockchip-sfc: add rockchip " Jon Lin
2021-06-09 18:45   ` Chris Morgan
2021-06-09 14:04 ` [PATCH v7 3/9] arm64: dts: rockchip: Add SFC to PX30 Jon Lin
2021-06-09 14:04 ` [PATCH v7 4/9] clk: rockchip: rk3036: fix up the sclk_sfc parent error Jon Lin
2021-06-09 14:13 ` Jon Lin [this message]
2021-06-09 14:13   ` [PATCH v7 6/9] arm: dts: rockchip: Add SFC to RK3036 Jon Lin
2021-06-09 14:13   ` [PATCH v7 7/9] arm: dts: rockchip: Add SFC to RV1108 Jon Lin
2021-06-09 14:13   ` [PATCH v7 8/9] arm64: dts: rockchip: Add SFC to RK3308 Jon Lin
2021-06-09 14:13   ` [PATCH v7 9/9] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Jon Lin
2021-06-10 17:36     ` Chris Morgan
2021-06-11  2:26       ` Jon Lin
     [not found]         ` <SN6PR06MB5342327048383CC3D416C93DA5349@SN6PR06MB5342.namprd06.prod.outlook.com>
2021-06-11  3:54           ` Jon Lin

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