From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D453C48BE5 for ; Fri, 11 Jun 2021 17:19:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 47C1C613CF for ; Fri, 11 Jun 2021 17:19:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231713AbhFKRVp (ORCPT ); Fri, 11 Jun 2021 13:21:45 -0400 Received: from mail-pg1-f180.google.com ([209.85.215.180]:37858 "EHLO mail-pg1-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231706AbhFKRVb (ORCPT ); Fri, 11 Jun 2021 13:21:31 -0400 Received: by mail-pg1-f180.google.com with SMTP id t9so2996879pgn.4 for ; Fri, 11 Jun 2021 10:19:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MxHhk0AJID3+7I6yHlvZtpvbI+6drKtSVd3mPYCYE2M=; b=A313UfQaZbAGU0tmFpflQnRsubsorsT1R5wRZGGGspt60UTi149yLVED0Wmw8W5dih o7GyOfqwthSBTPT3bedP1VA3xD0YdRu9+1RHlOTmrDMZZaOGmGrLTzPHkza7pkytnJHc q3jWwThBzNeHNwcuMk9IE95Z1K1YZkbXgf+Ow= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MxHhk0AJID3+7I6yHlvZtpvbI+6drKtSVd3mPYCYE2M=; b=kdhsd4GQSzDpf+z8UNqa2ndDmxOIAiiUIzaxSc/fOsTIsJeMTPr0W+VuzAB7zX1zH+ JMqijOlpnKYgAywno9dB1tcKWkMN3L4AnRg6xN81Ez3XxiUdnbSMAUgYItPybbpj8S3t 5uNzLOluoie5Nm1qXv0LatUt7Az0Oj1J3KcfCoUdaUe+qRpbByBtmqc5HZID7Ws1eVHx 0bJRa/SKflLlhdPo/cmRRgieJKPpfLmrFfIDGE1UJ1ZZew2S/uYtTggGz+41kItww/w0 IU+oC62xpWTCFzRt/W4SZ98NcAmPaiZAJ/ryHyTJzNxTfTorSqzT0xmf/xC4Vi/6jaG2 e3WA== X-Gm-Message-State: AOAM533bz3smu+O9PxEznIkw6GnINsXfUpqhLue4WY/tEVumgWTzf1Z7 FbfTdBgPjSQSF6BxYYaDO1NOwQ== X-Google-Smtp-Source: ABdhPJw61Eqdi05nA4ZLp9ufWDTGiTpEWmqClhf+ojzQe8xNLvQlrC0sxacoxBFlKtgKvrHpb+D4Uw== X-Received: by 2002:a63:9f19:: with SMTP id g25mr4634379pge.265.1623431899689; Fri, 11 Jun 2021 10:18:19 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:4128:5428:5cd0:cfa5]) by smtp.gmail.com with ESMTPSA id f17sm5837850pgm.37.2021.06.11.10.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 10:18:19 -0700 (PDT) From: Douglas Anderson To: Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Sam Ravnborg Cc: Maarten Lankhorst , linux-arm-msm@vger.kernel.org, Bjorn Andersson , Thierry Reding , Stanislav Lisovskiy , Lyude Paul , Stephen Boyd , Steev Klimaszewski , Linus W , robdclark@chromium.org, dri-devel@lists.freedesktop.org, Douglas Anderson , Daniel Vetter , David Airlie , Jernej Skrabec , Robert Foss , linux-kernel@vger.kernel.org Subject: [PATCH v10 09/11] drm/bridge: ti-sn65dsi86: Don't read EDID blob over DDC Date: Fri, 11 Jun 2021 10:17:45 -0700 Message-Id: <20210611101711.v10.9.I9330684c25f65bb318eff57f0616500f83eac3cc@changeid> X-Mailer: git-send-email 2.32.0.272.g935e593368-goog In-Reply-To: <20210611171747.1263039-1-dianders@chromium.org> References: <20210611171747.1263039-1-dianders@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is really just a revert of commit 58074b08c04a ("drm/bridge: ti-sn65dsi86: Read EDID blob over DDC"), resolving conflicts. The old code failed to read the EDID properly in a very important case: before the bridge's pre_enable() was called. The way things need to work: 1. Read the EDID. 2. Based on the EDID, decide on video settings and pixel clock. 3. Enable the bridge w/ the desired settings. The way things were working: 1. Try to read the EDID but fail; fall back to hardcoded values. 2. Based on hardcoded values, decide on video settings and pixel clock. 3. Enable the bridge w/ the desired settings. 4. Try again to read the EDID, it works now! 5. Realize that the hardcoded settings weren't quite right. 6. Disable / reenable the bridge w/ the right settings. The reasons for the failures were twofold: a) Since we never ran the bridge chip's pre-enable then we never set the bit to ignore HPD. This meant the bridge chip didn't even _try_ to go out on the bus and communicate with the panel. b) Even if we fixed things to ignore HPD, the EDID still wouldn't read if the panel wasn't on. Instead of reverting the code, we could fix it to set the HPD bit and also power on the panel. However, it also works nicely to just let the panel code read the EDID. Now that we've split the driver up we can expose the DDC AUX channel bus to the panel node. The panel can take charge of reading the EDID. NOTE: in order for things to work, anyone that needs to read the EDID will need to instantiate their panel using the new DP AUX bus (AKA by listing their panel under the "aux-bus" node of the bridge chip in the device tree). In the future if we want to use the bridge chip to provide a full external DP port (which won't have a panel) then we will have to conditinally add EDID reading back in. Suggested-by: Andrzej Hajda Signed-off-by: Douglas Anderson Reviewed-by: Bjorn Andersson --- (no changes since v7) Changes in v7: - Adjusted commit message to talk about DP AUX bus. drivers/gpu/drm/bridge/ti-sn65dsi86.c | 22 ---------------------- 1 file changed, 22 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 32bd35c98d95..b544cbce7fdd 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -126,7 +126,6 @@ * @connector: Our connector. * @host_node: Remote DSI node. * @dsi: Our MIPI DSI source. - * @edid: Detected EDID of eDP panel. * @refclk: Our reference clock. * @panel: Our panel. * @enable_gpio: The GPIO we toggle to enable the bridge. @@ -157,7 +156,6 @@ struct ti_sn65dsi86 { struct drm_dp_aux aux; struct drm_bridge bridge; struct drm_connector connector; - struct edid *edid; struct device_node *host_node; struct mipi_dsi_device *dsi; struct clk *refclk; @@ -406,24 +404,6 @@ connector_to_ti_sn65dsi86(struct drm_connector *connector) static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector) { struct ti_sn65dsi86 *pdata = connector_to_ti_sn65dsi86(connector); - struct edid *edid = pdata->edid; - int num, ret; - - if (!edid) { - pm_runtime_get_sync(pdata->dev); - edid = pdata->edid = drm_get_edid(connector, &pdata->aux.ddc); - pm_runtime_put_autosuspend(pdata->dev); - } - - if (edid && drm_edid_is_valid(edid)) { - ret = drm_connector_update_edid_property(connector, edid); - if (!ret) { - num = drm_add_edid_modes(connector, edid); - if (num) - return num; - } - } - return drm_panel_get_modes(pdata->panel, connector); } @@ -1356,8 +1336,6 @@ static void ti_sn_bridge_remove(struct auxiliary_device *adev) mipi_dsi_device_unregister(pdata->dsi); } - kfree(pdata->edid); - drm_bridge_remove(&pdata->bridge); of_node_put(pdata->host_node); -- 2.32.0.272.g935e593368-goog