From: Tinghan Shen <tinghan.shen@mediatek.com>
To: <robh+dt@kernel.org>, <matthias.bgg@gmail.com>
Cc: <devicetree@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>,
<seiya.wang@mediatek.com>, <wenst@google.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Jason-JH Lin <jason-jh.lin@mediatek.com>
Subject: [PATCH 24/27] arm64: dts: mt8195: add gce setting for disply node
Date: Wed, 16 Jun 2021 01:32:30 +0800 [thread overview]
Message-ID: <20210615173233.26682-24-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20210615173233.26682-1-tinghan.shen@mediatek.com>
From: Jason-JH Lin <jason-jh.lin@mediatek.com>
add gce setting for disply node
Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 51edb8ee35a8..e273833a49f8 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2245,6 +2245,7 @@
reg-names = "vdosys0_config";
iommus = <&iommu_vdo M4U_PORT_L0_DISP_RDMA0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mboxes = <&gce1 0 0 CMDQ_THR_PRIO_4>;
};
mutex: disp_mutex0@1c016000 {
@@ -2255,6 +2256,7 @@
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clock-names = "vdo0_mutex";
interrupts = <GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,gce-events = <CMDQ_EVENT_VDO0_DISP_STREAM_DONE_0>;
};
ovl0: disp_ovl@1c000000 {
@@ -2264,6 +2266,7 @@
clocks = <&vdosys0 CLK_VDO0_DISP_OVL0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
iommus = <&iommu_vdo M4U_PORT_L0_DISP_OVL0_RDMA0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x0000 0x1000>;
};
rdma0: disp_rdma@1c002000 {
@@ -2273,6 +2276,7 @@
clocks = <&vdosys0 CLK_VDO0_DISP_RDMA0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
iommus = <&iommu_vdo M4U_PORT_L0_DISP_RDMA0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x2000 0x1000>;
};
color0: disp_color@1c003000 {
@@ -2281,6 +2285,7 @@
interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DISP_COLOR0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x3000 0x1000>;
};
ccorr0: disp_ccorr@1c004000 {
@@ -2289,6 +2294,7 @@
interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DISP_CCORR0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x4000 0x1000>;
};
aal0: disp_aal@1c005000 {
@@ -2297,6 +2303,7 @@
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DISP_AAL0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x5000 0x1000>;
};
gamma0: disp_gamma@1c006000 {
@@ -2305,6 +2312,7 @@
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DISP_GAMMA0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x6000 0x1000>;
};
dither0: disp_dither@1c007000 {
@@ -2313,6 +2321,7 @@
interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DISP_DITHER0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x7000 0x1000>;
};
merge0: disp_vpp_merge0@1c014000 {
@@ -2321,6 +2330,7 @@
interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_VPP_MERGE0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c01XXXX 0x4000 0x1000>;
};
dsc0: disp_dsc_wrap@1c009000 {
@@ -2329,6 +2339,7 @@
interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DSC_WRAP0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
+ mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x9000 0x1000>;
};
dp_intf0: dp_intf0@1c015000 {
--
2.18.0
next prev parent reply other threads:[~2021-06-15 17:33 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-15 17:32 arm64: dts: mt8195: Add Mediatek SoC MT8195 device nodes Tinghan Shen
2021-06-15 17:32 ` [PATCH 01/27] arm64: dts: mt8195: add infracfg_rst node Tinghan Shen
2021-06-16 8:01 ` Chen-Yu Tsai
2021-06-15 17:32 ` [PATCH 02/27] arm64: dts: mt8195: add pinctrl node Tinghan Shen
2021-06-15 17:32 ` [PATCH 03/27] arm64: dts: mt8195: add pwrap node Tinghan Shen
2021-06-15 17:32 ` [PATCH 05/27] arm64: dts: mt8195: add spmi node Tinghan Shen
2021-06-15 17:32 ` [PATCH 06/27] arm64: dts: mt8195: add clock controllers Tinghan Shen
2021-06-15 17:32 ` [PATCH 07/27] arm64: dts: mt8195: add power domains controller Tinghan Shen
2021-06-15 17:32 ` [PATCH 08/27] arm64: dts: mt8195: add i2c dts Tinghan Shen
2021-06-15 17:32 ` [PATCH 09/27] arm64: dts: mt8195: add spi controller Tinghan Shen
2021-06-15 17:32 ` [PATCH 10/27] arm64: dts: mt8195: add PCIe phy device node Tinghan Shen
2021-06-15 17:32 ` [PATCH 11/27] arm64: dts: mt8195: add PCIe " Tinghan Shen
2021-06-15 17:32 ` [PATCH 12/27] arm64: dts: mt8195: fix mmc driver Tinghan Shen
2021-06-16 1:30 ` Wenbin Mei
2021-06-15 17:32 ` [PATCH 13/27] arm64: dts: mt8195: add hdmi nodes Tinghan Shen
2021-06-15 17:32 ` [PATCH 14/27] arm64: dts: mt8195: add usb support Tinghan Shen
2021-06-15 17:32 ` [PATCH 15/27] arm64: dts: mt8195: add IOMMU and smi nodes Tinghan Shen
2021-06-15 17:32 ` [PATCH 16/27] arm64: dts: mt8195: add display node Tinghan Shen
2021-06-15 23:14 ` Chun-Kuang Hu
2021-06-15 17:32 ` [PATCH 17/27] arm64: dts: mt8195: add merge node Tinghan Shen
2021-06-15 17:32 ` [PATCH 18/27] arm64: dts: mt8195: add dsc node Tinghan Shen
2021-06-15 17:32 ` [PATCH 19/27] arm64: dts: mt8195: add dp_intf node Tinghan Shen
2021-06-15 17:32 ` [PATCH 20/27] arm64: dts: mt8195: fix nor_flash node Tinghan Shen
2021-06-15 17:32 ` [PATCH 21/27] arm64: dts: mt8195: add audio related nodes Tinghan Shen
2021-06-15 17:32 ` [PATCH 22/27] arm64: dts: mt8195: add edp nodes Tinghan Shen
2021-06-15 23:30 ` Chun-Kuang Hu
2021-06-15 17:32 ` [PATCH 23/27] arm64: dts: mt8195: add gce node Tinghan Shen
2021-06-18 14:07 ` Chun-Kuang Hu
2021-06-15 17:32 ` Tinghan Shen [this message]
2021-06-15 17:32 ` [PATCH 25/27] arm64: dts: mt8195: add vdosys1 support for MT8195 Tinghan Shen
2021-06-15 23:23 ` Chun-Kuang Hu
2021-06-15 17:32 ` [PATCH 26/27] arm64: dts: mt8195: add scp device node Tinghan Shen
2021-06-15 17:32 ` [PATCH 27/27] arm64: dts: mt8195: add cpufreq device nodes Tinghan Shen
2021-06-18 14:21 ` arm64: dts: mt8195: Add Mediatek SoC MT8195 " Matthias Brugger
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