From: Qing Zhang <zhangqing@loongson.cn>
To: Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Rob Herring <robh+dt@kernel.org>
Cc: Huacai Chen <chenhc@lemote.com>,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, netdev@vger.kernel.org
Subject: [PATCH 2/4] MIPS: Loongson64: Add GMAC support for Loongson-2K1000
Date: Fri, 18 Jun 2021 10:53:35 +0800 [thread overview]
Message-ID: <20210618025337.5705-2-zhangqing@loongson.cn> (raw)
In-Reply-To: <20210618025337.5705-1-zhangqing@loongson.cn>
The GMAC module is now supported, enable it.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
---
.../boot/dts/loongson/loongson64-2k1000.dtsi | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 569e814def83..5747f171de29 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -114,6 +114,52 @@ pci@1a000000 {
ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000 0x0 0x00010000>,
<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
+ gmac@3,0 {
+ compatible = "pci0014,7a03.0",
+ "pci0014,7a03",
+ "pciclass0c0320",
+ "pciclass0c03",
+ "loongson, pci-gmac";
+
+ reg = <0x1800 0x0 0x0 0x0 0x0>;
+ interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
+ <13 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "macirq", "eth_lpi";
+ interrupt-parent = <&liointc0>;
+ phy-mode = "rgmii";
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+ };
+
+ gmac@3,1 {
+ compatible = "pci0014,7a03.0",
+ "pci0014,7a03",
+ "pciclass0c0320",
+ "pciclass0c03",
+ "loongson, pci-gmac";
+
+ reg = <0x1900 0x0 0x0 0x0 0x0>;
+ interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
+ <15 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "macirq", "eth_lpi";
+ interrupt-parent = <&liointc0>;
+ phy-mode = "rgmii";
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy1: ethernet-phy@1 {
+ reg = <0>;
+ };
+ };
+ };
+
ehci@4,1 {
compatible = "pci0014,7a14.0",
"pci0014,7a14",
--
2.31.0
next prev parent reply other threads:[~2021-06-18 2:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-18 2:53 [PATCH 1/4] stmmac: pci: Add dwmac support for Loongson Qing Zhang
2021-06-18 2:53 ` Qing Zhang [this message]
2021-06-21 2:59 ` [PATCH 2/4] MIPS: Loongson64: Add GMAC support for Loongson-2K1000 Andrew Lunn
2021-06-18 2:53 ` [PATCH 3/4] MIPS: Loongson64: DTS: Add GMAC support for LS7A PCH Qing Zhang
2021-06-18 2:53 ` [PATCH 4/4] dt-bindings: dwmac: Add bindings for new Loongson SoC and bridge chip Qing Zhang
2021-06-21 2:55 ` [PATCH 1/4] stmmac: pci: Add dwmac support for Loongson Andrew Lunn
2021-06-22 2:10 ` zhangqing
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