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* [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
@ 2021-06-18 14:18 Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
                   ` (70 more replies)
  0 siblings, 71 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The main parts of this series are:

  - Yet more bug fixes

  - Simplification and removal/replacement of redundant and/or
    overengineered code.

  - Name space cleanup as the existing names were just a permanent source
    of confusion.

  - Clear seperation of user ABI and kernel internal state handling.

  - Removal of PKRU from being XSTATE managed in the kernel because PKRU
    has to be eagerly restored on context switch and keeping it in sync
    in the xstate buffer is just pointless overhead and fragile.

    The kernel still XSAVEs PKRU on context switch but the value in the
    buffer is not longer used and never restored from the buffer.

    This still needs to be cleaned up, but the series is already 40+
    patches large and the cleanup of this is not a functional problem.

    The functional issues of PKRU management are fully addressed with the
    series as is.

  - Cleanup of fpu signal restore

    - Make the fast path self contained. Handle #PF directly and skip
      the slow path on any other exception as that will just end up
      with the same result that the frame is invalid. This allows
      the compiler to optimize the slow path out for 64bit kernels
      w/o ia32 emulation.

    - Reduce code duplication and unnecessary operations
      

It applies on top of

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git master

and is also available via git:

  git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu

This is a follow up to V2 which can be found here:

     https://lore.kernel.org/r/20210614154408.673478623@linutronix.de

Changes vs. V2:

  - Fixed the testing fallout (Dave, Kan)

  - Fixed a few issues found by myself when going through the lot
    with a fine comb, especially MXCSR handling

  - Drop the FNSAVE optimizations

  - Cleanup of signal restore

  - Addressed review comments, mostly comments and a hopefully better
    naming scheme which now just uses the instruction names and
    consolidates everything else on save/restore so it's close to the way
    how the hardware works.

  - A few cleanups and simplifications on the way (mostly regset related).

  - Picked up tags

With the above I'm not intending to do any further surgery on that
code at the moment, though there is still room for improvement which
can and has to be worked on when new bits are added.

Thanks,

	tglx
---
 arch/x86/events/intel/lbr.c          |    6 
 arch/x86/include/asm/fpu/internal.h  |  211 +++-------
 arch/x86/include/asm/fpu/xstate.h    |   70 ++-
 arch/x86/include/asm/pgtable.h       |   57 --
 arch/x86/include/asm/pkeys.h         |    9 
 arch/x86/include/asm/pkru.h          |   62 +++
 arch/x86/include/asm/processor.h     |    9 
 arch/x86/include/asm/special_insns.h |   14 
 arch/x86/kernel/cpu/common.c         |   34 -
 arch/x86/kernel/fpu/core.c           |  276 +++++++------
 arch/x86/kernel/fpu/init.c           |   15 
 arch/x86/kernel/fpu/regset.c         |  220 ++++++-----
 arch/x86/kernel/fpu/signal.c         |  423 +++++++++------------
 arch/x86/kernel/fpu/xstate.c         |  693 ++++++++++++++---------------------
 arch/x86/kernel/process.c            |   22 -
 arch/x86/kernel/process_64.c         |   28 +
 arch/x86/kernel/traps.c              |    5 
 arch/x86/kvm/svm/sev.c               |    1 
 arch/x86/kvm/x86.c                   |   56 +-
 arch/x86/mm/extable.c                |    2 
 arch/x86/mm/fault.c                  |    2 
 arch/x86/mm/pkeys.c                  |   22 -
 include/linux/pkeys.h                |    4 
 23 files changed, 1060 insertions(+), 1181 deletions(-)



^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-19  8:34   ` Borislav Petkov
  2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE Thomas Gleixner
                   ` (69 subsequent siblings)
  70 siblings, 2 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Thomas Gleixner <tglx@linutronix.de>

sanitize_restored_user_xstate() preserves the supervisor states only
when the fx_only argument is zero, which allows unpriviledged user space
to put supervisor states back into init state.

Preserve them unconditionally.

Fixes: 5d6b6a6f9b5c ("x86/fpu/xstate: Update sanitize_restored_xstate() for supervisor xstates")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
---
 arch/x86/kernel/fpu/signal.c |   26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -221,28 +221,18 @@ sanitize_restored_user_xstate(union fpre
 
 	if (use_xsave()) {
 		/*
-		 * Note: we don't need to zero the reserved bits in the
-		 * xstate_header here because we either didn't copy them at all,
-		 * or we checked earlier that they aren't set.
+		 * Clear all features bit which are not set in
+		 * user_xfeatures and clear all extended features
+		 * for fx_only mode.
 		 */
+		u64 mask = fx_only ? XFEATURE_MASK_FPSSE : user_xfeatures;
 
 		/*
-		 * 'user_xfeatures' might have bits clear which are
-		 * set in header->xfeatures. This represents features that
-		 * were in init state prior to a signal delivery, and need
-		 * to be reset back to the init state.  Clear any user
-		 * feature bits which are set in the kernel buffer to get
-		 * them back to the init state.
-		 *
-		 * Supervisor state is unchanged by input from userspace.
-		 * Ensure supervisor state bits stay set and supervisor
-		 * state is not modified.
+		 * Supervisor state has to be preserved. The sigframe
+		 * restore can only modify user features, i.e. @mask
+		 * cannot contain them.
 		 */
-		if (fx_only)
-			header->xfeatures = XFEATURE_MASK_FPSSE;
-		else
-			header->xfeatures &= user_xfeatures |
-					     xfeatures_mask_supervisor();
+		header->xfeatures &= mask | xfeatures_mask_supervisor();
 	}
 
 	if (use_fxsr()) {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 20:41   ` Thomas Gleixner
  2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling Thomas Gleixner
                   ` (68 subsequent siblings)
  70 siblings, 2 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The XSAVE init code initializes all enabled and supported components with
XRSTOR(S) to init state. Then it XSAVEs the state of the components back
into init_fpstate which is used in several places to fill in the init state
of components.

This works correctly with XSAVE, but not with XSAVEOPT and XSAVES because
those use the init optimization and skip writing state of components which
are in init state. So init_fpstate.xsave still contains all zeroes after
this operation.

There are two ways to solve that:

   1) Use XSAVE unconditionally, but that requires to reshuffle the buffer when
      XSAVES is enabled because XSAVES uses compacted format.

   2) Save the components which are known to have a non-zero init state by other
      means.

Looking deeper #2 is the right thing to do because all components the
kernel supports have all-zeroes init state except the legacy features (FP,
SSE). Those cannot be hard coded because the states are not identical on all
CPUs, but they can be saved with FXSAVE which avoids all conditionals.

Use FXSAVE to save the legacy FP/SSE components in init_fpstate along with
a BUILD_BUG_ON() which reminds developers to validate that a newly added
component has all zeroes init state. As a bonus remove the now unused
copy_xregs_to_kernel_booting() crutch.

The XSAVE and reshuffle method can still be implemented in the unlikely
case that components are added which have a non-zero init state and no
other means to save them. For now FXSAVE is just simple and good enough.

Fixes: 6bad06b76892 ("x86, xsave: Use xsaveopt in context-switch path when supported")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
---
V3: Adjust comment - Boris
V2: New patch
---
 arch/x86/include/asm/fpu/internal.h |   30 +++++++-------------------
 arch/x86/kernel/fpu/xstate.c        |   41 +++++++++++++++++++++++++++++++++---
 2 files changed, 46 insertions(+), 25 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -204,6 +204,14 @@ static inline void copy_fxregs_to_kernel
 		asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu->state.fxsave));
 }
 
+static inline void fxsave(struct fxregs_state *fx)
+{
+	if (IS_ENABLED(CONFIG_X86_32))
+		asm volatile( "fxsave %[fx]" : [fx] "=m" (*fx));
+	else
+		asm volatile("fxsaveq %[fx]" : [fx] "=m" (*fx));
+}
+
 /* These macros all use (%edi)/(%rdi) as the single memory argument. */
 #define XSAVE		".byte " REX_PREFIX "0x0f,0xae,0x27"
 #define XSAVEOPT	".byte " REX_PREFIX "0x0f,0xae,0x37"
@@ -270,28 +278,6 @@ static inline void copy_fxregs_to_kernel
 
 /*
  * This function is called only during boot time when x86 caps are not set
- * up and alternative can not be used yet.
- */
-static inline void copy_xregs_to_kernel_booting(struct xregs_state *xstate)
-{
-	u64 mask = xfeatures_mask_all;
-	u32 lmask = mask;
-	u32 hmask = mask >> 32;
-	int err;
-
-	WARN_ON(system_state != SYSTEM_BOOTING);
-
-	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
-	else
-		XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
-
-	/* We should never fault when copying to a kernel buffer: */
-	WARN_ON_FPU(err);
-}
-
-/*
- * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
  */
 static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -441,12 +441,35 @@ static void __init print_xstate_offset_s
 }
 
 /*
+ * All supported features have either init state all zeros or are
+ * handled in setup_init_fpu() individually. This is an explicit
+ * feature list and does not use XFEATURE_MASK*SUPPORTED to catch
+ * newly added supported features at build time and make people
+ * actually look at the init state for the new feature.
+ */
+#define XFEATURES_INIT_FPSTATE_HANDLED		\
+	(XFEATURE_MASK_FP |			\
+	 XFEATURE_MASK_SSE |			\
+	 XFEATURE_MASK_YMM |			\
+	 XFEATURE_MASK_OPMASK |			\
+	 XFEATURE_MASK_ZMM_Hi256 |		\
+	 XFEATURE_MASK_Hi16_ZMM	 |		\
+	 XFEATURE_MASK_PKRU |			\
+	 XFEATURE_MASK_BNDREGS |		\
+	 XFEATURE_MASK_BNDCSR |			\
+	 XFEATURE_MASK_PASID)
+
+/*
  * setup the xstate image representing the init state
  */
 static void __init setup_init_fpu_buf(void)
 {
 	static int on_boot_cpu __initdata = 1;
 
+	BUILD_BUG_ON((XFEATURE_MASK_USER_SUPPORTED |
+		      XFEATURE_MASK_SUPERVISOR_SUPPORTED) !=
+		     XFEATURES_INIT_FPSTATE_HANDLED);
+
 	WARN_ON_FPU(!on_boot_cpu);
 	on_boot_cpu = 0;
 
@@ -466,10 +489,22 @@ static void __init setup_init_fpu_buf(vo
 	copy_kernel_to_xregs_booting(&init_fpstate.xsave);
 
 	/*
-	 * Dump the init state again. This is to identify the init state
-	 * of any feature which is not represented by all zero's.
+	 * All components are now in init state. Read the state back so
+	 * that init_fpstate contains all non-zero init state. This only
+	 * workswith XSAVE, but not with XSAVEOPT and XSAVES because
+	 * those use the init optimization which skips writing data for
+	 * components in init state.
+	 *
+	 * XSAVE could be used, but that would require to reshuffle the
+	 * data when XSAVES is available because XSAVES uses xstate
+	 * compaction. But doing so is a pointless exercise because most
+	 * components have an all zeros init state except for the legacy
+	 * ones (FP and SSE). Those can be saved with FXSAVE into the
+	 * legacy area. Adding new features requires to ensure that init
+	 * state is all zeroes or if not to add the necessary handling
+	 * here.
 	 */
-	copy_xregs_to_kernel_booting(&init_fpstate.xsave);
+	fxsave(&init_fpstate.fxsave);
 }
 
 static int xfeature_uncompacted_offset(int xfeature_nr)


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-19  9:41   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 04/66] x86/pkeys: Revert a5eff7259790 ("x86/pkeys: Add PKRU value to init_fpstate") Thomas Gleixner
                   ` (67 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The gap handling in copy_xstate_to_kernel() is wrong when XSAVES is in use.

Using init_fpstate for copying the init state of features which are
not set in the xstate header is only correct for the legacy area, but
not for the extended features area because when XSAVES is in use then
init_fpstate is in compacted form which means the xstate offsets which
are used to copy from init_fpstate are not valid.

Fortunately this is not a real problem today because all extended
features in use have an all zeros init state, but it is wrong
nevertheless and with a potentially dynamically sized init_fpstate
this would result in access outside of the init_fpstate.

Fix this by keeping track of the last copied state in the target buffer and
explicitly zero it when there is a feature or alignment gap.

Use the compacted offset when accessing the extended feature space in
init_fpstate.

As this is not a functional issue on older kernels this is intentionally
not tagged for stable.

Fixes: b8be15d58806 ("x86/fpu/xstate: Re-enable XSAVES")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Remove the AVX/SEE thinko
    Fix comments (Boris)
V2: New patch
---
 arch/x86/kernel/fpu/xstate.c |  105 ++++++++++++++++++++++++-------------------
 1 file changed, 61 insertions(+), 44 deletions(-)

--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1084,20 +1084,10 @@ static inline bool xfeatures_mxcsr_quirk
 	return true;
 }
 
-static void fill_gap(struct membuf *to, unsigned *last, unsigned offset)
+static void copy_feature(bool from_xstate, struct membuf *to, void *xstate,
+			 void *init_xstate, unsigned int size)
 {
-	if (*last >= offset)
-		return;
-	membuf_write(to, (void *)&init_fpstate.xsave + *last, offset - *last);
-	*last = offset;
-}
-
-static void copy_part(struct membuf *to, unsigned *last, unsigned offset,
-		      unsigned size, void *from)
-{
-	fill_gap(to, last, offset);
-	membuf_write(to, from, size);
-	*last = offset + size;
+	membuf_write(to, from_xstate ? xstate : init_xstate, size);
 }
 
 /*
@@ -1109,10 +1099,10 @@ static void copy_part(struct membuf *to,
  */
 void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave)
 {
+	const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr);
+	struct xregs_state *xinit = &init_fpstate.xsave;
 	struct xstate_header header;
-	const unsigned off_mxcsr = offsetof(struct fxregs_state, mxcsr);
-	unsigned size = to.left;
-	unsigned last = 0;
+	unsigned int zerofrom;
 	int i;
 
 	/*
@@ -1122,41 +1112,68 @@ void copy_xstate_to_kernel(struct membuf
 	header.xfeatures = xsave->header.xfeatures;
 	header.xfeatures &= xfeatures_mask_user();
 
-	if (header.xfeatures & XFEATURE_MASK_FP)
-		copy_part(&to, &last, 0, off_mxcsr, &xsave->i387);
-	if (header.xfeatures & (XFEATURE_MASK_SSE | XFEATURE_MASK_YMM))
-		copy_part(&to, &last, off_mxcsr,
-			  MXCSR_AND_FLAGS_SIZE, &xsave->i387.mxcsr);
-	if (header.xfeatures & XFEATURE_MASK_FP)
-		copy_part(&to, &last, offsetof(struct fxregs_state, st_space),
-			  128, &xsave->i387.st_space);
-	if (header.xfeatures & XFEATURE_MASK_SSE)
-		copy_part(&to, &last, xstate_offsets[XFEATURE_SSE],
-			  256, &xsave->i387.xmm_space);
-	/*
-	 * Fill xsave->i387.sw_reserved value for ptrace frame:
-	 */
-	copy_part(&to, &last, offsetof(struct fxregs_state, sw_reserved),
-		  48, xstate_fx_sw_bytes);
-	/*
-	 * Copy xregs_state->header:
-	 */
-	copy_part(&to, &last, offsetof(struct xregs_state, header),
-		  sizeof(header), &header);
+	/* Copy FP state up to MXCSR */
+	copy_feature(header.xfeatures & XFEATURE_MASK_FP, &to, &xsave->i387,
+		     &xinit->i387, off_mxcsr);
+
+	/* Copy MXCSR when SSE or YMM are set in the feature mask */
+	copy_feature(header.xfeatures & (XFEATURE_MASK_SSE | XFEATURE_MASK_YMM),
+		     &to, &xsave->i387.mxcsr, &xinit->i387.mxcsr,
+		     MXCSR_AND_FLAGS_SIZE);
+
+	/* Copy the remaining FP state */
+	copy_feature(header.xfeatures & XFEATURE_MASK_FP,
+		     &to, &xsave->i387.st_space, &xinit->i387.st_space,
+		     sizeof(xsave->i387.st_space));
+
+	/* Copy the SSE state - shared with YMM, but independently managed */
+	copy_feature(header.xfeatures & XFEATURE_MASK_SSE,
+		     &to, &xsave->i387.xmm_space, &xinit->i387.xmm_space,
+		     sizeof(xsave->i387.xmm_space));
+
+	/* Zero the padding area */
+	membuf_zero(&to, sizeof(xsave->i387.padding));
+
+	/* Copy xsave->i387.sw_reserved */
+	membuf_write(&to, xstate_fx_sw_bytes, sizeof(xsave->i387.sw_reserved));
+
+	/* Copy the user space relevant state of @xsave->header */
+	membuf_write(&to, &header, sizeof(header));
+
+	zerofrom = offsetof(struct xregs_state, extended_state_area);
 
 	for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
 		/*
-		 * Copy only in-use xstates:
+		 * The ptrace buffer is in non-compacted XSAVE format.
+		 * In non-compacted format disabled features still occupy
+		 * state space, but there is no state to copy from in the
+		 * compacted init_fpstate. The gap tracking will zero this
+		 * later.
+		 */
+		if (!(xfeatures_mask_user() & BIT_ULL(i)))
+			continue;
+
+		/*
+		 * If there was a feature or alignment gap, zero the space
+		 * in the destination buffer.
 		 */
-		if ((header.xfeatures >> i) & 1) {
-			void *src = __raw_xsave_addr(xsave, i);
+		if (zerofrom < xstate_offsets[i])
+			membuf_zero(&to, xstate_offsets[i] - zerofrom);
 
-			copy_part(&to, &last, xstate_offsets[i],
-				  xstate_sizes[i], src);
-		}
+		copy_feature(header.xfeatures & BIT_ULL(i), &to,
+			     __raw_xsave_addr(xsave, i),
+			     __raw_xsave_addr(xinit, i),
+			     xstate_sizes[i]);
 
+		/*
+		 * Keep track of the last copied state in the non-compacted
+		 * target buffer for gap zeroing.
+		 */
+		zerofrom = xstate_offsets[i] + xstate_sizes[i];
 	}
-	fill_gap(&to, &last, size);
+
+	if (to.left)
+		membuf_zero(&to, to.left);
 }
 
 /*


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 04/66] x86/pkeys: Revert a5eff7259790 ("x86/pkeys: Add PKRU value to init_fpstate")
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (2 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 05/66] x86/fpu: Mark various FPU states __ro_after_init Thomas Gleixner
                   ` (66 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

This cannot work and it's unclear how that ever made a difference.

init_fpstate.xsave.header.xfeatures is always 0 so get_xsave_addr() will
always return a NULL pointer, which will prevent storing the default PKRU
value in initfp_state.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
V2: Fix subject
---
 arch/x86/kernel/cpu/common.c |    5 -----
 arch/x86/mm/pkeys.c          |    6 ------
 2 files changed, 11 deletions(-)

--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -466,8 +466,6 @@ static bool pku_disabled;
 
 static __always_inline void setup_pku(struct cpuinfo_x86 *c)
 {
-	struct pkru_state *pk;
-
 	/* check the boot processor, plus compile options for PKU: */
 	if (!cpu_feature_enabled(X86_FEATURE_PKU))
 		return;
@@ -478,9 +476,6 @@ static __always_inline void setup_pku(st
 		return;
 
 	cr4_set_bits(X86_CR4_PKE);
-	pk = get_xsave_addr(&init_fpstate.xsave, XFEATURE_PKRU);
-	if (pk)
-		pk->pkru = init_pkru_value;
 	/*
 	 * Setting X86_CR4_PKE will cause the X86_FEATURE_OSPKE
 	 * cpuid bit to be set.  We need to ensure that we
--- a/arch/x86/mm/pkeys.c
+++ b/arch/x86/mm/pkeys.c
@@ -10,7 +10,6 @@
 
 #include <asm/cpufeature.h>             /* boot_cpu_has, ...            */
 #include <asm/mmu_context.h>            /* vma_pkey()                   */
-#include <asm/fpu/internal.h>		/* init_fpstate			*/
 
 int __execute_only_pkey(struct mm_struct *mm)
 {
@@ -154,7 +153,6 @@ static ssize_t init_pkru_read_file(struc
 static ssize_t init_pkru_write_file(struct file *file,
 		 const char __user *user_buf, size_t count, loff_t *ppos)
 {
-	struct pkru_state *pk;
 	char buf[32];
 	ssize_t len;
 	u32 new_init_pkru;
@@ -177,10 +175,6 @@ static ssize_t init_pkru_write_file(stru
 		return -EINVAL;
 
 	WRITE_ONCE(init_pkru_value, new_init_pkru);
-	pk = get_xsave_addr(&init_fpstate.xsave, XFEATURE_PKRU);
-	if (!pk)
-		return -EINVAL;
-	pk->pkru = new_init_pkru;
 	return count;
 }
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 05/66] x86/fpu: Mark various FPU states __ro_after_init
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (3 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 04/66] x86/pkeys: Revert a5eff7259790 ("x86/pkeys: Add PKRU value to init_fpstate") Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init Thomas Gleixner
                   ` (65 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Nothing modifies these after booting.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Andy Lutomirski <luto@kernel.org>
---
V3: Remove xfeatures_mask_all as that needs more cleanups
---
 arch/x86/kernel/fpu/init.c   |    4 ++--
 arch/x86/kernel/fpu/xstate.c |   16 ++++++++++------
 2 files changed, 12 insertions(+), 8 deletions(-)

--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -89,7 +89,7 @@ static void fpu__init_system_early_gener
 /*
  * Boot time FPU feature detection code:
  */
-unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
+unsigned int mxcsr_feature_mask __ro_after_init = 0xffffffffu;
 EXPORT_SYMBOL_GPL(mxcsr_feature_mask);
 
 static void __init fpu__init_system_mxcsr(void)
@@ -135,7 +135,7 @@ static void __init fpu__init_system_gene
  * This is inherent to the XSAVE architecture which puts all state
  * components into a single, continuous memory block:
  */
-unsigned int fpu_kernel_xstate_size;
+unsigned int fpu_kernel_xstate_size __ro_after_init;
 EXPORT_SYMBOL_GPL(fpu_kernel_xstate_size);
 
 /* Get alignment of the TYPE. */
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -59,19 +59,23 @@ static short xsave_cpuid_features[] __in
  * This represents the full set of bits that should ever be set in a kernel
  * XSAVE buffer, both supervisor and user xstates.
  */
-u64 xfeatures_mask_all __read_mostly;
+u64 xfeatures_mask_all;
 
-static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
-static unsigned int xstate_sizes[XFEATURE_MAX]   = { [ 0 ... XFEATURE_MAX - 1] = -1};
-static unsigned int xstate_comp_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
-static unsigned int xstate_supervisor_only_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
+static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
+	{ [ 0 ... XFEATURE_MAX - 1] = -1};
+static unsigned int xstate_sizes[XFEATURE_MAX] __ro_after_init =
+	{ [ 0 ... XFEATURE_MAX - 1] = -1};
+static unsigned int xstate_comp_offsets[XFEATURE_MAX] __ro_after_init =
+	{ [ 0 ... XFEATURE_MAX - 1] = -1};
+static unsigned int xstate_supervisor_only_offsets[XFEATURE_MAX] __ro_after_init =
+	{ [ 0 ... XFEATURE_MAX - 1] = -1};
 
 /*
  * The XSAVE area of kernel can be in standard or compacted format;
  * it is always in standard format for user mode. This is the user
  * mode standard format size used for signal and ptrace frames.
  */
-unsigned int fpu_user_xstate_size;
+unsigned int fpu_user_xstate_size __ro_after_init;
 
 /*
  * Return whether the system supports a given xfeature.


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (4 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 05/66] x86/fpu: Mark various FPU states __ro_after_init Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-20  8:44   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask() Thomas Gleixner
                   ` (64 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Nothing has to modify this after init.

But of course there is code which unconditionaly masks xfeatures_mask_all
on CPU hotplug. This goes unnoticed during boot hotplug because at that
point the variable is still RW mapped.

This is broken in several ways:

  1) Masking this in post init CPU hotplug means that any
     modification of this state goes unnoticed until actual hotplug
     happens.

  2) If that ever happens then these bogus feature bits are already
     populated all over the place and the system is in inconsistent state
     vs. the compacted XSTATE offsets. If at all then this has to panic the
     machine because the inconsistency cannot be undone anymore.

Make this a one time paranoia check in xstate init code and disable xsave
when this happens.

Reported-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: New patch. Addresses the hotplug crash reported by Kan
---
 arch/x86/kernel/fpu/xstate.c |   28 +++++++++++++++-------------
 1 file changed, 15 insertions(+), 13 deletions(-)

--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -59,7 +59,7 @@ static short xsave_cpuid_features[] __in
  * This represents the full set of bits that should ever be set in a kernel
  * XSAVE buffer, both supervisor and user xstates.
  */
-u64 xfeatures_mask_all;
+u64 xfeatures_mask_all __ro_after_init;
 
 static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
 	{ [ 0 ... XFEATURE_MAX - 1] = -1};
@@ -213,19 +213,8 @@ void fpstate_sanitize_xstate(struct fpu
  */
 void fpu__init_cpu_xstate(void)
 {
-	u64 unsup_bits;
-
 	if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask_all)
 		return;
-	/*
-	 * Unsupported supervisor xstates should not be found in
-	 * the xfeatures mask.
-	 */
-	unsup_bits = xfeatures_mask_all & XFEATURE_MASK_SUPERVISOR_UNSUPPORTED;
-	WARN_ONCE(unsup_bits, "x86/fpu: Found unsupported supervisor xstates: 0x%llx\n",
-		  unsup_bits);
-
-	xfeatures_mask_all &= ~XFEATURE_MASK_SUPERVISOR_UNSUPPORTED;
 
 	cr4_set_bits(X86_CR4_OSXSAVE);
 
@@ -825,6 +814,7 @@ void __init fpu__init_system_xstate(void
 {
 	unsigned int eax, ebx, ecx, edx;
 	static int on_boot_cpu __initdata = 1;
+	u64 xfeatures;
 	int err;
 	int i;
 
@@ -879,6 +869,8 @@ void __init fpu__init_system_xstate(void
 	}
 
 	xfeatures_mask_all &= fpu__get_supported_xfeatures_mask();
+	/* Store it for paranoia check at the end */
+	xfeatures = xfeatures_mask_all;
 
 	/* Enable xstate instructions to be able to continue with initialization: */
 	fpu__init_cpu_xstate();
@@ -896,8 +888,18 @@ void __init fpu__init_system_xstate(void
 	setup_init_fpu_buf();
 	setup_xstate_comp_offsets();
 	setup_supervisor_only_offsets();
-	print_xstate_offset_size();
 
+	/*
+	 * Paranoia check whether something in the setup modified the
+	 * xfeatures mask.
+	 */
+	if (xfeatures != xfeatures_mask_all) {
+		pr_err("x86/fpu: xfeatures modified during init %016llx %016llx, disabling XSAVE\n",
+		       xfeatures, xfeatures_mask_all);
+		goto out_disable;
+	}
+
+	print_xstate_offset_size();
 	pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
 		xfeatures_mask_all,
 		fpu_kernel_xstate_size,


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (5 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-20  9:02   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 08/66] x86/fpu: Remove unused get_xsave_field_ptr() Thomas Gleixner
                   ` (63 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

This function is really not doing what the comment advertises:

 "Find supported xfeatures based on cpu features and command-line input.
  This must be called after fpu__init_parse_early_param() is called and
  xfeatures_mask is enumerated."

fpu__init_parse_early_param() does not exist anymore and the function just
returns a constant.

Remove it and fix the caller and get rid of further references to
fpu__init_parse_early_param().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: New patch. Noticed when staring at the hotplug trainwreck.
---
 arch/x86/include/asm/fpu/internal.h |    1 -
 arch/x86/kernel/cpu/common.c        |    5 ++---
 arch/x86/kernel/fpu/init.c          |   11 -----------
 arch/x86/kernel/fpu/xstate.c        |    4 +++-
 4 files changed, 5 insertions(+), 16 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -45,7 +45,6 @@ extern void fpu__init_cpu_xstate(void);
 extern void fpu__init_system(struct cpuinfo_x86 *c);
 extern void fpu__init_check_bugs(void);
 extern void fpu__resume_cpu(void);
-extern u64 fpu__get_supported_xfeatures_mask(void);
 
 /*
  * Debugging facility:
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1715,9 +1715,8 @@ void print_cpu_info(struct cpuinfo_x86 *
 }
 
 /*
- * clearcpuid= was already parsed in fpu__init_parse_early_param.
- * But we need to keep a dummy __setup around otherwise it would
- * show up as an environment variable for init.
+ * clearcpuid= was already parsed in cpu_parse_early_param().  This dummy
+ * function prevents it to become an environment variable for init.
  */
 static __init int setup_clearcpuid(char *arg)
 {
--- a/arch/x86/kernel/fpu/init.c
+++ b/arch/x86/kernel/fpu/init.c
@@ -216,17 +216,6 @@ static void __init fpu__init_system_xsta
 	fpu_user_xstate_size = fpu_kernel_xstate_size;
 }
 
-/*
- * Find supported xfeatures based on cpu features and command-line input.
- * This must be called after fpu__init_parse_early_param() is called and
- * xfeatures_mask is enumerated.
- */
-u64 __init fpu__get_supported_xfeatures_mask(void)
-{
-	return XFEATURE_MASK_USER_SUPPORTED |
-	       XFEATURE_MASK_SUPERVISOR_SUPPORTED;
-}
-
 /* Legacy code to initialize eager fpu mode. */
 static void __init fpu__init_system_ctx_switch(void)
 {
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -868,7 +868,9 @@ void __init fpu__init_system_xstate(void
 			xfeatures_mask_all &= ~BIT_ULL(i);
 	}
 
-	xfeatures_mask_all &= fpu__get_supported_xfeatures_mask();
+	xfeatures_mask_all &= XFEATURE_MASK_USER_SUPPORTED |
+			      XFEATURE_MASK_SUPERVISOR_SUPPORTED;
+
 	/* Store it for paranoia check at the end */
 	xfeatures = xfeatures_mask_all;
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 08/66] x86/fpu: Remove unused get_xsave_field_ptr()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (6 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 09/66] x86/fpu: Move inlines where they belong Thomas Gleixner
                   ` (62 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/include/asm/fpu/xstate.h |    1 -
 arch/x86/kernel/fpu/xstate.c      |   30 ------------------------------
 2 files changed, 31 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -101,7 +101,6 @@ extern void __init update_regset_xstate_
 					     u64 xstate_mask);
 
 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
-const void *get_xsave_field_ptr(int xfeature_nr);
 int using_compacted_format(void);
 int xfeature_size(int xfeature_nr);
 struct membuf;
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -998,36 +998,6 @@ void *get_xsave_addr(struct xregs_state
 }
 EXPORT_SYMBOL_GPL(get_xsave_addr);
 
-/*
- * This wraps up the common operations that need to occur when retrieving
- * data from xsave state.  It first ensures that the current task was
- * using the FPU and retrieves the data in to a buffer.  It then calculates
- * the offset of the requested field in the buffer.
- *
- * This function is safe to call whether the FPU is in use or not.
- *
- * Note that this only works on the current task.
- *
- * Inputs:
- *	@xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP,
- *	XFEATURE_SSE, etc...)
- * Output:
- *	address of the state in the xsave area or NULL if the state
- *	is not present or is in its 'init state'.
- */
-const void *get_xsave_field_ptr(int xfeature_nr)
-{
-	struct fpu *fpu = &current->thread.fpu;
-
-	/*
-	 * fpu__save() takes the CPU's xstate registers
-	 * and saves them off to the 'fpu memory buffer.
-	 */
-	fpu__save(fpu);
-
-	return get_xsave_addr(&fpu->state.xsave, xfeature_nr);
-}
-
 #ifdef CONFIG_ARCH_HAS_PKEYS
 
 /*


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 09/66] x86/fpu: Move inlines where they belong
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (7 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 08/66] x86/fpu: Remove unused get_xsave_field_ptr() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 10/66] x86/fpu: Limit xstate copy size in xstateregs_set() Thomas Gleixner
                   ` (61 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

They are only used in fpstate_init() and there is no point to have them in
a header just to make reading the code harder.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/include/asm/fpu/internal.h |   14 --------------
 arch/x86/kernel/fpu/core.c          |   15 +++++++++++++++
 2 files changed, 15 insertions(+), 14 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -86,20 +86,6 @@ extern void fpstate_init_soft(struct swr
 static inline void fpstate_init_soft(struct swregs_state *soft) {}
 #endif
 
-static inline void fpstate_init_xstate(struct xregs_state *xsave)
-{
-	/*
-	 * XRSTORS requires these bits set in xcomp_bv, or it will
-	 * trigger #GP:
-	 */
-	xsave->header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | xfeatures_mask_all;
-}
-
-static inline void fpstate_init_fxstate(struct fxregs_state *fx)
-{
-	fx->cwd = 0x37f;
-	fx->mxcsr = MXCSR_DEFAULT;
-}
 extern void fpstate_sanitize_xstate(struct fpu *fpu);
 
 #define user_insn(insn, output, input...)				\
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -181,6 +181,21 @@ void fpu__save(struct fpu *fpu)
 	fpregs_unlock();
 }
 
+static inline void fpstate_init_xstate(struct xregs_state *xsave)
+{
+	/*
+	 * XRSTORS requires these bits set in xcomp_bv, or it will
+	 * trigger #GP:
+	 */
+	xsave->header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | xfeatures_mask_all;
+}
+
+static inline void fpstate_init_fxstate(struct fxregs_state *fx)
+{
+	fx->cwd = 0x37f;
+	fx->mxcsr = MXCSR_DEFAULT;
+}
+
 /*
  * Legacy x87 fpstate state init:
  */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 10/66] x86/fpu: Limit xstate copy size in xstateregs_set()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (8 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 09/66] x86/fpu: Move inlines where they belong Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 11/66] x86/fpu: Sanitize xstateregs_set() Thomas Gleixner
                   ` (60 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

If the count argument is larger than the xstate size, this will happily
copy beyond the end of xstate.

Fixes: 91c3dba7dbc1 ("x86/fpu/xstate: Fix PTRACE frames for XSAVES")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/fpu/regset.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -117,7 +117,7 @@ int xstateregs_set(struct task_struct *t
 	/*
 	 * A whole standard-format XSAVE buffer is needed:
 	 */
-	if ((pos != 0) || (count < fpu_user_xstate_size))
+	if (pos != 0 || count != fpu_user_xstate_size)
 		return -EFAULT;
 
 	xsave = &fpu->state.xsave;


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 11/66] x86/fpu: Sanitize xstateregs_set()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (9 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 10/66] x86/fpu: Limit xstate copy size in xstateregs_set() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-20 21:30   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate() Thomas Gleixner
                   ` (59 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

xstateregs_set() operates on a stopped task and tries to copy the provided
buffer into the task's fpu.state.xsave buffer.

Any error while copying or invalid state detected after copying results in
wiping the target task's FPU state completely including supervisor states.

That's just wrong. The caller supplied invalid data or has a problem with
unmapped memory, so there is absolutely no justification to corrupt the
target state.

Fix this with the following modifications:

 1) If data has to be copied from userspace, allocate a buffer and copy from
    user first.

 2) Use copy_kernel_to_xstate() unconditionally so that header checking
    works correctly.

 3) Return on error without corrupting the target state.

This prevents corrupting states and lets the caller deal with the problem
it caused in the first place.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/xstate.h |    4 ---
 arch/x86/kernel/fpu/regset.c      |   44 +++++++++++++++-----------------------
 arch/x86/kernel/fpu/xstate.c      |   14 ++++++------
 3 files changed, 26 insertions(+), 36 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -111,8 +111,4 @@ void copy_supervisor_to_kernel(struct xr
 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask);
 
-
-/* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
-int validate_user_xstate_header(const struct xstate_header *hdr);
-
 #endif
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -2,11 +2,13 @@
 /*
  * FPU register's regset abstraction, for ptrace, core dumps, etc.
  */
+#include <linux/sched/task_stack.h>
+#include <linux/vmalloc.h>
+
 #include <asm/fpu/internal.h>
 #include <asm/fpu/signal.h>
 #include <asm/fpu/regset.h>
 #include <asm/fpu/xstate.h>
-#include <linux/sched/task_stack.h>
 
 /*
  * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
@@ -108,10 +110,10 @@ int xstateregs_set(struct task_struct *t
 		  const void *kbuf, const void __user *ubuf)
 {
 	struct fpu *fpu = &target->thread.fpu;
-	struct xregs_state *xsave;
+	struct xregs_state *tmpbuf = NULL;
 	int ret;
 
-	if (!boot_cpu_has(X86_FEATURE_XSAVE))
+	if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
 		return -ENODEV;
 
 	/*
@@ -120,32 +122,22 @@ int xstateregs_set(struct task_struct *t
 	if (pos != 0 || count != fpu_user_xstate_size)
 		return -EFAULT;
 
-	xsave = &fpu->state.xsave;
-
-	fpu__prepare_write(fpu);
-
-	if (using_compacted_format()) {
-		if (kbuf)
-			ret = copy_kernel_to_xstate(xsave, kbuf);
-		else
-			ret = copy_user_to_xstate(xsave, ubuf);
-	} else {
-		ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
-		if (!ret)
-			ret = validate_user_xstate_header(&xsave->header);
+	if (!kbuf) {
+		tmpbuf = vmalloc(count);
+		if (!tmpbuf)
+			return -ENOMEM;
+
+		if (copy_from_user(tmpbuf, ubuf, count)) {
+			ret = -EFAULT;
+			goto out;
+		}
 	}
 
-	/*
-	 * mxcsr reserved bits must be masked to zero for security reasons.
-	 */
-	xsave->i387.mxcsr &= mxcsr_feature_mask;
-
-	/*
-	 * In case of failure, mark all states as init:
-	 */
-	if (ret)
-		fpstate_init(&fpu->state);
+	fpu__prepare_write(fpu);
+	ret = copy_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
 
+out:
+	vfree(tmpbuf);
 	return ret;
 }
 
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -543,7 +543,7 @@ int using_compacted_format(void)
 }
 
 /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
-int validate_user_xstate_header(const struct xstate_header *hdr)
+static int validate_user_xstate_header(const struct xstate_header *hdr)
 {
 	/* No unknown or supervisor features may be set */
 	if (hdr->xfeatures & ~xfeatures_mask_user())
@@ -1155,7 +1155,7 @@ void copy_xstate_to_kernel(struct membuf
 }
 
 /*
- * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format
+ * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S] format
  * and copy to the target thread. This is called from xstateregs_set().
  */
 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
@@ -1202,14 +1202,16 @@ int copy_kernel_to_xstate(struct xregs_s
 	 */
 	xsave->header.xfeatures |= hdr.xfeatures;
 
+	/* mxcsr reserved bits must be masked to zero for historical reasons. */
+	xsave->i387.mxcsr &= mxcsr_feature_mask;
+
 	return 0;
 }
 
 /*
- * Convert from a ptrace or sigreturn standard-format user-space buffer to
- * kernel XSAVES format and copy to the target thread. This is called from
- * xstateregs_set(), as well as potentially from the sigreturn() and
- * rt_sigreturn() system calls.
+ * Convert from a sigreturn standard-format user-space buffer to kernel
+ * XSAVE[S] format and copy to the target thread. This is called from the
+ * sigreturn() and rt_sigreturn() system calls.
  */
 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf)
 {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (10 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 11/66] x86/fpu: Sanitize xstateregs_set() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 10:00   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 13/66] x86/fpu: Simplify PTRACE_GETREGS code Thomas Gleixner
                   ` (58 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Instead of masking out reserved bits, check them and reject the provided
state as invalid if not zero.

Suggested-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Validate MXCSR when FP|SSE|YMM are set. The quirk check is only
    correct for the copy function.
V2: New patch
---
 arch/x86/kernel/fpu/xstate.c |   19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1154,6 +1154,19 @@ void copy_xstate_to_kernel(struct membuf
 		membuf_zero(&to, to.left);
 }
 
+static inline bool mxcsr_valid(struct xstate_header *hdr, const u32 *mxcsr)
+{
+	u64 mask = XFEATURE_MASK_FP | XFEATURE_MASK_SSE | XFEATURE_MASK_YMM;
+
+	/* Only check if it is in use */
+	if (hdr->xfeatures & mask) {
+		/* Reserved bits in MXCSR must be zero. */
+		if (*mxcsr & ~mxcsr_feature_mask)
+			return false;
+	}
+	return true;
+}
+
 /*
  * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S] format
  * and copy to the target thread. This is called from xstateregs_set().
@@ -1172,6 +1185,9 @@ int copy_kernel_to_xstate(struct xregs_s
 	if (validate_user_xstate_header(&hdr))
 		return -EINVAL;
 
+	if (!mxcsr_valid(&hdr, kbuf + offsetof(struct fxregs_state, mxcsr)))
+		return -EINVAL;
+
 	for (i = 0; i < XFEATURE_MAX; i++) {
 		u64 mask = ((u64)1 << i);
 
@@ -1202,9 +1218,6 @@ int copy_kernel_to_xstate(struct xregs_s
 	 */
 	xsave->header.xfeatures |= hdr.xfeatures;
 
-	/* mxcsr reserved bits must be masked to zero for historical reasons. */
-	xsave->i387.mxcsr &= mxcsr_feature_mask;
-
 	return 0;
 }
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 13/66] x86/fpu: Simplify PTRACE_GETREGS code
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (11 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 14/66] x86/fpu: Rewrite xfpregs_set() Thomas Gleixner
                   ` (57 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Dave Hansen <dave.hansen@linux.intel.com>

ptrace() has interfaces that let a ptracer inspect a ptracee's register state.
This includes XSAVE state.  The ptrace() ABI includes a hardware-format XSAVE
buffer for both the SETREGS and GETREGS interfaces.

In the old days, the kernel buffer and the ptrace() ABI buffer were the
same boring non-compacted format.  But, since the advent of supervisor
states and the compacted format, the kernel buffer has diverged from the
format presented in the ABI.

This leads to two paths in the kernel:
1. Effectively a verbatim copy_to_user() which just copies the kernel buffer
   out to userspace.  This is used when the kernel buffer is kept in the
   non-compacted form which means that it shares a format with the ptrace
   ABI.
2. A one-state-at-a-time path: copy_xstate_to_kernel().  This is theoretically
   slower since it does a bunch of piecemeal copies.

Remove the verbatim copy case.  Speed probably does not matter in this path,
and the vast majority of new hardware will use the one-state-at-a-time path
anyway.  This ensures greater testing for the "slow" path.

This also makes enabling PKRU in this interface easier since a single path
can be patched instead of two.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/fpu/regset.c |   24 +++---------------------
 arch/x86/kernel/fpu/xstate.c |    6 +++---
 2 files changed, 6 insertions(+), 24 deletions(-)

--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -77,32 +77,14 @@ int xstateregs_get(struct task_struct *t
 		struct membuf to)
 {
 	struct fpu *fpu = &target->thread.fpu;
-	struct xregs_state *xsave;
 
-	if (!boot_cpu_has(X86_FEATURE_XSAVE))
+	if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
 		return -ENODEV;
 
-	xsave = &fpu->state.xsave;
-
 	fpu__prepare_read(fpu);
 
-	if (using_compacted_format()) {
-		copy_xstate_to_kernel(to, xsave);
-		return 0;
-	} else {
-		fpstate_sanitize_xstate(fpu);
-		/*
-		 * Copy the 48 bytes defined by the software into the xsave
-		 * area in the thread struct, so that we can copy the whole
-		 * area to user using one user_regset_copyout().
-		 */
-		memcpy(&xsave->i387.sw_reserved, xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
-
-		/*
-		 * Copy the xstate memory layout.
-		 */
-		return membuf_write(&to, xsave, fpu_user_xstate_size);
-	}
+	copy_xstate_to_kernel(to, &fpu->state.xsave);
+	return 0;
 }
 
 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1069,11 +1069,11 @@ static void copy_feature(bool from_xstat
 }
 
 /*
- * Convert from kernel XSAVES compacted format to standard format and copy
- * to a kernel-space ptrace buffer.
+ * Convert from kernel XSAVE or XSAVES compacted format to UABI
+ * non-compacted format and copy to a kernel-space ptrace buffer.
  *
  * It supports partial copy but pos always starts from zero. This is called
- * from xstateregs_get() and there we check the CPU has XSAVES.
+ * from xstateregs_get() and there we check the CPU has XSAVE.
  */
 void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave)
 {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 14/66] x86/fpu: Rewrite xfpregs_set()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (12 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 13/66] x86/fpu: Simplify PTRACE_GETREGS code Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 10:20   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values Thomas Gleixner
                   ` (56 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Andy Lutomirski <luto@kernel.org>

xfpregs_set() was incomprehensible.  Almost all of the complexity was due
to trying to support nonsensically sized writes or -EFAULT errors that
would have partially or completely overwritten the destination before
failing.  Nonsensically sized input would only have been possible using
PTRACE_SETREGSET on REGSET_XFP.  Fortunately, it appears (based on Debian
code search results) that no one uses that API at all, let alone with the
wrong sized buffer.  Failed user access can be handled more cleanly by
first copying to kernel memory.

Just rewrite it to require sensible input.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch picked up from Andy
---
 arch/x86/kernel/fpu/regset.c |   40 +++++++++++++++++++++++++---------------
 1 file changed, 25 insertions(+), 15 deletions(-)

--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -47,30 +47,40 @@ int xfpregs_set(struct task_struct *targ
 		const void *kbuf, const void __user *ubuf)
 {
 	struct fpu *fpu = &target->thread.fpu;
+	struct user32_fxsr_struct newstate;
 	int ret;
 
-	if (!boot_cpu_has(X86_FEATURE_FXSR))
+	BUILD_BUG_ON(sizeof(newstate) != sizeof(struct fxregs_state));
+
+	if (!cpu_feature_enabled(X86_FEATURE_FXSR))
 		return -ENODEV;
 
-	fpu__prepare_write(fpu);
-	fpstate_sanitize_xstate(fpu);
+	/* No funny business with partial or oversized writes is permitted. */
+	if (pos != 0 || count != sizeof(newstate))
+		return -EINVAL;
 
 	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-				 &fpu->state.fxsave, 0, -1);
+				 &newstate, 0, -1);
+	if (ret)
+		return ret;
+
+	/* Mask invalid MXCSR bits (for historical reasons). */
+	newstate.mxcsr &= mxcsr_feature_mask;
+
+	fpu__prepare_write(fpu);
+
+	/* Copy the state  */
+	memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
+
+	/* Clear xmm8..15 */
+	BUILD_BUG_ON(sizeof(fpu->state.fxsave.xmm_space) != 16 * 16);
+	memset(&fpu->state.fxsave.xmm_space[8], 0, 8 * 16);
 
-	/*
-	 * mxcsr reserved bits must be masked to zero for security reasons.
-	 */
-	fpu->state.fxsave.mxcsr &= mxcsr_feature_mask;
-
-	/*
-	 * update the header bits in the xsave header, indicating the
-	 * presence of FP and SSE state.
-	 */
-	if (boot_cpu_has(X86_FEATURE_XSAVE))
+	/* Mark FP and SSE as in use when XSAVE is enabled */
+	if (use_xsave())
 		fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
 
-	return ret;
+	return 0;
 }
 
 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (13 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 14/66] x86/fpu: Rewrite xfpregs_set() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 10:17   ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 16/66] x86/fpu: Clean up fpregs_set() Thomas Gleixner
                   ` (55 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Andy Lutomirski <luto@kernel.org>

There is no benefit from accepting and silently changing an invalid MXCSR
value supplied via ptrace().  Instead, return -EINVAL on invalid input.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch. Picked up from Andy.
---
 arch/x86/kernel/fpu/regset.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
---
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -64,8 +64,9 @@ int xfpregs_set(struct task_struct *targ
 	if (ret)
 		return ret;
 
-	/* Mask invalid MXCSR bits (for historical reasons). */
-	newstate.mxcsr &= mxcsr_feature_mask;
+	/* Do not allow an invalid MXCSR value. */
+	if (newstate.mxcsr & ~mxcsr_feature_mask)
+		ret = -EINVAL;
 
 	fpu__prepare_write(fpu);
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 16/66] x86/fpu: Clean up fpregs_set()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (14 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 12:05   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get() Thomas Gleixner
                   ` (54 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Andy Lutomirski <luto@kernel.org>

fpregs_set() has unnecessary complexity to support short or nonzero-offset
writes and to handle the case in which a copy from userspace overwrites
some of the target buffer and then fails.  Support for partial writes is
useless -- just require that the write have offset 0 and the correct size,
and copy into a temporary kernel buffer to avoid clobbering the state if
the user access fails.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch. Picked up from Andy
---
 arch/x86/kernel/fpu/regset.c |   29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)
---
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -305,31 +305,32 @@ int fpregs_set(struct task_struct *targe
 	struct user_i387_ia32_struct env;
 	int ret;
 
-	fpu__prepare_write(fpu);
-	fpstate_sanitize_xstate(fpu);
+	/* No funny business with partial or oversized writes is permitted. */
+	if (pos != 0 || count != sizeof(struct user_i387_ia32_struct))
+		return -EINVAL;
 
-	if (!boot_cpu_has(X86_FEATURE_FPU))
+	if (!cpu_feature_enabled(X86_FEATURE_FPU))
 		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 
-	if (!boot_cpu_has(X86_FEATURE_FXSR))
-		return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-					  &fpu->state.fsave, 0,
-					  -1);
+	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
+	if (ret)
+		return ret;
 
-	if (pos > 0 || count < sizeof(env))
-		convert_from_fxsr(&env, target);
+	fpu__prepare_write(fpu);
 
-	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
-	if (!ret)
+	if (cpu_feature_enabled(X86_FEATURE_FXSR))
 		convert_to_fxsr(&target->thread.fpu.state.fxsave, &env);
+	else
+		memcpy(&target->thread.fpu.state.fsave, &env, sizeof(env));
 
 	/*
-	 * update the header bit in the xsave header, indicating the
+	 * Update the header bit in the xsave header, indicating the
 	 * presence of FP.
 	 */
-	if (boot_cpu_has(X86_FEATURE_XSAVE))
+	if (cpu_feature_enabled(X86_FEATURE_XSAVE))
 		fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP;
-	return ret;
+
+	return 0;
 }
 
 #endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (15 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 16/66] x86/fpu: Clean up fpregs_set() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 12:32   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 18/66] x86/fpu: Use copy_xstate_to_uabi_buf() in xfpregs_get() Thomas Gleixner
                   ` (53 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

When xsave with init state optimization is used then a component's state
in the task's xsave buffer can be stale when the corresponding feature bit
is not set.

fpregs_get() and xfpregs_get() invoke fpstate_sanitize_xstate() to update
the task's xsave buffer before retrieving the FX or FP state. That's just
duplicated code as copy_xstate_to_kernel() already handles this correctly.

Add a copy mode argument to the function which allows to restrict the state
copy to the FP and SSE features.

Also rename the function to copy_xstate_to_uabi_buf() so the name reflects
what it is doing.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Rename to copy_xstate_to_uabi_buf() - Boris
V2: New patch
---
 arch/x86/include/asm/fpu/xstate.h |   12 +++++++++-
 arch/x86/kernel/fpu/regset.c      |    2 -
 arch/x86/kernel/fpu/xstate.c      |   42 ++++++++++++++++++++++++++++----------
 3 files changed, 42 insertions(+), 14 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -103,12 +103,20 @@ extern void __init update_regset_xstate_
 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
 int using_compacted_format(void);
 int xfeature_size(int xfeature_nr);
-struct membuf;
-void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave);
 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
 void copy_supervisor_to_kernel(struct xregs_state *xsave);
 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask);
 
+enum xstate_copy_mode {
+	XSTATE_COPY_FP,
+	XSTATE_COPY_FX,
+	XSTATE_COPY_XSAVE,
+};
+
+struct membuf;
+void copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave,
+			     enum xstate_copy_mode mode);
+
 #endif
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -94,7 +94,7 @@ int xstateregs_get(struct task_struct *t
 
 	fpu__prepare_read(fpu);
 
-	copy_xstate_to_kernel(to, &fpu->state.xsave);
+	copy_xstate_to_uabi_buf(to, &fpu->state.xsave, XSTATE_COPY_XSAVE);
 	return 0;
 }
 
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1068,14 +1068,20 @@ static void copy_feature(bool from_xstat
 	membuf_write(to, from_xstate ? xstate : init_xstate, size);
 }
 
-/*
- * Convert from kernel XSAVE or XSAVES compacted format to UABI
- * non-compacted format and copy to a kernel-space ptrace buffer.
+/**
+ * copy_xstate_to_uabi_buf - Copy kernel saved xstate to a UABI buffer
+ * @to:		membuf descriptor
+ * @xsave:	The kernel xstate buffer to copy from
+ * @copy_mode:	The requested copy mode
  *
- * It supports partial copy but pos always starts from zero. This is called
- * from xstateregs_get() and there we check the CPU has XSAVE.
+ * Converts from kernel XSAVE or XSAVES compacted format to UABI conforming
+ * format, i.e. from the kernel internal hardware dependent storage format
+ * to the requested @mode. UABI XSTATE is always uncompacted!
+ *
+ * It supports partial copy but @to.pos always starts from zero.
  */
-void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave)
+void copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave,
+			     enum xstate_copy_mode copy_mode)
 {
 	const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr);
 	struct xregs_state *xinit = &init_fpstate.xsave;
@@ -1083,12 +1089,22 @@ void copy_xstate_to_kernel(struct membuf
 	unsigned int zerofrom;
 	int i;
 
-	/*
-	 * The destination is a ptrace buffer; we put in only user xstates:
-	 */
-	memset(&header, 0, sizeof(header));
 	header.xfeatures = xsave->header.xfeatures;
-	header.xfeatures &= xfeatures_mask_user();
+
+	/* Mask out the feature bits depending on copy mode */
+	switch (copy_mode) {
+	case XSTATE_COPY_FP:
+		header.xfeatures &= XFEATURE_MASK_FP;
+		break;
+
+	case XSTATE_COPY_FX:
+		header.xfeatures &= XFEATURE_MASK_FP | XFEATURE_MASK_SSE;
+		break;
+
+	case XSTATE_COPY_XSAVE:
+		header.xfeatures &= xfeatures_mask_user();
+		break;
+	}
 
 	/* Copy FP state up to MXCSR */
 	copy_feature(header.xfeatures & XFEATURE_MASK_FP, &to, &xsave->i387,
@@ -1109,6 +1125,9 @@ void copy_xstate_to_kernel(struct membuf
 		     &to, &xsave->i387.xmm_space, &xinit->i387.xmm_space,
 		     sizeof(xsave->i387.xmm_space));
 
+	if (copy_mode != XSTATE_COPY_XSAVE)
+		goto out;
+
 	/* Zero the padding area */
 	membuf_zero(&to, sizeof(xsave->i387.padding));
 
@@ -1150,6 +1169,7 @@ void copy_xstate_to_kernel(struct membuf
 		zerofrom = xstate_offsets[i] + xstate_sizes[i];
 	}
 
+out:
 	if (to.left)
 		membuf_zero(&to, to.left);
 }


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 18/66] x86/fpu: Use copy_xstate_to_uabi_buf() in xfpregs_get()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (16 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 19/66] x86/fpu: Use copy_xstate_to_uabi_buf() in fpregs_get() Thomas Gleixner
                   ` (52 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Use the new functionality of copy_xstate_to_uabi_buf() to retrieve the
FX state when XSAVE* is in use. This avoids overwriting the FPU state
buffer with fpstate_sanitize_xstate() which is error prone and duplicated
code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
V3: Adopted to function rename
V2: New patch
---
 arch/x86/kernel/fpu/regset.c |   11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -33,13 +33,18 @@ int xfpregs_get(struct task_struct *targ
 {
 	struct fpu *fpu = &target->thread.fpu;
 
-	if (!boot_cpu_has(X86_FEATURE_FXSR))
+	if (!cpu_feature_enabled(X86_FEATURE_FXSR))
 		return -ENODEV;
 
 	fpu__prepare_read(fpu);
-	fpstate_sanitize_xstate(fpu);
 
-	return membuf_write(&to, &fpu->state.fxsave, sizeof(struct fxregs_state));
+	if (!use_xsave()) {
+		return membuf_write(&to, &fpu->state.fxsave,
+				    sizeof(fpu->state.fxsave));
+	}
+
+	copy_xstate_to_uabi_buf(to, &fpu->state.xsave, XSTATE_COPY_FX);
+	return 0;
 }
 
 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 19/66] x86/fpu: Use copy_xstate_to_uabi_buf() in fpregs_get()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (17 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 18/66] x86/fpu: Use copy_xstate_to_uabi_buf() in xfpregs_get() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 20/66] x86/fpu: Remove fpstate_sanitize_xstate() Thomas Gleixner
                   ` (51 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Use the new functionality of copy_xstate_to_uabi_buf() to retrieve the
FX state when XSAVE* is in use. This avoids to overwrite the FPU state
buffer with fpstate_sanitize_xstate() which is error prone and duplicated
code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
V3: Adopted to function rename
V2: New patch
---
 arch/x86/kernel/fpu/regset.c |   30 ++++++++++++++++++++----------
 1 file changed, 20 insertions(+), 10 deletions(-)

--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -211,10 +211,10 @@ static inline u32 twd_fxsr_to_i387(struc
  * FXSR floating point environment conversions.
  */
 
-void
-convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
+static void __convert_from_fxsr(struct user_i387_ia32_struct *env,
+				struct task_struct *tsk,
+				struct fxregs_state *fxsave)
 {
-	struct fxregs_state *fxsave = &tsk->thread.fpu.state.fxsave;
 	struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 	struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 	int i;
@@ -248,6 +248,12 @@ convert_from_fxsr(struct user_i387_ia32_
 		memcpy(&to[i], &from[i], sizeof(to[0]));
 }
 
+void
+convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
+{
+	__convert_from_fxsr(env, tsk, &tsk->thread.fpu.state.fxsave);
+}
+
 void convert_to_fxsr(struct fxregs_state *fxsave,
 		     const struct user_i387_ia32_struct *env)
 
@@ -280,25 +286,29 @@ int fpregs_get(struct task_struct *targe
 {
 	struct fpu *fpu = &target->thread.fpu;
 	struct user_i387_ia32_struct env;
+	struct fxregs_state fxsave, *fx;
 
 	fpu__prepare_read(fpu);
 
-	if (!boot_cpu_has(X86_FEATURE_FPU))
+	if (!cpu_feature_enabled(X86_FEATURE_FPU))
 		return fpregs_soft_get(target, regset, to);
 
-	if (!boot_cpu_has(X86_FEATURE_FXSR)) {
+	if (!cpu_feature_enabled(X86_FEATURE_FXSR)) {
 		return membuf_write(&to, &fpu->state.fsave,
 				    sizeof(struct fregs_state));
 	}
 
-	fpstate_sanitize_xstate(fpu);
+	if (use_xsave()) {
+		struct membuf mb = { .p = &fxsave, .left = sizeof(fxsave) };
 
-	if (to.left == sizeof(env)) {
-		convert_from_fxsr(to.p, target);
-		return 0;
+		/* Handle init state optimized xstate correctly */
+		copy_xstate_to_uabi_buf(mb, &fpu->state.xsave, XSTATE_COPY_FP);
+		fx = &fxsave;
+	} else {
+		fx = &fpu->state.fxsave;
 	}
 
-	convert_from_fxsr(&env, target);
+	__convert_from_fxsr(&env, target, fx);
 	return membuf_write(&to, &env, sizeof(env));
 }
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 20/66] x86/fpu: Remove fpstate_sanitize_xstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (18 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 19/66] x86/fpu: Use copy_xstate_to_uabi_buf() in fpregs_get() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset Thomas Gleixner
                   ` (50 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

No more users.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch
---
 arch/x86/include/asm/fpu/internal.h |    2 
 arch/x86/kernel/fpu/xstate.c        |   79 ------------------------------------
 2 files changed, 81 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -86,8 +86,6 @@ extern void fpstate_init_soft(struct swr
 static inline void fpstate_init_soft(struct swregs_state *soft) {}
 #endif
 
-extern void fpstate_sanitize_xstate(struct fpu *fpu);
-
 #define user_insn(insn, output, input...)				\
 ({									\
 	int err;							\
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -129,85 +129,6 @@ static bool xfeature_is_supervisor(int x
 }
 
 /*
- * When executing XSAVEOPT (or other optimized XSAVE instructions), if
- * a processor implementation detects that an FPU state component is still
- * (or is again) in its initialized state, it may clear the corresponding
- * bit in the header.xfeatures field, and can skip the writeout of registers
- * to the corresponding memory layout.
- *
- * This means that when the bit is zero, the state component might still contain
- * some previous - non-initialized register state.
- *
- * Before writing xstate information to user-space we sanitize those components,
- * to always ensure that the memory layout of a feature will be in the init state
- * if the corresponding header bit is zero. This is to ensure that user-space doesn't
- * see some stale state in the memory layout during signal handling, debugging etc.
- */
-void fpstate_sanitize_xstate(struct fpu *fpu)
-{
-	struct fxregs_state *fx = &fpu->state.fxsave;
-	int feature_bit;
-	u64 xfeatures;
-
-	if (!use_xsaveopt())
-		return;
-
-	xfeatures = fpu->state.xsave.header.xfeatures;
-
-	/*
-	 * None of the feature bits are in init state. So nothing else
-	 * to do for us, as the memory layout is up to date.
-	 */
-	if ((xfeatures & xfeatures_mask_all) == xfeatures_mask_all)
-		return;
-
-	/*
-	 * FP is in init state
-	 */
-	if (!(xfeatures & XFEATURE_MASK_FP)) {
-		fx->cwd = 0x37f;
-		fx->swd = 0;
-		fx->twd = 0;
-		fx->fop = 0;
-		fx->rip = 0;
-		fx->rdp = 0;
-		memset(fx->st_space, 0, sizeof(fx->st_space));
-	}
-
-	/*
-	 * SSE is in init state
-	 */
-	if (!(xfeatures & XFEATURE_MASK_SSE))
-		memset(fx->xmm_space, 0, sizeof(fx->xmm_space));
-
-	/*
-	 * First two features are FPU and SSE, which above we handled
-	 * in a special way already:
-	 */
-	feature_bit = 0x2;
-	xfeatures = (xfeatures_mask_user() & ~xfeatures) >> 2;
-
-	/*
-	 * Update all the remaining memory layouts according to their
-	 * standard xstate layout, if their header bit is in the init
-	 * state:
-	 */
-	while (xfeatures) {
-		if (xfeatures & 0x1) {
-			int offset = xstate_comp_offsets[feature_bit];
-			int size = xstate_sizes[feature_bit];
-
-			memcpy((void *)fx + offset,
-			       (void *)&init_fpstate.xsave + offset,
-			       size);
-		}
-
-		xfeatures >>= 1;
-		feature_bit++;
-	}
-}
-
-/*
  * Enable the extended processor state save/restore feature.
  * Called once per CPU onlining.
  */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (19 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 20/66] x86/fpu: Remove fpstate_sanitize_xstate() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 13:26   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset Thomas Gleixner
                   ` (49 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function can only be used from the regset get() callbacks safely. So
there is no reason to have it globaly exposed.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    1 -
 arch/x86/kernel/fpu/core.c          |   20 --------------------
 arch/x86/kernel/fpu/regset.c        |   22 +++++++++++++++++++---
 3 files changed, 19 insertions(+), 24 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -26,7 +26,6 @@
 /*
  * High level FPU state handling functions:
  */
-extern void fpu__prepare_read(struct fpu *fpu);
 extern void fpu__prepare_write(struct fpu *fpu);
 extern void fpu__save(struct fpu *fpu);
 extern int  fpu__restore_sig(void __user *buf, int ia32_frame);
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -282,26 +282,6 @@ static void fpu__initialize(struct fpu *
 }
 
 /*
- * This function must be called before we read a task's fpstate.
- *
- * There's two cases where this gets called:
- *
- * - for the current task (when coredumping), in which case we have
- *   to save the latest FPU registers into the fpstate,
- *
- * - or it's called for stopped tasks (ptrace), in which case the
- *   registers were already saved by the context-switch code when
- *   the task scheduled out.
- *
- * If the task has used the FPU before then save it.
- */
-void fpu__prepare_read(struct fpu *fpu)
-{
-	if (fpu == &current->thread.fpu)
-		fpu__save(fpu);
-}
-
-/*
  * This function must be called before we write a task's fpstate.
  *
  * Invalidate any cached FPU registers.
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -28,6 +28,22 @@ int regset_xregset_fpregs_active(struct
 		return 0;
 }
 
+/*
+ * The regset get() functions are invoked from:
+ *
+ *   - coredump to dump the current task's fpstate. If the current task
+ *     owns the FPU then the memory state has to be synchronized and the
+ *     FPU register state preserved. Otherwise fpstate is already in sync.
+ *
+ *   - ptrace to dump fpstate of a stopped task, in which case the register
+ *     have already been saved to fpstate on context switch.
+ */
+static void sync_fpstate(struct fpu *fpu)
+{
+	if (fpu == &current->thread.fpu)
+		fpu__save(fpu);
+}
+
 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 		struct membuf to)
 {
@@ -36,7 +52,7 @@ int xfpregs_get(struct task_struct *targ
 	if (!cpu_feature_enabled(X86_FEATURE_FXSR))
 		return -ENODEV;
 
-	fpu__prepare_read(fpu);
+	sync_fpstate(fpu);
 
 	if (!use_xsave()) {
 		return membuf_write(&to, &fpu->state.fxsave,
@@ -97,7 +113,7 @@ int xstateregs_get(struct task_struct *t
 	if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
 		return -ENODEV;
 
-	fpu__prepare_read(fpu);
+	sync_fpstate(fpu);
 
 	copy_xstate_to_uabi_buf(to, &fpu->state.xsave, XSTATE_COPY_XSAVE);
 	return 0;
@@ -288,7 +304,7 @@ int fpregs_get(struct task_struct *targe
 	struct user_i387_ia32_struct env;
 	struct fxregs_state fxsave, *fx;
 
-	fpu__prepare_read(fpu);
+	sync_fpstate(fpu);
 
 	if (!cpu_feature_enabled(X86_FEATURE_FPU))
 		return fpregs_soft_get(target, regset, to);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (20 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 15:30   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 23/66] x86/fpu: Get rid of using_compacted_format() Thomas Gleixner
                   ` (48 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The only usecase for fpu__write_begin is the set() callback of regset, so
the function is pointlessly global.

Move it to the regset code and rename it to fpu_force_restore() which is
exactly decribing what the function does.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    1 -
 arch/x86/kernel/fpu/core.c          |   24 ------------------------
 arch/x86/kernel/fpu/regset.c        |   25 ++++++++++++++++++++++---
 3 files changed, 22 insertions(+), 28 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -26,7 +26,6 @@
 /*
  * High level FPU state handling functions:
  */
-extern void fpu__prepare_write(struct fpu *fpu);
 extern void fpu__save(struct fpu *fpu);
 extern int  fpu__restore_sig(void __user *buf, int ia32_frame);
 extern void fpu__drop(struct fpu *fpu);
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -282,30 +282,6 @@ static void fpu__initialize(struct fpu *
 }
 
 /*
- * This function must be called before we write a task's fpstate.
- *
- * Invalidate any cached FPU registers.
- *
- * After this function call, after registers in the fpstate are
- * modified and the child task has woken up, the child task will
- * restore the modified FPU state from the modified context. If we
- * didn't clear its cached status here then the cached in-registers
- * state pending on its former CPU could be restored, corrupting
- * the modifications.
- */
-void fpu__prepare_write(struct fpu *fpu)
-{
-	/*
-	 * Only stopped child tasks can be used to modify the FPU
-	 * state in the fpstate buffer:
-	 */
-	WARN_ON_FPU(fpu == &current->thread.fpu);
-
-	/* Invalidate any cached state: */
-	__fpu_invalidate_fpregs_state(fpu);
-}
-
-/*
  * Drops current FPU state: deactivates the fpregs and
  * the fpstate. NOTE: it still leaves previous contents
  * in the fpregs in the eager-FPU case.
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -44,6 +44,25 @@ static void fpu_sync_fpstate(struct fpu
 		fpu__save(fpu);
 }
 
+/*
+ * Invalidate cached FPU registers before modifying the stopped target
+ * task's fpstate.
+ *
+ * This forces the target task on resume to restore the FPU registers from
+ * modified fpstate. Otherwise the task might skip the restore and operate
+ * with the cached FPU registers which discards the modifications.
+ */
+static void fpu_force_restore(struct fpu *fpu)
+{
+	/*
+	 * Only stopped child tasks can be used to modify the FPU
+	 * state in the fpstate buffer:
+	 */
+	WARN_ON_FPU(fpu == &current->thread.fpu);
+
+	__fpu_invalidate_fpregs_state(fpu);
+}
+
 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 		struct membuf to)
 {
@@ -89,7 +108,7 @@ int xfpregs_set(struct task_struct *targ
 	if (newstate.mxcsr & ~mxcsr_feature_mask)
 		ret = -EINVAL;
 
-	fpu__prepare_write(fpu);
+	fpu_force_restore(fpu);
 
 	/* Copy the state  */
 	memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
@@ -147,7 +166,7 @@ int xstateregs_set(struct task_struct *t
 		}
 	}
 
-	fpu__prepare_write(fpu);
+	fpu_force_restore(fpu);
 	ret = copy_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
 
 out:
@@ -347,7 +366,7 @@ int fpregs_set(struct task_struct *targe
 	if (ret)
 		return ret;
 
-	fpu__prepare_write(fpu);
+	fpu_force_restore(fpu);
 
 	if (cpu_feature_enabled(X86_FEATURE_FXSR))
 		convert_to_fxsr(&target->thread.fpu.state.fxsave, &env);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 23/66] x86/fpu: Get rid of using_compacted_format()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (21 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 24/66] x86/kvm: Avoid looking up PKRU in XSAVE buffer Thomas Gleixner
                   ` (47 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

This function is pointlessly global and a complete misnomer because it's
usage is related to both supervisor state checks and compacted format
checks. Remove it and just make the conditions check the XSAVES feature.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
V2: New patch.
---
 arch/x86/include/asm/fpu/xstate.h |    1 -
 arch/x86/kernel/fpu/xstate.c      |   22 ++++------------------
 2 files changed, 4 insertions(+), 19 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -101,7 +101,6 @@ extern void __init update_regset_xstate_
 					     u64 xstate_mask);
 
 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
-int using_compacted_format(void);
 int xfeature_size(int xfeature_nr);
 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -449,20 +449,6 @@ int xfeature_size(int xfeature_nr)
 	return eax;
 }
 
-/*
- * 'XSAVES' implies two different things:
- * 1. saving of supervisor/system state
- * 2. using the compacted format
- *
- * Use this function when dealing with the compacted format so
- * that it is obvious which aspect of 'XSAVES' is being handled
- * by the calling code.
- */
-int using_compacted_format(void)
-{
-	return boot_cpu_has(X86_FEATURE_XSAVES);
-}
-
 /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */
 static int validate_user_xstate_header(const struct xstate_header *hdr)
 {
@@ -581,9 +567,9 @@ static void do_extra_xstate_size_checks(
 		check_xstate_against_struct(i);
 		/*
 		 * Supervisor state components can be managed only by
-		 * XSAVES, which is compacted-format only.
+		 * XSAVES.
 		 */
-		if (!using_compacted_format())
+		if (!cpu_feature_enabled(X86_FEATURE_XSAVES))
 			XSTATE_WARN_ON(xfeature_is_supervisor(i));
 
 		/* Align from the end of the previous feature */
@@ -593,9 +579,9 @@ static void do_extra_xstate_size_checks(
 		 * The offset of a given state in the non-compacted
 		 * format is given to us in a CPUID leaf.  We check
 		 * them for being ordered (increasing offsets) in
-		 * setup_xstate_features().
+		 * setup_xstate_features(). XSAVES uses compacted format.
 		 */
-		if (!using_compacted_format())
+		if (!cpu_feature_enabled(X86_FEATURE_XSAVES))
 			paranoid_xstate_size = xfeature_uncompacted_offset(i);
 		/*
 		 * The compacted-format offset always depends on where


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 24/66] x86/kvm: Avoid looking up PKRU in XSAVE buffer
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (22 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 23/66] x86/fpu: Get rid of using_compacted_format() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 25/66] x86/fpu: Cleanup arch_set_user_pkey_access() Thomas Gleixner
                   ` (46 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Dave Hansen <dave.hansen@linux.intel.com>

PKRU is being removed from the kernel XSAVE/FPU buffers.  This removal
will probably include warnings for code that look up PKRU in those
buffers.

KVM currently looks up the location of PKRU but doesn't even use the
pointer that it gets back.  Rework the code to avoid calling
get_xsave_addr() except in cases where its result is actually used.

This makes the code more clear and also avoids the inevitable PKRU
warnings.

This is probably a good cleanup and could go upstream idependently
of any PKRU rework.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kvm/x86.c |   41 ++++++++++++++++++++++-------------------
 1 file changed, 22 insertions(+), 19 deletions(-)

--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -4589,20 +4589,21 @@ static void fill_xsave(u8 *dest, struct
 	 */
 	valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
 	while (valid) {
+		u32 size, offset, ecx, edx;
 		u64 xfeature_mask = valid & -valid;
 		int xfeature_nr = fls64(xfeature_mask) - 1;
-		void *src = get_xsave_addr(xsave, xfeature_nr);
+		void *src;
 
-		if (src) {
-			u32 size, offset, ecx, edx;
-			cpuid_count(XSTATE_CPUID, xfeature_nr,
-				    &size, &offset, &ecx, &edx);
-			if (xfeature_nr == XFEATURE_PKRU)
-				memcpy(dest + offset, &vcpu->arch.pkru,
-				       sizeof(vcpu->arch.pkru));
-			else
-				memcpy(dest + offset, src, size);
+		cpuid_count(XSTATE_CPUID, xfeature_nr,
+			    &size, &offset, &ecx, &edx);
 
+		if (xfeature_nr == XFEATURE_PKRU) {
+			memcpy(dest + offset, &vcpu->arch.pkru,
+			       sizeof(vcpu->arch.pkru));
+		} else {
+			src = get_xsave_addr(xsave, xfeature_nr);
+			if (src)
+				memcpy(dest + offset, src, size);
 		}
 
 		valid -= xfeature_mask;
@@ -4632,18 +4633,20 @@ static void load_xsave(struct kvm_vcpu *
 	 */
 	valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
 	while (valid) {
+		u32 size, offset, ecx, edx;
 		u64 xfeature_mask = valid & -valid;
 		int xfeature_nr = fls64(xfeature_mask) - 1;
-		void *dest = get_xsave_addr(xsave, xfeature_nr);
 
-		if (dest) {
-			u32 size, offset, ecx, edx;
-			cpuid_count(XSTATE_CPUID, xfeature_nr,
-				    &size, &offset, &ecx, &edx);
-			if (xfeature_nr == XFEATURE_PKRU)
-				memcpy(&vcpu->arch.pkru, src + offset,
-				       sizeof(vcpu->arch.pkru));
-			else
+		cpuid_count(XSTATE_CPUID, xfeature_nr,
+			    &size, &offset, &ecx, &edx);
+
+		if (xfeature_nr == XFEATURE_PKRU) {
+			memcpy(&vcpu->arch.pkru, src + offset,
+			       sizeof(vcpu->arch.pkru));
+		} else {
+			void *dest = get_xsave_addr(xsave, xfeature_nr);
+
+			if (dest)
 				memcpy(dest, src + offset, size);
 		}
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 25/66] x86/fpu: Cleanup arch_set_user_pkey_access()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (23 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 24/66] x86/kvm: Avoid looking up PKRU in XSAVE buffer Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 26/66] x86/fpu: Get rid of copy_supervisor_to_kernel() Thomas Gleixner
                   ` (45 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function does a sanity check with a WARN_ON_ONCE() but happily proceeds
when the pkey argument is out of range.

Clean it up.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/fpu/xstate.c |   11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -912,11 +912,10 @@ EXPORT_SYMBOL_GPL(get_xsave_addr);
  * rights for @pkey to @init_val.
  */
 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
-		unsigned long init_val)
+			      unsigned long init_val)
 {
-	u32 old_pkru;
-	int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
-	u32 new_pkru_bits = 0;
+	u32 old_pkru, new_pkru_bits = 0;
+	int pkey_shift;
 
 	/*
 	 * This check implies XSAVE support.  OSPKE only gets
@@ -930,7 +929,8 @@ int arch_set_user_pkey_access(struct tas
 	 * values originating from in-kernel users.  Complain
 	 * if a bad value is observed.
 	 */
-	WARN_ON_ONCE(pkey >= arch_max_pkey());
+	if (WARN_ON_ONCE(pkey >= arch_max_pkey()))
+		return -EINVAL;
 
 	/* Set the bits we need in PKRU:  */
 	if (init_val & PKEY_DISABLE_ACCESS)
@@ -939,6 +939,7 @@ int arch_set_user_pkey_access(struct tas
 		new_pkru_bits |= PKRU_WD_BIT;
 
 	/* Shift the bits in to the correct place in PKRU for pkey: */
+	pkey_shift = pkey * PKRU_BITS_PER_PKEY;
 	new_pkru_bits <<= pkey_shift;
 
 	/* Get old PKRU and mask off any old bits in place: */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 26/66] x86/fpu: Get rid of copy_supervisor_to_kernel()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (24 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 25/66] x86/fpu: Cleanup arch_set_user_pkey_access() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-18 14:18 ` [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs() Thomas Gleixner
                   ` (44 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

If the fast path of restoring the FPU state on sigreturn fails or is not
taken and the current task's FPU is active then the FPU has to be
deactivated for the slow path to allow a safe update of the tasks FPU
memory state.

With supervisor states enabled, this requires to save the supervisor state
in the memory state first. Supervisor states require XSAVES so saving only
the supervisor state requires to reshuffle the memory buffer because XSAVES
uses the compacted format and therefore stores the supervisor states at the
beginning of the memory state. That's just an overengineered optimization.

Get rid of it and save the full state for this case.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Lutomirski <luto@kernel.org>
Reviewed-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/include/asm/fpu/xstate.h |    1 
 arch/x86/kernel/fpu/signal.c      |   13 +++++---
 arch/x86/kernel/fpu/xstate.c      |   55 --------------------------------------
 3 files changed, 8 insertions(+), 61 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -104,7 +104,6 @@ void *get_xsave_addr(struct xregs_state
 int xfeature_size(int xfeature_nr);
 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
-void copy_supervisor_to_kernel(struct xregs_state *xsave);
 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask);
 
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -401,15 +401,18 @@ static int __fpu__restore_sig(void __use
 	 * the optimisation).
 	 */
 	fpregs_lock();
-
 	if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
-
 		/*
-		 * Supervisor states are not modified by user space input.  Save
-		 * current supervisor states first and invalidate the FPU regs.
+		 * If supervisor states are available then save the
+		 * hardware state in current's fpstate so that the
+		 * supervisor state is preserved. Save the full state for
+		 * simplicity. There is no point in optimizing this by only
+		 * saving the supervisor states and then shuffle them to
+		 * the right place in memory. This is the slow path and the
+		 * above XRSTOR failed or ia32_fxstate is true. Shrug.
 		 */
 		if (xfeatures_mask_supervisor())
-			copy_supervisor_to_kernel(&fpu->state.xsave);
+			copy_xregs_to_kernel(&fpu->state.xsave);
 		set_thread_flag(TIF_NEED_FPU_LOAD);
 	}
 	__fpu_invalidate_fpregs_state(fpu);
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1197,61 +1197,6 @@ int copy_user_to_xstate(struct xregs_sta
 	return 0;
 }
 
-/*
- * Save only supervisor states to the kernel buffer.  This blows away all
- * old states, and is intended to be used only in __fpu__restore_sig(), where
- * user states are restored from the user buffer.
- */
-void copy_supervisor_to_kernel(struct xregs_state *xstate)
-{
-	struct xstate_header *header;
-	u64 max_bit, min_bit;
-	u32 lmask, hmask;
-	int err, i;
-
-	if (WARN_ON(!boot_cpu_has(X86_FEATURE_XSAVES)))
-		return;
-
-	if (!xfeatures_mask_supervisor())
-		return;
-
-	max_bit = __fls(xfeatures_mask_supervisor());
-	min_bit = __ffs(xfeatures_mask_supervisor());
-
-	lmask = xfeatures_mask_supervisor();
-	hmask = xfeatures_mask_supervisor() >> 32;
-	XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
-
-	/* We should never fault when copying to a kernel buffer: */
-	if (WARN_ON_FPU(err))
-		return;
-
-	/*
-	 * At this point, the buffer has only supervisor states and must be
-	 * converted back to normal kernel format.
-	 */
-	header = &xstate->header;
-	header->xcomp_bv |= xfeatures_mask_all;
-
-	/*
-	 * This only moves states up in the buffer.  Start with
-	 * the last state and move backwards so that states are
-	 * not overwritten until after they are moved.  Note:
-	 * memmove() allows overlapping src/dst buffers.
-	 */
-	for (i = max_bit; i >= min_bit; i--) {
-		u8 *xbuf = (u8 *)xstate;
-
-		if (!((header->xfeatures >> i) & 1))
-			continue;
-
-		/* Move xfeature 'i' into its normal location */
-		memmove(xbuf + xstate_comp_offsets[i],
-			xbuf + xstate_supervisor_only_offsets[i],
-			xstate_sizes[i]);
-	}
-}
-
 /**
  * copy_dynamic_supervisor_to_kernel() - Save dynamic supervisor states to
  *                                       an xsave area


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (25 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 26/66] x86/fpu: Get rid of copy_supervisor_to_kernel() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 18:00   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user() Thomas Gleixner
                   ` (43 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function names for xsave[s]/xrstor[s] operations are horribly named and
a permanent source of confusion.

Rename:
	copy_xregs_to_kernel() to os_xsave()
	copy_kernel_to_xregs() to os_xrstor()

These are truly low level wrappers around the actual instructions
XSAVE[OPT]/XRSTOR and XSAVES/XRSTORS with the twist that the selection
based on the available CPU features happens with an alternative to avoid
conditionals all over the place and to provide the best performance for hot
pathes.

The os_ prefix tells that this is the OS selected mechanism.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Rename (Boris)
---
 arch/x86/include/asm/fpu/internal.h |   17 +++++++++++------
 arch/x86/kernel/fpu/core.c          |    7 +++----
 arch/x86/kernel/fpu/signal.c        |   21 +++++++++++----------
 arch/x86/kernel/fpu/xstate.c        |    2 +-
 4 files changed, 26 insertions(+), 21 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -263,7 +263,7 @@ static inline void fxsave_to_kernel(stru
  * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
  */
-static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)
+static inline void os_xrstor_booting(struct xregs_state *xstate)
 {
 	u64 mask = -1;
 	u32 lmask = mask;
@@ -286,8 +286,11 @@ static inline void copy_kernel_to_xregs_
 
 /*
  * Save processor xstate to xsave area.
+ *
+ * Uses either XSAVE or XSAVEOPT or XSAVES depending on the CPU features
+ * and command line options. The choice is permanent until the next reboot.
  */
-static inline void copy_xregs_to_kernel(struct xregs_state *xstate)
+static inline void os_xsave(struct xregs_state *xstate)
 {
 	u64 mask = xfeatures_mask_all;
 	u32 lmask = mask;
@@ -304,8 +307,10 @@ static inline void copy_xregs_to_kernel(
 
 /*
  * Restore processor xstate from xsave area.
+ *
+ * Uses XRSTORS when XSAVES is used, XRSTOR otherwise.
  */
-static inline void copy_kernel_to_xregs(struct xregs_state *xstate, u64 mask)
+static inline void os_xrstor(struct xregs_state *xstate, u64 mask)
 {
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
@@ -366,13 +371,13 @@ static inline int copy_user_to_xregs(str
  * Restore xstate from kernel space xsave area, return an error code instead of
  * an exception.
  */
-static inline int copy_kernel_to_xregs_err(struct xregs_state *xstate, u64 mask)
+static inline int os_xrstor_safe(struct xregs_state *xstate, u64 mask)
 {
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
 	int err;
 
-	if (static_cpu_has(X86_FEATURE_XSAVES))
+	if (cpu_feature_enabled(X86_FEATURE_XSAVES))
 		XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 	else
 		XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);
@@ -385,7 +390,7 @@ extern int copy_fpregs_to_fpstate(struct
 static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
 {
 	if (use_xsave()) {
-		copy_kernel_to_xregs(&fpstate->xsave, mask);
+		os_xrstor(&fpstate->xsave, mask);
 	} else {
 		if (use_fxsr())
 			copy_kernel_to_fxregs(&fpstate->fxsave);
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(irq_fpu_usable);
 int copy_fpregs_to_fpstate(struct fpu *fpu)
 {
 	if (likely(use_xsave())) {
-		copy_xregs_to_kernel(&fpu->state.xsave);
+		os_xsave(&fpu->state.xsave);
 
 		/*
 		 * AVX512 state is tracked here because its use is
@@ -358,7 +358,7 @@ void fpu__drop(struct fpu *fpu)
 static inline void copy_init_fpstate_to_fpregs(u64 features_mask)
 {
 	if (use_xsave())
-		copy_kernel_to_xregs(&init_fpstate.xsave, features_mask);
+		os_xrstor(&init_fpstate.xsave, features_mask);
 	else if (static_cpu_has(X86_FEATURE_FXSR))
 		copy_kernel_to_fxregs(&init_fpstate.fxsave);
 	else
@@ -389,8 +389,7 @@ static void fpu__clear(struct fpu *fpu,
 	if (user_only) {
 		if (!fpregs_state_valid(fpu, smp_processor_id()) &&
 		    xfeatures_mask_supervisor())
-			copy_kernel_to_xregs(&fpu->state.xsave,
-					     xfeatures_mask_supervisor());
+			os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
 		copy_init_fpstate_to_fpregs(xfeatures_mask_user());
 	} else {
 		copy_init_fpstate_to_fpregs(xfeatures_mask_all);
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -261,14 +261,14 @@ static int copy_user_to_fpregs_zeroing(v
 
 			r = copy_user_to_fxregs(buf);
 			if (!r)
-				copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
+				os_xrstor(&init_fpstate.xsave, init_bv);
 			return r;
 		} else {
 			init_bv = xfeatures_mask_user() & ~xbv;
 
 			r = copy_user_to_xregs(buf, xbv);
 			if (!r && unlikely(init_bv))
-				copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
+				os_xrstor(&init_fpstate.xsave, init_bv);
 			return r;
 		}
 	} else if (use_fxsr()) {
@@ -356,9 +356,10 @@ static int __fpu__restore_sig(void __use
 			 * has been copied to the kernel one.
 			 */
 			if (test_thread_flag(TIF_NEED_FPU_LOAD) &&
-			    xfeatures_mask_supervisor())
-				copy_kernel_to_xregs(&fpu->state.xsave,
-						     xfeatures_mask_supervisor());
+			    xfeatures_mask_supervisor()) {
+				os_xrstor(&fpu->state.xsave,
+					  xfeatures_mask_supervisor());
+			}
 			fpregs_mark_activate();
 			fpregs_unlock();
 			return 0;
@@ -412,7 +413,7 @@ static int __fpu__restore_sig(void __use
 		 * above XRSTOR failed or ia32_fxstate is true. Shrug.
 		 */
 		if (xfeatures_mask_supervisor())
-			copy_xregs_to_kernel(&fpu->state.xsave);
+			os_xsave(&fpu->state.xsave);
 		set_thread_flag(TIF_NEED_FPU_LOAD);
 	}
 	__fpu_invalidate_fpregs_state(fpu);
@@ -430,14 +431,14 @@ static int __fpu__restore_sig(void __use
 
 		fpregs_lock();
 		if (unlikely(init_bv))
-			copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
+			os_xrstor(&init_fpstate.xsave, init_bv);
 
 		/*
 		 * Restore previously saved supervisor xstates along with
 		 * copied-in user xstates.
 		 */
-		ret = copy_kernel_to_xregs_err(&fpu->state.xsave,
-					       user_xfeatures | xfeatures_mask_supervisor());
+		ret = os_xrstor_safe(&fpu->state.xsave,
+				     user_xfeatures | xfeatures_mask_supervisor());
 
 	} else if (use_fxsr()) {
 		ret = __copy_from_user(&fpu->state.fxsave, buf_fx, state_size);
@@ -454,7 +455,7 @@ static int __fpu__restore_sig(void __use
 			u64 init_bv;
 
 			init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE;
-			copy_kernel_to_xregs(&init_fpstate.xsave, init_bv);
+			os_xrstor(&init_fpstate.xsave, init_bv);
 		}
 
 		ret = copy_kernel_to_fxregs_err(&fpu->state.fxsave);
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -400,7 +400,7 @@ static void __init setup_init_fpu_buf(vo
 	/*
 	 * Init all the features state with header.xfeatures being 0x0
 	 */
-	copy_kernel_to_xregs_booting(&init_fpstate.xsave);
+	os_xrstor_booting(&init_fpstate.xsave);
 
 	/*
 	 * All components are now in init state. Read the state back so


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (26 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 19:44   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 29/66] x86/fpu: Rename fxregs related copy functions Thomas Gleixner
                   ` (42 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function names for xsave[s]/xrstor[s] operations are horribly named and
a permanent source of confusion.

Rename:
	copy_xregs_to_user() to xsave_to_user_sigframe()
	copy_user_to_xregs() to xrstor_from_user_sigframe()

so it's entirely clear what this is about. This is also a clear indicator
of the potentially different storage format because this is user ABI and
cannot use compacted format.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    4 ++--
 arch/x86/kernel/fpu/signal.c        |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -328,7 +328,7 @@ static inline void os_xrstor(struct xreg
  * backward compatibility for old applications which don't understand
  * compacted format of xsave area.
  */
-static inline int copy_xregs_to_user(struct xregs_state __user *buf)
+static inline int xsave_to_user_sigframe(struct xregs_state __user *buf)
 {
 	u64 mask = xfeatures_mask_user();
 	u32 lmask = mask;
@@ -353,7 +353,7 @@ static inline int copy_xregs_to_user(str
 /*
  * Restore xstate from user space xsave area.
  */
-static inline int copy_user_to_xregs(struct xregs_state __user *buf, u64 mask)
+static inline int xrstor_from_user_sigframe(struct xregs_state __user *buf, u64 mask)
 {
 	struct xregs_state *xstate = ((__force struct xregs_state *)buf);
 	u32 lmask = mask;
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -129,7 +129,7 @@ static inline int copy_fpregs_to_sigfram
 	int err;
 
 	if (use_xsave())
-		err = copy_xregs_to_user(buf);
+		err = xsave_to_user_sigframe(buf);
 	else if (use_fxsr())
 		err = copy_fxregs_to_user((struct fxregs_state __user *) buf);
 	else
@@ -266,7 +266,7 @@ static int copy_user_to_fpregs_zeroing(v
 		} else {
 			init_bv = xfeatures_mask_user() & ~xbv;
 
-			r = copy_user_to_xregs(buf, xbv);
+			r = xrstor_from_user_sigframe(buf, xbv);
 			if (!r && unlikely(init_bv))
 				os_xrstor(&init_fpstate.xsave, init_bv);
 			return r;


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 29/66] x86/fpu: Rename fxregs related copy functions
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (27 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-21 23:00   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 30/66] x86/fpu: Rename fregs " Thomas Gleixner
                   ` (41 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function names for fxsave/fxrstor operations are horribly named and
a permanent source of confusion.

Rename:
	copy_fxregs_to_kernel() to fxsave()
	copy_kernel_to_fxregs() to fxrstor()
	copy_fxregs_to_user() to fxsave_to_user_sigframe()
	copy_user_to_fxregs() to fxrstor_from_user_sigframe()

so it's clear what these are doing. All these functions are really low
level wrappers around the equaly named instructions, so mapping to the
documentation is just natural.

While at it replace the static_cpu_has(X86_FEATURE_FXSR) with use_fxsr() to
be consistent with the rest of the code.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Rename (Boris)
---
 arch/x86/include/asm/fpu/internal.h |   18 +++++-------------
 arch/x86/kernel/fpu/core.c          |    4 ++--
 arch/x86/kernel/fpu/signal.c        |   10 +++++-----
 3 files changed, 12 insertions(+), 20 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -131,7 +131,7 @@ static inline int copy_fregs_to_user(str
 	return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));
 }
 
-static inline int copy_fxregs_to_user(struct fxregs_state __user *fx)
+static inline int fxsave_to_user_sigframe(struct fxregs_state __user *fx)
 {
 	if (IS_ENABLED(CONFIG_X86_32))
 		return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
@@ -140,7 +140,7 @@ static inline int copy_fxregs_to_user(st
 
 }
 
-static inline void copy_kernel_to_fxregs(struct fxregs_state *fx)
+static inline void fxrstor(struct fxregs_state *fx)
 {
 	if (IS_ENABLED(CONFIG_X86_32))
 		kernel_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
@@ -148,7 +148,7 @@ static inline void copy_kernel_to_fxregs
 		kernel_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline int copy_kernel_to_fxregs_err(struct fxregs_state *fx)
+static inline int fxrstor_safe(struct fxregs_state *fx)
 {
 	if (IS_ENABLED(CONFIG_X86_32))
 		return kernel_insn_err(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
@@ -156,7 +156,7 @@ static inline int copy_kernel_to_fxregs_
 		return kernel_insn_err(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline int copy_user_to_fxregs(struct fxregs_state __user *fx)
+static inline int fxrstor_from_user_sigframe(struct fxregs_state __user *fx)
 {
 	if (IS_ENABLED(CONFIG_X86_32))
 		return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
@@ -179,14 +179,6 @@ static inline int copy_user_to_fregs(str
 	return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline void copy_fxregs_to_kernel(struct fpu *fpu)
-{
-	if (IS_ENABLED(CONFIG_X86_32))
-		asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu->state.fxsave));
-	else
-		asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu->state.fxsave));
-}
-
 static inline void fxsave(struct fxregs_state *fx)
 {
 	if (IS_ENABLED(CONFIG_X86_32))
@@ -393,7 +385,7 @@ static inline void __copy_kernel_to_fpre
 		os_xrstor(&fpstate->xsave, mask);
 	} else {
 		if (use_fxsr())
-			copy_kernel_to_fxregs(&fpstate->fxsave);
+			fxrstor(&fpstate->fxsave);
 		else
 			copy_kernel_to_fregs(&fpstate->fsave);
 	}
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -107,7 +107,7 @@ int copy_fpregs_to_fpstate(struct fpu *f
 	}
 
 	if (likely(use_fxsr())) {
-		copy_fxregs_to_kernel(fpu);
+		fxsave(&fpu->state.fxsave);
 		return 1;
 	}
 
@@ -360,7 +360,7 @@ static inline void copy_init_fpstate_to_
 	if (use_xsave())
 		os_xrstor(&init_fpstate.xsave, features_mask);
 	else if (static_cpu_has(X86_FEATURE_FXSR))
-		copy_kernel_to_fxregs(&init_fpstate.fxsave);
+		fxrstor(&init_fpstate.fxsave);
 	else
 		copy_kernel_to_fregs(&init_fpstate.fsave);
 
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -64,7 +64,7 @@ static inline int save_fsave_header(stru
 
 		fpregs_lock();
 		if (!test_thread_flag(TIF_NEED_FPU_LOAD))
-			copy_fxregs_to_kernel(&tsk->thread.fpu);
+			fxsave(&tsk->thread.fpu.state.fxsave);
 		fpregs_unlock();
 
 		convert_from_fxsr(&env, tsk);
@@ -131,7 +131,7 @@ static inline int copy_fpregs_to_sigfram
 	if (use_xsave())
 		err = xsave_to_user_sigframe(buf);
 	else if (use_fxsr())
-		err = copy_fxregs_to_user((struct fxregs_state __user *) buf);
+		err = fxsave_to_user_sigframe((struct fxregs_state __user *) buf);
 	else
 		err = copy_fregs_to_user((struct fregs_state __user *) buf);
 
@@ -259,7 +259,7 @@ static int copy_user_to_fpregs_zeroing(v
 		if (fx_only) {
 			init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE;
 
-			r = copy_user_to_fxregs(buf);
+			r = fxrstor_from_user_sigframe(buf);
 			if (!r)
 				os_xrstor(&init_fpstate.xsave, init_bv);
 			return r;
@@ -272,7 +272,7 @@ static int copy_user_to_fpregs_zeroing(v
 			return r;
 		}
 	} else if (use_fxsr()) {
-		return copy_user_to_fxregs(buf);
+		return fxrstor_from_user_sigframe(buf);
 	} else
 		return copy_user_to_fregs(buf);
 }
@@ -458,7 +458,7 @@ static int __fpu__restore_sig(void __use
 			os_xrstor(&init_fpstate.xsave, init_bv);
 		}
 
-		ret = copy_kernel_to_fxregs_err(&fpu->state.fxsave);
+		ret = fxrstor_safe(&fpu->state.fxsave);
 	} else {
 		ret = __copy_from_user(&fpu->state.fsave, buf_fx, state_size);
 		if (ret)


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 30/66] x86/fpu: Rename fregs related copy functions
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (28 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 29/66] x86/fpu: Rename fxregs related copy functions Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22  9:31   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI Thomas Gleixner
                   ` (40 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The function names for fnsave/fnrstor operations are horribly named and
a permanent source of confusion.

Rename:
	copy_fregs_to_kernel() to fnsave()
	copy_kernel_to_fregs() to fnrstor()
	copy_fregs_to_user()   to fnsave_to_user_sigframe()
	copy_user_to_fregs()   to fnrstor_from_user_sigframe()

so it's clear what these are doing. All these functions are really low
level wrappers around the equaly named instructions, so mapping to the
documentation is just natural.

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Rename (Boris)
---
 arch/x86/include/asm/fpu/internal.h |   10 +++++-----
 arch/x86/kernel/fpu/core.c          |    2 +-
 arch/x86/kernel/fpu/signal.c        |    6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -126,7 +126,7 @@ static inline void fpstate_init_soft(str
 		     _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_fprestore)	\
 		     : output : input)
 
-static inline int copy_fregs_to_user(struct fregs_state __user *fx)
+static inline int fnsave_to_user_sigframe(struct fregs_state __user *fx)
 {
 	return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));
 }
@@ -164,17 +164,17 @@ static inline int fxrstor_from_user_sigf
 		return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline void copy_kernel_to_fregs(struct fregs_state *fx)
+static inline void frstor(struct fregs_state *fx)
 {
 	kernel_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline int copy_kernel_to_fregs_err(struct fregs_state *fx)
+static inline int frstor_safe(struct fregs_state *fx)
 {
 	return kernel_insn_err(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
 
-static inline int copy_user_to_fregs(struct fregs_state __user *fx)
+static inline int frstor_from_user_sigframe(struct fregs_state __user *fx)
 {
 	return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 }
@@ -387,7 +387,7 @@ static inline void __copy_kernel_to_fpre
 		if (use_fxsr())
 			fxrstor(&fpstate->fxsave);
 		else
-			copy_kernel_to_fregs(&fpstate->fsave);
+			frstor(&fpstate->fsave);
 	}
 }
 
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -362,7 +362,7 @@ static inline void copy_init_fpstate_to_
 	else if (static_cpu_has(X86_FEATURE_FXSR))
 		fxrstor(&init_fpstate.fxsave);
 	else
-		copy_kernel_to_fregs(&init_fpstate.fsave);
+		frstor(&init_fpstate.fsave);
 
 	if (boot_cpu_has(X86_FEATURE_OSPKE))
 		copy_init_pkru_to_fpregs();
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -133,7 +133,7 @@ static inline int copy_fpregs_to_sigfram
 	else if (use_fxsr())
 		err = fxsave_to_user_sigframe((struct fxregs_state __user *) buf);
 	else
-		err = copy_fregs_to_user((struct fregs_state __user *) buf);
+		err = fnsave_to_user_sigframe((struct fregs_state __user *) buf);
 
 	if (unlikely(err) && __clear_user(buf, fpu_user_xstate_size))
 		err = -EFAULT;
@@ -274,7 +274,7 @@ static int copy_user_to_fpregs_zeroing(v
 	} else if (use_fxsr()) {
 		return fxrstor_from_user_sigframe(buf);
 	} else
-		return copy_user_to_fregs(buf);
+		return frstor_from_user_sigframe(buf);
 }
 
 static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
@@ -465,7 +465,7 @@ static int __fpu__restore_sig(void __use
 			goto out;
 
 		fpregs_lock();
-		ret = copy_kernel_to_fregs_err(&fpu->state.fsave);
+		ret = frstor_safe(&fpu->state.fsave);
 	}
 	if (!ret)
 		fpregs_mark_activate();


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (29 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 30/66] x86/fpu: Rename fregs " Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22  9:38   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate() Thomas Gleixner
                   ` (39 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Rename them to reflect that these functions deal with user space format
XSAVE buffers.

      copy_kernel_to_xstate() -> copy_uabi_from_kernel_to_xstate()
      copy_user_to_xstate()   -> copy_sigframe_from_user_to_xstate()

Again a clear statement that these functions deal with user space ABI.

Suggested-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/xstate.h |    4 ++--
 arch/x86/kernel/fpu/regset.c      |    2 +-
 arch/x86/kernel/fpu/signal.c      |    2 +-
 arch/x86/kernel/fpu/xstate.c      |    5 +++--
 4 files changed, 7 insertions(+), 6 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -102,8 +102,8 @@ extern void __init update_regset_xstate_
 
 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr);
 int xfeature_size(int xfeature_nr);
-int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
-int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
+int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
+int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask);
 
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -167,7 +167,7 @@ int xstateregs_set(struct task_struct *t
 	}
 
 	fpu_force_restore(fpu);
-	ret = copy_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
+	ret = copy_uabi_from_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
 
 out:
 	vfree(tmpbuf);
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -422,7 +422,7 @@ static int __fpu__restore_sig(void __use
 	if (use_xsave() && !fx_only) {
 		u64 init_bv = xfeatures_mask_user() & ~user_xfeatures;
 
-		ret = copy_user_to_xstate(&fpu->state.xsave, buf_fx);
+		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx);
 		if (ret)
 			goto out;
 
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1099,7 +1099,7 @@ static inline bool mxcsr_valid(struct xs
  * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S] format
  * and copy to the target thread. This is called from xstateregs_set().
  */
-int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
+int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
 {
 	unsigned int offset, size;
 	int i;
@@ -1154,7 +1154,8 @@ int copy_kernel_to_xstate(struct xregs_s
  * XSAVE[S] format and copy to the target thread. This is called from the
  * sigreturn() and rt_sigreturn() system calls.
  */
-int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf)
+int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave,
+				      const void __user *ubuf)
 {
 	unsigned int offset, size;
 	int i;


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (30 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22 10:09   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate() Thomas Gleixner
                   ` (38 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

copy_uabi_from_user_to_xstate() and copy_uabi_from_kernel_to_xstate() are
almost identical except for the copy function.

Unify them.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Andy Lutomirski <luto@kernel.org>
---
V3: Fixed MXCSR thinkos and simplified the handling of MXCSR
---
 arch/x86/kernel/fpu/xstate.c |  137 ++++++++++++++-----------------------------
 1 file changed, 47 insertions(+), 90 deletions(-)

--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -953,23 +953,6 @@ int arch_set_user_pkey_access(struct tas
 }
 #endif /* ! CONFIG_ARCH_HAS_PKEYS */
 
-/*
- * Weird legacy quirk: SSE and YMM states store information in the
- * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP
- * area is marked as unused in the xfeatures header, we need to copy
- * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use.
- */
-static inline bool xfeatures_mxcsr_quirk(u64 xfeatures)
-{
-	if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM)))
-		return false;
-
-	if (xfeatures & XFEATURE_MASK_FP)
-		return false;
-
-	return true;
-}
-
 static void copy_feature(bool from_xstate, struct membuf *to, void *xstate,
 			 void *init_xstate, unsigned int size)
 {
@@ -1082,39 +1065,53 @@ void copy_xstate_to_uabi_buf(struct memb
 		membuf_zero(&to, to.left);
 }
 
-static inline bool mxcsr_valid(struct xstate_header *hdr, const u32 *mxcsr)
+static int copy_from_buffer(void *dst, unsigned int offset, unsigned int size,
+			    const void *kbuf, const void __user *ubuf)
 {
-	u64 mask = XFEATURE_MASK_FP | XFEATURE_MASK_SSE | XFEATURE_MASK_YMM;
-
-	/* Only check if it is in use */
-	if (hdr->xfeatures & mask) {
-		/* Reserved bits in MXCSR must be zero. */
-		if (*mxcsr & ~mxcsr_feature_mask)
-			return false;
+	if (kbuf) {
+		memcpy(dst, kbuf + offset, size);
+	} else {
+		if (copy_from_user(dst, ubuf + offset, size))
+			return -EFAULT;
 	}
-	return true;
+	return 0;
 }
 
-/*
- * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S] format
- * and copy to the target thread. This is called from xstateregs_set().
- */
-int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
+
+static int copy_uabi_to_xstate(struct xregs_state *xsave, const void *kbuf,
+			       const void __user *ubuf)
 {
 	unsigned int offset, size;
-	int i;
 	struct xstate_header hdr;
+	u64 mask;
+	int i;
 
 	offset = offsetof(struct xregs_state, header);
-	size = sizeof(hdr);
-
-	memcpy(&hdr, kbuf + offset, size);
+	if (copy_from_buffer(&hdr, offset, sizeof(hdr), kbuf, ubuf))
+		return -EFAULT;
 
 	if (validate_user_xstate_header(&hdr))
 		return -EINVAL;
 
-	if (!mxcsr_valid(&hdr, kbuf + offsetof(struct fxregs_state, mxcsr)))
-		return -EINVAL;
+	/* Validate MXCSR when any of the related features is in use */
+	mask = XFEATURE_MASK_FP | XFEATURE_MASK_SSE | XFEATURE_MASK_YMM;
+	if (hdr.xfeatures & mask) {
+		u32 mxcsr[2];
+
+		offset = offsetof(struct fxregs_state, mxcsr);
+		if (copy_from_buffer(mxcsr, offset, sizeof(mxcsr), kbuf, ubuf))
+			return -EFAULT;
+
+		/* Reserved bits in MXCSR must be zero. */
+		if (mxcsr[0] & ~mxcsr_feature_mask)
+			return -EINVAL;
+
+		/* SSE and YMM require MXCSR even when FP is not in use. */
+		if (!(hdr.xfeatures & XFEATURE_MASK_FP)) {
+			xsave->i387.mxcsr = mxcsr[0];
+			xsave->i387.mxcsr_mask = mxcsr[1];
+		}
+	}
 
 	for (i = 0; i < XFEATURE_MAX; i++) {
 		u64 mask = ((u64)1 << i);
@@ -1125,16 +1122,11 @@ int copy_uabi_from_kernel_to_xstate(stru
 			offset = xstate_offsets[i];
 			size = xstate_sizes[i];
 
-			memcpy(dst, kbuf + offset, size);
+			if (copy_from_buffer(dst, offset, size, kbuf, ubuf))
+				return -EFAULT;
 		}
 	}
 
-	if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
-		offset = offsetof(struct fxregs_state, mxcsr);
-		size = MXCSR_AND_FLAGS_SIZE;
-		memcpy(&xsave->i387.mxcsr, kbuf + offset, size);
-	}
-
 	/*
 	 * The state that came in from userspace was user-state only.
 	 * Mask all the user states out of 'xfeatures':
@@ -1150,6 +1142,16 @@ int copy_uabi_from_kernel_to_xstate(stru
 }
 
 /*
+ * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S]
+ * format and copy to the target thread. This is called from
+ * xstateregs_set().
+ */
+int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf)
+{
+	return copy_uabi_to_xstate(xsave, kbuf, NULL);
+}
+
+/*
  * Convert from a sigreturn standard-format user-space buffer to kernel
  * XSAVE[S] format and copy to the target thread. This is called from the
  * sigreturn() and rt_sigreturn() system calls.
@@ -1157,52 +1159,7 @@ int copy_uabi_from_kernel_to_xstate(stru
 int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave,
 				      const void __user *ubuf)
 {
-	unsigned int offset, size;
-	int i;
-	struct xstate_header hdr;
-
-	offset = offsetof(struct xregs_state, header);
-	size = sizeof(hdr);
-
-	if (copy_from_user(&hdr, ubuf + offset, size))
-		return -EFAULT;
-
-	if (validate_user_xstate_header(&hdr))
-		return -EINVAL;
-
-	for (i = 0; i < XFEATURE_MAX; i++) {
-		u64 mask = ((u64)1 << i);
-
-		if (hdr.xfeatures & mask) {
-			void *dst = __raw_xsave_addr(xsave, i);
-
-			offset = xstate_offsets[i];
-			size = xstate_sizes[i];
-
-			if (copy_from_user(dst, ubuf + offset, size))
-				return -EFAULT;
-		}
-	}
-
-	if (xfeatures_mxcsr_quirk(hdr.xfeatures)) {
-		offset = offsetof(struct fxregs_state, mxcsr);
-		size = MXCSR_AND_FLAGS_SIZE;
-		if (copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size))
-			return -EFAULT;
-	}
-
-	/*
-	 * The state that came in from userspace was user-state only.
-	 * Mask all the user states out of 'xfeatures':
-	 */
-	xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL;
-
-	/*
-	 * Add back in the features that came in from userspace:
-	 */
-	xsave->header.xfeatures |= hdr.xfeatures;
-
-	return 0;
+	return copy_uabi_to_xstate(xsave, NULL, ubuf);
 }
 
 /**


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (31 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22 10:16   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization Thomas Gleixner
                   ` (37 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

A copy is guaranteed to leave the source intact, which is not the case when
FNSAVE is used as that reinitilizes the registers.

Save does not make such guarantees and it matches what this is about,
i.e. to save the state for a later restore.

Rename it to save_fpregs_to_fpstate(). 

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    4 ++--
 arch/x86/kernel/fpu/core.c          |   10 +++++-----
 arch/x86/kvm/x86.c                  |    2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -375,7 +375,7 @@ static inline int os_xrstor_safe(struct
 	return err;
 }
 
-extern int copy_fpregs_to_fpstate(struct fpu *fpu);
+extern int save_fpregs_to_fpstate(struct fpu *fpu);
 
 static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
 {
@@ -507,7 +507,7 @@ static inline void __fpregs_load_activat
 static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
 {
 	if (static_cpu_has(X86_FEATURE_FPU) && !(current->flags & PF_KTHREAD)) {
-		if (!copy_fpregs_to_fpstate(old_fpu))
+		if (!save_fpregs_to_fpstate(old_fpu))
 			old_fpu->last_cpu = -1;
 		else
 			old_fpu->last_cpu = cpu;
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -92,7 +92,7 @@ EXPORT_SYMBOL(irq_fpu_usable);
  * Modern FPU state can be kept in registers, if there are
  * no pending FP exceptions.
  */
-int copy_fpregs_to_fpstate(struct fpu *fpu)
+int save_fpregs_to_fpstate(struct fpu *fpu)
 {
 	if (likely(use_xsave())) {
 		os_xsave(&fpu->state.xsave);
@@ -119,7 +119,7 @@ int copy_fpregs_to_fpstate(struct fpu *f
 
 	return 0;
 }
-EXPORT_SYMBOL(copy_fpregs_to_fpstate);
+EXPORT_SYMBOL(save_fpregs_to_fpstate);
 
 void kernel_fpu_begin_mask(unsigned int kfpu_mask)
 {
@@ -137,7 +137,7 @@ void kernel_fpu_begin_mask(unsigned int
 		 * Ignore return value -- we don't care if reg state
 		 * is clobbered.
 		 */
-		copy_fpregs_to_fpstate(&current->thread.fpu);
+		save_fpregs_to_fpstate(&current->thread.fpu);
 	}
 	__cpu_invalidate_fpregs_state();
 
@@ -172,7 +172,7 @@ void fpu__save(struct fpu *fpu)
 	trace_x86_fpu_before_save(fpu);
 
 	if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
-		if (!copy_fpregs_to_fpstate(fpu)) {
+		if (!save_fpregs_to_fpstate(fpu)) {
 			copy_kernel_to_fpregs(&fpu->state);
 		}
 	}
@@ -255,7 +255,7 @@ int fpu__copy(struct task_struct *dst, s
 	if (test_thread_flag(TIF_NEED_FPU_LOAD))
 		memcpy(&dst_fpu->state, &src_fpu->state, fpu_kernel_xstate_size);
 
-	else if (!copy_fpregs_to_fpstate(dst_fpu))
+	else if (!save_fpregs_to_fpstate(dst_fpu))
 		copy_kernel_to_fpregs(&dst_fpu->state);
 
 	fpregs_unlock();
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -9618,7 +9618,7 @@ static void kvm_save_current_fpu(struct
 		memcpy(&fpu->state, &current->thread.fpu.state,
 		       fpu_kernel_xstate_size);
 	else
-		copy_fpregs_to_fpstate(fpu);
+		save_fpregs_to_fpstate(fpu);
 }
 
 /* Swap (qemu) user FPU context for the guest FPU context. */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (32 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22 10:36   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel() Thomas Gleixner
                   ` (36 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The FNSAVE support requires conditionals in quite some call paths because
FNSAVE reinitialized the FPU hardware. If the save has to preserve the FPU
register state then the caller has to conditionally restore it from memory
when FNSAVE is in use.

This also requires a conditional in context switch because the restore
avoidance optimization cannot work with FNSAVE. As this only affects 20+
years old CPUs there is really no reason to keep this optimization
effective for FNSAVE. It's about time to not optimize for antiques anymore.

Just unconditionally FRSTOR the save content to the registers and clean up
the conditionals all over the place.

Suggested-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: New patch
---
 arch/x86/include/asm/fpu/internal.h |   17 +++++++----
 arch/x86/kernel/fpu/core.c          |   54 +++++++++++++++---------------------
 2 files changed, 34 insertions(+), 37 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -375,7 +375,7 @@ static inline int os_xrstor_safe(struct
 	return err;
 }
 
-extern int save_fpregs_to_fpstate(struct fpu *fpu);
+extern void save_fpregs_to_fpstate(struct fpu *fpu);
 
 static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
 {
@@ -507,12 +507,17 @@ static inline void __fpregs_load_activat
 static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
 {
 	if (static_cpu_has(X86_FEATURE_FPU) && !(current->flags & PF_KTHREAD)) {
-		if (!save_fpregs_to_fpstate(old_fpu))
-			old_fpu->last_cpu = -1;
-		else
-			old_fpu->last_cpu = cpu;
+		save_fpregs_to_fpstate(old_fpu);
+		/*
+		 * The save operation preserved register state, so the
+		 * fpu_fpregs_owner_ctx is still @old_fpu. Store the
+		 * current CPU number in @old_fpu, so the next return
+		 * to user space can avoid the FPU register restore
+		 * when is returns on the same CPU and still owns the
+		 * context.
+		 */
+		old_fpu->last_cpu = cpu;
 
-		/* But leave fpu_fpregs_owner_ctx! */
 		trace_x86_fpu_regs_deactivated(old_fpu);
 	}
 }
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -83,16 +83,20 @@ bool irq_fpu_usable(void)
 EXPORT_SYMBOL(irq_fpu_usable);
 
 /*
- * These must be called with preempt disabled. Returns
- * 'true' if the FPU state is still intact and we can
- * keep registers active.
+ * Save the FPU register state in fpu->state. The register state is
+ * preserved.
  *
- * The legacy FNSAVE instruction cleared all FPU state
- * unconditionally, so registers are essentially destroyed.
- * Modern FPU state can be kept in registers, if there are
- * no pending FP exceptions.
+ * Must be called with fpregs_lock() held.
+ *
+ * The legacy FNSAVE instruction clears all FPU state unconditionally, so
+ * register state has to be reloaded. That might be a pointless exercise
+ * when the FPU is going to be used by another task right after that. But
+ * this only affect 20+ years old 32bit systems and avoids conditionals all
+ * over the place.
+ *
+ * FXSAVE and all XSAVE variants preserve the FPU register state.
  */
-int save_fpregs_to_fpstate(struct fpu *fpu)
+void save_fpregs_to_fpstate(struct fpu *fpu)
 {
 	if (likely(use_xsave())) {
 		os_xsave(&fpu->state.xsave);
@@ -103,21 +107,20 @@ int save_fpregs_to_fpstate(struct fpu *f
 		 */
 		if (fpu->state.xsave.header.xfeatures & XFEATURE_MASK_AVX512)
 			fpu->avx512_timestamp = jiffies;
-		return 1;
+		return;
 	}
 
 	if (likely(use_fxsr())) {
 		fxsave(&fpu->state.fxsave);
-		return 1;
+		return;
 	}
 
 	/*
 	 * Legacy FPU register saving, FNSAVE always clears FPU registers,
-	 * so we have to mark them inactive:
+	 * so we have to reload them from the memory state.
 	 */
 	asm volatile("fnsave %[fp]; fwait" : [fp] "=m" (fpu->state.fsave));
-
-	return 0;
+	frstor(&fpu->state.fsave);
 }
 EXPORT_SYMBOL(save_fpregs_to_fpstate);
 
@@ -133,10 +136,6 @@ void kernel_fpu_begin_mask(unsigned int
 	if (!(current->flags & PF_KTHREAD) &&
 	    !test_thread_flag(TIF_NEED_FPU_LOAD)) {
 		set_thread_flag(TIF_NEED_FPU_LOAD);
-		/*
-		 * Ignore return value -- we don't care if reg state
-		 * is clobbered.
-		 */
 		save_fpregs_to_fpstate(&current->thread.fpu);
 	}
 	__cpu_invalidate_fpregs_state();
@@ -171,11 +170,8 @@ void fpu__save(struct fpu *fpu)
 	fpregs_lock();
 	trace_x86_fpu_before_save(fpu);
 
-	if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
-		if (!save_fpregs_to_fpstate(fpu)) {
-			copy_kernel_to_fpregs(&fpu->state);
-		}
-	}
+	if (!test_thread_flag(TIF_NEED_FPU_LOAD))
+		save_fpregs_to_fpstate(fpu);
 
 	trace_x86_fpu_after_save(fpu);
 	fpregs_unlock();
@@ -244,20 +240,16 @@ int fpu__copy(struct task_struct *dst, s
 	memset(&dst_fpu->state.xsave, 0, fpu_kernel_xstate_size);
 
 	/*
-	 * If the FPU registers are not current just memcpy() the state.
-	 * Otherwise save current FPU registers directly into the child's FPU
-	 * context, without any memory-to-memory copying.
-	 *
-	 * ( The function 'fails' in the FNSAVE case, which destroys
-	 *   register contents so we have to load them back. )
+	 * If the FPU registers are not owned by current just memcpy() the
+	 * state.  Otherwise save the FPU registers directly into the
+	 * child's FPU context, without any memory-to-memory copying.
 	 */
 	fpregs_lock();
 	if (test_thread_flag(TIF_NEED_FPU_LOAD))
 		memcpy(&dst_fpu->state, &src_fpu->state, fpu_kernel_xstate_size);
 
-	else if (!save_fpregs_to_fpstate(dst_fpu))
-		copy_kernel_to_fpregs(&dst_fpu->state);
-
+	else
+		save_fpregs_to_fpstate(dst_fpu);
 	fpregs_unlock();
 
 	set_tsk_thread_flag(dst, TIF_NEED_FPU_LOAD);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (33 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22 10:46   ` Borislav Petkov
  2021-06-18 14:18 ` [patch V3 36/66] x86/fpu: Rename initstate copy functions Thomas Gleixner
                   ` (35 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

This is not a copy functionality. It restores the register state from the
supplied kernel buffer.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    8 ++++----
 arch/x86/kvm/x86.c                  |    4 ++--
 arch/x86/mm/extable.c               |    2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -377,7 +377,7 @@ static inline int os_xrstor_safe(struct
 
 extern void save_fpregs_to_fpstate(struct fpu *fpu);
 
-static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
+static inline void __restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask)
 {
 	if (use_xsave()) {
 		os_xrstor(&fpstate->xsave, mask);
@@ -389,7 +389,7 @@ static inline void __copy_kernel_to_fpre
 	}
 }
 
-static inline void copy_kernel_to_fpregs(union fpregs_state *fpstate)
+static inline void restore_fpregs_from_fpstate(union fpregs_state *fpstate)
 {
 	/*
 	 * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is
@@ -404,7 +404,7 @@ static inline void copy_kernel_to_fpregs
 			: : [addr] "m" (fpstate));
 	}
 
-	__copy_kernel_to_fpregs(fpstate, -1);
+	__restore_fpregs_from_fpstate(fpstate, -1);
 }
 
 extern int copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
@@ -475,7 +475,7 @@ static inline void __fpregs_load_activat
 		return;
 
 	if (!fpregs_state_valid(fpu, cpu)) {
-		copy_kernel_to_fpregs(&fpu->state);
+		restore_fpregs_from_fpstate(&fpu->state);
 		fpregs_activate(fpu);
 		fpu->last_cpu = cpu;
 	}
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -9634,7 +9634,7 @@ static void kvm_load_guest_fpu(struct kv
 	 */
 	if (vcpu->arch.guest_fpu)
 		/* PKRU is separately restored in kvm_x86_ops.run. */
-		__copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
+		__restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
 					~XFEATURE_MASK_PKRU);
 
 	fpregs_mark_activate();
@@ -9655,7 +9655,7 @@ static void kvm_put_guest_fpu(struct kvm
 	if (vcpu->arch.guest_fpu)
 		kvm_save_current_fpu(vcpu->arch.guest_fpu);
 
-	copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
+	restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
 
 	fpregs_mark_activate();
 	fpregs_unlock();
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -65,7 +65,7 @@ EXPORT_SYMBOL_GPL(ex_handler_fault);
 	WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
 		  (void *)instruction_pointer(regs));
 
-	__copy_kernel_to_fpregs(&init_fpstate, -1);
+	__restore_fpregs_from_fpstate(&init_fpstate, -1);
 	return true;
 }
 EXPORT_SYMBOL_GPL(ex_handler_fprestore);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 36/66] x86/fpu: Rename initstate copy functions
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (34 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel() Thomas Gleixner
@ 2021-06-18 14:18 ` Thomas Gleixner
  2021-06-22 10:48   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent" Thomas Gleixner
                   ` (34 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:18 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Again this not a copy. It's loading register state.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/core.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -303,7 +303,7 @@ void fpu__drop(struct fpu *fpu)
  * Clear FPU registers by setting them up from the init fpstate.
  * Caller must do fpregs_[un]lock() around it.
  */
-static inline void copy_init_fpstate_to_fpregs(u64 features_mask)
+static inline void load_fpregs_from_init_fpstate(u64 features_mask)
 {
 	if (use_xsave())
 		os_xrstor(&init_fpstate.xsave, features_mask);
@@ -338,9 +338,9 @@ static void fpu__clear(struct fpu *fpu,
 		if (!fpregs_state_valid(fpu, smp_processor_id()) &&
 		    xfeatures_mask_supervisor())
 			os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
-		copy_init_fpstate_to_fpregs(xfeatures_mask_user());
+		load_fpregs_from_init_fpstate(xfeatures_mask_user());
 	} else {
-		copy_init_fpstate_to_fpregs(xfeatures_mask_all);
+		load_fpregs_from_init_fpstate(xfeatures_mask_all);
 	}
 
 	fpregs_mark_activate();


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent"
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (35 preceding siblings ...)
  2021-06-18 14:18 ` [patch V3 36/66] x86/fpu: Rename initstate copy functions Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 11:05   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
                   ` (33 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Andy Lutomirski <luto@kernel.org>

The salient feature of "dynamic" XSTATEs is that they are not part of the
main task XSTATE buffer.  The fact that they are dynamically allocated is
irrelevant and will become quite confusing when user math XSTATEs start
being dynamically allocated.  Rename them to "independent" because they
are independent of the main XSTATE code.

This is just a search-and-replace with some whitespace updates to keep
things aligned.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/1eecb0e4f3e07828ebe5d737ec77dc3b708fad2d.1623388344.git.luto@kernel.org
---
 arch/x86/events/intel/lbr.c       |    6 +--
 arch/x86/include/asm/fpu/xstate.h |   14 ++++----
 arch/x86/kernel/fpu/xstate.c      |   62 +++++++++++++++++++-------------------
 3 files changed, 41 insertions(+), 41 deletions(-)

--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -491,7 +491,7 @@ static void intel_pmu_arch_lbr_xrstors(v
 {
 	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
 
-	copy_kernel_to_dynamic_supervisor(&task_ctx->xsave, XFEATURE_MASK_LBR);
+	copy_kernel_to_independent_supervisor(&task_ctx->xsave, XFEATURE_MASK_LBR);
 }
 
 static __always_inline bool lbr_is_reset_in_cstate(void *ctx)
@@ -576,7 +576,7 @@ static void intel_pmu_arch_lbr_xsaves(vo
 {
 	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
 
-	copy_dynamic_supervisor_to_kernel(&task_ctx->xsave, XFEATURE_MASK_LBR);
+	copy_independent_supervisor_to_kernel(&task_ctx->xsave, XFEATURE_MASK_LBR);
 }
 
 static void __intel_pmu_lbr_save(void *ctx)
@@ -992,7 +992,7 @@ static void intel_pmu_arch_lbr_read_xsav
 		intel_pmu_store_lbr(cpuc, NULL);
 		return;
 	}
-	copy_dynamic_supervisor_to_kernel(&xsave->xsave, XFEATURE_MASK_LBR);
+	copy_independent_supervisor_to_kernel(&xsave->xsave, XFEATURE_MASK_LBR);
 
 	intel_pmu_store_lbr(cpuc, xsave->lbr.entries);
 }
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -56,7 +56,7 @@
  * - Don't set the bit corresponding to the dynamic supervisor feature in
  *   IA32_XSS at run time, since it has been set at boot time.
  */
-#define XFEATURE_MASK_DYNAMIC (XFEATURE_MASK_LBR)
+#define XFEATURE_MASK_INDEPENDENT (XFEATURE_MASK_LBR)
 
 /*
  * Unsupported supervisor features. When a supervisor feature in this mask is
@@ -66,7 +66,7 @@
 
 /* All supervisor states including supported and unsupported states. */
 #define XFEATURE_MASK_SUPERVISOR_ALL (XFEATURE_MASK_SUPERVISOR_SUPPORTED | \
-				      XFEATURE_MASK_DYNAMIC | \
+				      XFEATURE_MASK_INDEPENDENT | \
 				      XFEATURE_MASK_SUPERVISOR_UNSUPPORTED)
 
 #ifdef CONFIG_X86_64
@@ -87,12 +87,12 @@ static inline u64 xfeatures_mask_user(vo
 	return xfeatures_mask_all & XFEATURE_MASK_USER_SUPPORTED;
 }
 
-static inline u64 xfeatures_mask_dynamic(void)
+static inline u64 xfeatures_mask_independent(void)
 {
 	if (!boot_cpu_has(X86_FEATURE_ARCH_LBR))
-		return XFEATURE_MASK_DYNAMIC & ~XFEATURE_MASK_LBR;
+		return XFEATURE_MASK_INDEPENDENT & ~XFEATURE_MASK_LBR;
 
-	return XFEATURE_MASK_DYNAMIC;
+	return XFEATURE_MASK_INDEPENDENT;
 }
 
 extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
@@ -104,8 +104,8 @@ void *get_xsave_addr(struct xregs_state
 int xfeature_size(int xfeature_nr);
 int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
 int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
-void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
-void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask);
+void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
+void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask);
 
 enum xstate_copy_mode {
 	XSTATE_COPY_FP,
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -151,7 +151,7 @@ void fpu__init_cpu_xstate(void)
 	 */
 	if (boot_cpu_has(X86_FEATURE_XSAVES)) {
 		wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() |
-				     xfeatures_mask_dynamic());
+				     xfeatures_mask_independent());
 	}
 }
 
@@ -551,7 +551,7 @@ static void check_xstate_against_struct(
  * how large the XSAVE buffer needs to be.  We are recalculating
  * it to be safe.
  *
- * Dynamic XSAVE features allocate their own buffers and are not
+ * Independent XSAVE features allocate their own buffers and are not
  * covered by these checks. Only the size of the buffer for task->fpu
  * is checked here.
  */
@@ -617,18 +617,18 @@ static unsigned int __init get_xsaves_si
 }
 
 /*
- * Get the total size of the enabled xstates without the dynamic supervisor
+ * Get the total size of the enabled xstates without the independent supervisor
  * features.
  */
-static unsigned int __init get_xsaves_size_no_dynamic(void)
+static unsigned int __init get_xsaves_size_no_independent(void)
 {
-	u64 mask = xfeatures_mask_dynamic();
+	u64 mask = xfeatures_mask_independent();
 	unsigned int size;
 
 	if (!mask)
 		return get_xsaves_size();
 
-	/* Disable dynamic features. */
+	/* Disable independent features. */
 	wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor());
 
 	/*
@@ -637,7 +637,7 @@ static unsigned int __init get_xsaves_si
 	 */
 	size = get_xsaves_size();
 
-	/* Re-enable dynamic features so XSAVES will work on them again. */
+	/* Re-enable independent features so XSAVES will work on them again. */
 	wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask);
 
 	return size;
@@ -680,7 +680,7 @@ static int __init init_xstate_size(void)
 	xsave_size = get_xsave_size();
 
 	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		possible_xstate_size = get_xsaves_size_no_dynamic();
+		possible_xstate_size = get_xsaves_size_no_independent();
 	else
 		possible_xstate_size = xsave_size;
 
@@ -837,7 +837,7 @@ void fpu__resume_cpu(void)
 	 */
 	if (boot_cpu_has(X86_FEATURE_XSAVES)) {
 		wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor()  |
-				     xfeatures_mask_dynamic());
+				     xfeatures_mask_independent());
 	}
 }
 
@@ -1163,34 +1163,34 @@ int copy_sigframe_from_user_to_xstate(st
 }
 
 /**
- * copy_dynamic_supervisor_to_kernel() - Save dynamic supervisor states to
- *                                       an xsave area
+ * copy_independent_supervisor_to_kernel() - Save independent supervisor states to
+ *                                           an xsave area
  * @xstate: A pointer to an xsave area
- * @mask: Represent the dynamic supervisor features saved into the xsave area
+ * @mask: Represent the independent supervisor features saved into the xsave area
  *
- * Only the dynamic supervisor states sets in the mask are saved into the xsave
- * area (See the comment in XFEATURE_MASK_DYNAMIC for the details of dynamic
- * supervisor feature). Besides the dynamic supervisor states, the legacy
+ * Only the independent supervisor states sets in the mask are saved into the xsave
+ * area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of independent
+ * supervisor feature). Besides the independent supervisor states, the legacy
  * region and XSAVE header are also saved into the xsave area. The supervisor
  * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
  * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved.
  *
  * The xsave area must be 64-bytes aligned.
  */
-void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask)
+void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask)
 {
-	u64 dynamic_mask = xfeatures_mask_dynamic() & mask;
+	u64 independent_mask = xfeatures_mask_independent() & mask;
 	u32 lmask, hmask;
 	int err;
 
 	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
 		return;
 
-	if (WARN_ON_FPU(!dynamic_mask))
+	if (WARN_ON_FPU(!independent_mask))
 		return;
 
-	lmask = dynamic_mask;
-	hmask = dynamic_mask >> 32;
+	lmask = independent_mask;
+	hmask = independent_mask >> 32;
 
 	XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
 
@@ -1199,34 +1199,34 @@ void copy_dynamic_supervisor_to_kernel(s
 }
 
 /**
- * copy_kernel_to_dynamic_supervisor() - Restore dynamic supervisor states from
- *                                       an xsave area
+ * copy_kernel_to_independent_supervisor() - Restore independent supervisor states from
+ *                                           an xsave area
  * @xstate: A pointer to an xsave area
- * @mask: Represent the dynamic supervisor features restored from the xsave area
+ * @mask: Represent the independent supervisor features restored from the xsave area
  *
- * Only the dynamic supervisor states sets in the mask are restored from the
- * xsave area (See the comment in XFEATURE_MASK_DYNAMIC for the details of
- * dynamic supervisor feature). Besides the dynamic supervisor states, the
+ * Only the independent supervisor states sets in the mask are restored from the
+ * xsave area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of
+ * independent supervisor feature). Besides the independent supervisor states, the
  * legacy region and XSAVE header are also restored from the xsave area. The
  * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
  * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored.
  *
  * The xsave area must be 64-bytes aligned.
  */
-void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask)
+void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask)
 {
-	u64 dynamic_mask = xfeatures_mask_dynamic() & mask;
+	u64 independent_mask = xfeatures_mask_independent() & mask;
 	u32 lmask, hmask;
 	int err;
 
 	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
 		return;
 
-	if (WARN_ON_FPU(!dynamic_mask))
+	if (WARN_ON_FPU(!independent_mask))
 		return;
 
-	lmask = dynamic_mask;
-	hmask = dynamic_mask >> 32;
+	lmask = independent_mask;
+	hmask = independent_mask >> 32;
 
 	XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (36 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent" Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-21 20:42   ` Liang, Kan
  2021-06-22 11:32   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 39/66] x86/pkeys: Move read_pkru() and write_pkru() Thomas Gleixner
                   ` (32 subsequent siblings)
  70 siblings, 2 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The copy functions for the independent features are horribly named and the
supervisor and independent part is just overengineered.

The point is that the supplied mask has either to be a subset of the
independent feature or a subset of the task->fpu.xstate managed features.

Rewrite it so it checks check for invalid overlaps of these areas in the
caller supplied feature mask. Rename it so it follows the new naming
convention for these operations. Mop up the function documentation.

This allows to use that function for other purposes as well.

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Kan Liang <kan.liang@linux.intel.com>
---
V3: Rename
---
 arch/x86/events/intel/lbr.c       |    6 +-
 arch/x86/include/asm/fpu/xstate.h |    5 +-
 arch/x86/kernel/fpu/xstate.c      |   93 +++++++++++++++++++-------------------
 3 files changed, 53 insertions(+), 51 deletions(-)

--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -491,7 +491,7 @@ static void intel_pmu_arch_lbr_xrstors(v
 {
 	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
 
-	copy_kernel_to_independent_supervisor(&task_ctx->xsave, XFEATURE_MASK_LBR);
+	xrstors(&task_ctx->xsave, XFEATURE_MASK_LBR);
 }
 
 static __always_inline bool lbr_is_reset_in_cstate(void *ctx)
@@ -576,7 +576,7 @@ static void intel_pmu_arch_lbr_xsaves(vo
 {
 	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
 
-	copy_independent_supervisor_to_kernel(&task_ctx->xsave, XFEATURE_MASK_LBR);
+	xsaves(&task_ctx->xsave, XFEATURE_MASK_LBR);
 }
 
 static void __intel_pmu_lbr_save(void *ctx)
@@ -992,7 +992,7 @@ static void intel_pmu_arch_lbr_read_xsav
 		intel_pmu_store_lbr(cpuc, NULL);
 		return;
 	}
-	copy_independent_supervisor_to_kernel(&xsave->xsave, XFEATURE_MASK_LBR);
+	xsaves(&xsave->xsave, XFEATURE_MASK_LBR);
 
 	intel_pmu_store_lbr(cpuc, xsave->lbr.entries);
 }
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -104,8 +104,9 @@ void *get_xsave_addr(struct xregs_state
 int xfeature_size(int xfeature_nr);
 int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
 int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
-void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
-void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask);
+
+void xsaves(struct xregs_state *xsave, u64 mask);
+void xrstors(struct xregs_state *xsave, u64 mask);
 
 enum xstate_copy_mode {
 	XSTATE_COPY_FP,
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -1163,75 +1163,76 @@ int copy_sigframe_from_user_to_xstate(st
 }
 
 /**
- * copy_independent_supervisor_to_kernel() - Save independent supervisor states to
- *                                           an xsave area
- * @xstate: A pointer to an xsave area
- * @mask: Represent the independent supervisor features saved into the xsave area
+ * xsaves - Save selected components to a kernel xstate buffer
+ * @xstate:	Pointer to the buffer
+ * @mask:	Feature mask to select the components to save
  *
- * Only the independent supervisor states sets in the mask are saved into the xsave
- * area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of independent
- * supervisor feature). Besides the independent supervisor states, the legacy
- * region and XSAVE header are also saved into the xsave area. The supervisor
- * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
- * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved.
+ * The @xstate buffer must be 64 byte aligned and correctly initialized as
+ * XSAVES does not write the full xstate header. Before first use the
+ * buffer should be zeroed otherwise a consecutive XRSTORS from that buffer
+ * can #GP.
  *
- * The xsave area must be 64-bytes aligned.
+ * The feature mask must either be a subset of the independent features or
+ * a subset of the task->fpstate related features
  */
-void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask)
+void xsaves(struct xregs_state *xstate, u64 mask)
 {
-	u64 independent_mask = xfeatures_mask_independent() & mask;
-	u32 lmask, hmask;
+	u64 xchk;
 	int err;
 
-	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
+	if (WARN_ON_FPU(!cpu_feature_enabled(X86_FEATURE_XSAVES)))
 		return;
+	/*
+	 * Validate that this is either a task->fpstate related component
+	 * subset or an independent one.
+	 */
+	if (mask & xfeatures_mask_independent())
+		xchk = ~xfeatures_mask_independent();
+	else
+		xchk = ~xfeatures_mask_all;
 
-	if (WARN_ON_FPU(!independent_mask))
+	if (WARN_ON_ONCE(!mask || mask & xchk))
 		return;
 
-	lmask = independent_mask;
-	hmask = independent_mask >> 32;
-
-	XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
-
-	/* Should never fault when copying to a kernel buffer */
-	WARN_ON_FPU(err);
+	XSTATE_OP(XSAVES, xstate, (u32)mask, (u32)(mask >> 32), err);
+	WARN_ON_ONCE(err);
 }
 
 /**
- * copy_kernel_to_independent_supervisor() - Restore independent supervisor states from
- *                                           an xsave area
- * @xstate: A pointer to an xsave area
- * @mask: Represent the independent supervisor features restored from the xsave area
+ * xrstors - Restore selected components from a kernel xstate buffer
+ * @xstate:	Pointer to the buffer
+ * @mask:	Feature mask to select the components to restore
+ *
+ * The @xstate buffer must be 64 byte aligned and correctly initialized
+ * otherwise XRSTORS from that buffer can #GP.
  *
- * Only the independent supervisor states sets in the mask are restored from the
- * xsave area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of
- * independent supervisor feature). Besides the independent supervisor states, the
- * legacy region and XSAVE header are also restored from the xsave area. The
- * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
- * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored.
+ * Proper usage is to restore the state which was saved with
+ * xsaves() into @xstate.
  *
- * The xsave area must be 64-bytes aligned.
+ * The feature mask must either be a subset of the independent features or
+ * a subset of the task->fpstate related features
  */
-void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask)
+void xrstors(struct xregs_state *xstate, u64 mask)
 {
-	u64 independent_mask = xfeatures_mask_independent() & mask;
-	u32 lmask, hmask;
+	u64 xchk;
 	int err;
 
-	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
+	if (WARN_ON_FPU(!cpu_feature_enabled(X86_FEATURE_XSAVES)))
 		return;
+	/*
+	 * Validate that this is either a task->fpstate related component
+	 * subset or an independent one.
+	 */
+	if (mask & xfeatures_mask_independent())
+		xchk = ~xfeatures_mask_independent();
+	else
+		xchk = ~xfeatures_mask_all;
 
-	if (WARN_ON_FPU(!independent_mask))
+	if (WARN_ON_ONCE(!mask || mask & xchk))
 		return;
 
-	lmask = independent_mask;
-	hmask = independent_mask >> 32;
-
-	XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
-
-	/* Should never fault when copying from a kernel buffer */
-	WARN_ON_FPU(err);
+	XSTATE_OP(XRSTORS, xstate, (u32)mask, (u32)(mask >> 32), err);
+	WARN_ON_ONCE(err);
 }
 
 #ifdef CONFIG_PROC_PID_ARCH_STATUS


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 39/66] x86/pkeys: Move read_pkru() and write_pkru()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (37 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 14:19 ` [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy() Thomas Gleixner
                   ` (31 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Dave Hansen <dave.hansen@linux.intel.com>

write_pkru() was originally used just to write to the PKRU register.  It
was mercifully short and sweet and was not out of place in pgtable.h with
some other pkey-related code.

But, later work included a requirement to also modify the task XSAVE
buffer when updating the register.  This really is more related to the
XSAVE architecture than to paging.

Move the read/write_pkru() to asm/pkru.h.  pgtable.h won't miss them.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/xstate.h |    1 
 arch/x86/include/asm/pgtable.h    |   57 -----------------------------------
 arch/x86/include/asm/pkru.h       |   61 ++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/process_64.c      |    1 
 arch/x86/kvm/svm/sev.c            |    1 
 arch/x86/kvm/x86.c                |    1 
 arch/x86/mm/pkeys.c               |    1 
 7 files changed, 67 insertions(+), 56 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -6,6 +6,7 @@
 #include <linux/types.h>
 
 #include <asm/processor.h>
+#include <asm/fpu/api.h>
 #include <asm/user.h>
 
 /* Bit 63 of XCR0 is reserved for future expansion */
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -23,7 +23,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/x86_init.h>
-#include <asm/fpu/xstate.h>
+#include <asm/pkru.h>
 #include <asm/fpu/api.h>
 #include <asm-generic/pgtable_uffd.h>
 
@@ -126,35 +126,6 @@ static inline int pte_dirty(pte_t pte)
 	return pte_flags(pte) & _PAGE_DIRTY;
 }
 
-
-static inline u32 read_pkru(void)
-{
-	if (boot_cpu_has(X86_FEATURE_OSPKE))
-		return rdpkru();
-	return 0;
-}
-
-static inline void write_pkru(u32 pkru)
-{
-	struct pkru_state *pk;
-
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
-		return;
-
-	pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
-
-	/*
-	 * The PKRU value in xstate needs to be in sync with the value that is
-	 * written to the CPU. The FPU restore on return to userland would
-	 * otherwise load the previous value again.
-	 */
-	fpregs_lock();
-	if (pk)
-		pk->pkru = pkru;
-	__write_pkru(pkru);
-	fpregs_unlock();
-}
-
 static inline int pte_young(pte_t pte)
 {
 	return pte_flags(pte) & _PAGE_ACCESSED;
@@ -1360,32 +1331,6 @@ static inline pmd_t pmd_swp_clear_uffd_w
 }
 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
 
-#define PKRU_AD_BIT 0x1
-#define PKRU_WD_BIT 0x2
-#define PKRU_BITS_PER_PKEY 2
-
-#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
-extern u32 init_pkru_value;
-#else
-#define init_pkru_value	0
-#endif
-
-static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
-{
-	int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
-	return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
-}
-
-static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
-{
-	int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
-	/*
-	 * Access-disable disables writes too so we need to check
-	 * both bits here.
-	 */
-	return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
-}
-
 static inline u16 pte_flags_pkey(unsigned long pte_flags)
 {
 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
--- /dev/null
+++ b/arch/x86/include/asm/pkru.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_PKRU_H
+#define _ASM_X86_PKRU_H
+
+#include <asm/fpu/xstate.h>
+
+#define PKRU_AD_BIT 0x1
+#define PKRU_WD_BIT 0x2
+#define PKRU_BITS_PER_PKEY 2
+
+#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
+extern u32 init_pkru_value;
+#else
+#define init_pkru_value	0
+#endif
+
+static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
+{
+	int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
+	return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
+}
+
+static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
+{
+	int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
+	/*
+	 * Access-disable disables writes too so we need to check
+	 * both bits here.
+	 */
+	return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
+}
+
+static inline u32 read_pkru(void)
+{
+	if (boot_cpu_has(X86_FEATURE_OSPKE))
+		return rdpkru();
+	return 0;
+}
+
+static inline void write_pkru(u32 pkru)
+{
+	struct pkru_state *pk;
+
+	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+		return;
+
+	pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
+
+	/*
+	 * The PKRU value in xstate needs to be in sync with the value that is
+	 * written to the CPU. The FPU restore on return to userland would
+	 * otherwise load the previous value again.
+	 */
+	fpregs_lock();
+	if (pk)
+		pk->pkru = pkru;
+	__write_pkru(pkru);
+	fpregs_unlock();
+}
+
+#endif
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -41,6 +41,7 @@
 #include <linux/syscalls.h>
 
 #include <asm/processor.h>
+#include <asm/pkru.h>
 #include <asm/fpu/internal.h>
 #include <asm/mmu_context.h>
 #include <asm/prctl.h>
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -19,6 +19,7 @@
 #include <linux/trace_events.h>
 #include <asm/fpu/internal.h>
 
+#include <asm/pkru.h>
 #include <asm/trapnr.h>
 
 #include "x86.h"
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -65,6 +65,7 @@
 #include <asm/msr.h>
 #include <asm/desc.h>
 #include <asm/mce.h>
+#include <asm/pkru.h>
 #include <linux/kernel_stat.h>
 #include <asm/fpu/internal.h> /* Ugh! */
 #include <asm/pvclock.h>
--- a/arch/x86/mm/pkeys.c
+++ b/arch/x86/mm/pkeys.c
@@ -10,6 +10,7 @@
 
 #include <asm/cpufeature.h>             /* boot_cpu_has, ...            */
 #include <asm/mmu_context.h>            /* vma_pkey()                   */
+#include <asm/pkru.h>			/* read/write_pkru()		*/
 
 int __execute_only_pkey(struct mm_struct *mm)
 {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (38 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 39/66] x86/pkeys: Move read_pkru() and write_pkru() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 13:51   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE Thomas Gleixner
                   ` (30 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Both functions are misnomed.

fpu__save() is actually about synchronizing the hardware register state
into the task's memory state so that either coredump or a math exception
handler can inspect the state at the time where the problem happens.

The function guarantees to preserve the register state, while "save" is a
common terminology for saving the current state so it can be modified and
restored later. This is clearly not the case here.

Rename it to fpu_sync_fpstate().

fpu__copy() is used to clone the current task's FPU state when duplicating
task_struct. While the register state is a copy the rest of the FPU state
is not.

Name it accordingly and remove the really pointless @src argument along
with the warning which comes along with it.

Nothing can ever copy the FPU state of a non-current task. It's clearly
just a consequence of arch_dup_task_struct(), but it makes no sense to
proliferate that further.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: New patch
---
 arch/x86/include/asm/fpu/internal.h |    6 ++++--
 arch/x86/kernel/fpu/core.c          |   15 +++++++--------
 arch/x86/kernel/fpu/regset.c        |    2 +-
 arch/x86/kernel/process.c           |    3 +--
 arch/x86/kernel/traps.c             |    5 +++--
 5 files changed, 16 insertions(+), 15 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -26,14 +26,16 @@
 /*
  * High level FPU state handling functions:
  */
-extern void fpu__save(struct fpu *fpu);
 extern int  fpu__restore_sig(void __user *buf, int ia32_frame);
 extern void fpu__drop(struct fpu *fpu);
-extern int  fpu__copy(struct task_struct *dst, struct task_struct *src);
 extern void fpu__clear_user_states(struct fpu *fpu);
 extern void fpu__clear_all(struct fpu *fpu);
 extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);
 
+extern void fpu_sync_fpstate(struct fpu *fpu);
+
+extern int  fpu_clone(struct task_struct *dst);
+
 /*
  * Boot time FPU initialization functions:
  */
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -159,11 +159,10 @@ void kernel_fpu_end(void)
 EXPORT_SYMBOL_GPL(kernel_fpu_end);
 
 /*
- * Save the FPU state (mark it for reload if necessary):
- *
- * This only ever gets called for the current task.
+ * Sync the FPU register state to current's memory register state when the
+ * current task owns the FPU. The hardware register state is preserved.
  */
-void fpu__save(struct fpu *fpu)
+void fpu_sync_fpstate(struct fpu *fpu)
 {
 	WARN_ON_FPU(fpu != &current->thread.fpu);
 
@@ -221,18 +220,18 @@ void fpstate_init(union fpregs_state *st
 }
 EXPORT_SYMBOL_GPL(fpstate_init);
 
-int fpu__copy(struct task_struct *dst, struct task_struct *src)
+/* Clone current's FPU state on fork */
+int fpu_clone(struct task_struct *dst)
 {
+	struct fpu *src_fpu = &current->thread.fpu;
 	struct fpu *dst_fpu = &dst->thread.fpu;
-	struct fpu *src_fpu = &src->thread.fpu;
 
+	/* The new task's FPU state cannot be valid in the hardware. */
 	dst_fpu->last_cpu = -1;
 
 	if (!static_cpu_has(X86_FEATURE_FPU))
 		return 0;
 
-	WARN_ON_FPU(src_fpu != &current->thread.fpu);
-
 	/*
 	 * Don't let 'init optimized' areas of the XSAVE area
 	 * leak into the child task:
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -41,7 +41,7 @@ int regset_xregset_fpregs_active(struct
 static void sync_fpstate(struct fpu *fpu)
 {
 	if (fpu == &current->thread.fpu)
-		fpu__save(fpu);
+		fpu_sync_fpstate(fpu);
 }
 
 /*
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -87,8 +87,7 @@ int arch_dup_task_struct(struct task_str
 #ifdef CONFIG_VM86
 	dst->thread.vm86 = NULL;
 #endif
-
-	return fpu__copy(dst, src);
+	return fpu_clone(dst);
 }
 
 /*
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -1046,9 +1046,10 @@ static void math_error(struct pt_regs *r
 	}
 
 	/*
-	 * Save the info for the exception handler and clear the error.
+	 * Synchronize the FPU register state to the memory register state
+	 * if necessary. This allows the exception handler to inspect it.
 	 */
-	fpu__save(fpu);
+	fpu_sync_fpstate(fpu);
 
 	task->thread.trap_nr	= trapnr;
 	task->thread.error_code = 0;


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (39 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 14:15   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 42/66] x86/pkru: Provide pkru_get_init_value() Thomas Gleixner
                   ` (29 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

X86_FEATURE_OSPKE is enabled first on the boot CPU and the feature flag is
set. Secondary CPUs have to enable CR4.PKE as well and set their per CPU
feature flag. That's ineffective because all call sites have checks for
boot_cpu_data.

Make it smarter and force the feature flag when PKU is enabled on the boot
cpu which allows then to use cpu_feature_enabled(X86_FEATURE_OSPKE) all
over the place. That either compiles the code out when PKEY support is
disabled in Kconfig or uses a static_cpu_has() for the feature check which
makes a significant difference in hotpathes, e.g. context switch.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pkeys.h |    8 ++++----
 arch/x86/include/asm/pkru.h  |    4 ++--
 arch/x86/kernel/cpu/common.c |   24 +++++++++++-------------
 arch/x86/kernel/fpu/core.c   |    2 +-
 arch/x86/kernel/fpu/xstate.c |    2 +-
 arch/x86/kernel/process_64.c |    2 +-
 arch/x86/mm/fault.c          |    2 +-
 7 files changed, 21 insertions(+), 23 deletions(-)

--- a/arch/x86/include/asm/pkeys.h
+++ b/arch/x86/include/asm/pkeys.h
@@ -9,14 +9,14 @@
  * will be necessary to ensure that the types that store key
  * numbers and masks have sufficient capacity.
  */
-#define arch_max_pkey() (boot_cpu_has(X86_FEATURE_OSPKE) ? 16 : 1)
+#define arch_max_pkey() (cpu_feature_enabled(X86_FEATURE_OSPKE) ? 16 : 1)
 
 extern int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
 		unsigned long init_val);
 
 static inline bool arch_pkeys_enabled(void)
 {
-	return boot_cpu_has(X86_FEATURE_OSPKE);
+	return cpu_feature_enabled(X86_FEATURE_OSPKE);
 }
 
 /*
@@ -26,7 +26,7 @@ static inline bool arch_pkeys_enabled(vo
 extern int __execute_only_pkey(struct mm_struct *mm);
 static inline int execute_only_pkey(struct mm_struct *mm)
 {
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return ARCH_DEFAULT_PKEY;
 
 	return __execute_only_pkey(mm);
@@ -37,7 +37,7 @@ extern int __arch_override_mprotect_pkey
 static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,
 		int prot, int pkey)
 {
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return 0;
 
 	return __arch_override_mprotect_pkey(vma, prot, pkey);
--- a/arch/x86/include/asm/pkru.h
+++ b/arch/x86/include/asm/pkru.h
@@ -32,7 +32,7 @@ static inline bool __pkru_allows_write(u
 
 static inline u32 read_pkru(void)
 {
-	if (boot_cpu_has(X86_FEATURE_OSPKE))
+	if (cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return rdpkru();
 	return 0;
 }
@@ -41,7 +41,7 @@ static inline void write_pkru(u32 pkru)
 {
 	struct pkru_state *pk;
 
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return;
 
 	pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -466,22 +466,20 @@ static bool pku_disabled;
 
 static __always_inline void setup_pku(struct cpuinfo_x86 *c)
 {
-	/* check the boot processor, plus compile options for PKU: */
-	if (!cpu_feature_enabled(X86_FEATURE_PKU))
-		return;
-	/* checks the actual processor's cpuid bits: */
-	if (!cpu_has(c, X86_FEATURE_PKU))
-		return;
-	if (pku_disabled)
+	if (c == &boot_cpu_data) {
+		if (pku_disabled || !cpu_feature_enabled(X86_FEATURE_PKU))
+			return;
+		/*
+		 * Setting CR4.PKE will cause the X86_FEATURE_OSPKE cpuid
+		 * bit to be set.  Enforce it.
+		 */
+		setup_force_cpu_cap(X86_FEATURE_OSPKE);
+
+	} else if (!cpu_feature_enabled(X86_FEATURE_OSPKE)) {
 		return;
+	}
 
 	cr4_set_bits(X86_CR4_PKE);
-	/*
-	 * Setting X86_CR4_PKE will cause the X86_FEATURE_OSPKE
-	 * cpuid bit to be set.  We need to ensure that we
-	 * update that bit in this CPU's "cpu_info".
-	 */
-	set_cpu_cap(c, X86_FEATURE_OSPKE);
 }
 
 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -311,7 +311,7 @@ static inline void load_fpregs_from_init
 	else
 		frstor(&init_fpstate.fsave);
 
-	if (boot_cpu_has(X86_FEATURE_OSPKE))
+	if (cpu_feature_enabled(X86_FEATURE_OSPKE))
 		copy_init_pkru_to_fpregs();
 }
 
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -921,7 +921,7 @@ int arch_set_user_pkey_access(struct tas
 	 * This check implies XSAVE support.  OSPKE only gets
 	 * set if we enable XSAVE and we enable PKU in XCR0.
 	 */
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return -EINVAL;
 
 	/*
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -137,7 +137,7 @@ void __show_regs(struct pt_regs *regs, e
 		       log_lvl, d3, d6, d7);
 	}
 
-	if (boot_cpu_has(X86_FEATURE_OSPKE))
+	if (cpu_feature_enabled(X86_FEATURE_OSPKE))
 		printk("%sPKRU: %08x\n", log_lvl, read_pkru());
 }
 
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -875,7 +875,7 @@ static inline bool bad_area_access_from_
 	/* This code is always called on the current mm */
 	bool foreign = false;
 
-	if (!boot_cpu_has(X86_FEATURE_OSPKE))
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return false;
 	if (error_code & X86_PF_PK)
 		return true;


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 42/66] x86/pkru: Provide pkru_get_init_value()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (40 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 14:19 ` [patch V3 43/66] x86/pkru: Provide pkru_write_default() Thomas Gleixner
                   ` (28 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

When CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is disabled then the following
code fails to compile:

     if (cpu_feature_enabled(X86_FEATURE_OSPKE)) {
     	u32 pkru = READ_ONCE(init_pkru_value);
	..
     }

because init_pkru_value is defined as '0' which makes READ_ONCE() upset.

Provide an accessor macro to avoid #ifdeffery all over the place.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pkru.h |    2 ++
 1 file changed, 2 insertions(+)

--- a/arch/x86/include/asm/pkru.h
+++ b/arch/x86/include/asm/pkru.h
@@ -10,8 +10,10 @@
 
 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
 extern u32 init_pkru_value;
+#define pkru_get_init_value()	READ_ONCE(init_pkru_value)
 #else
 #define init_pkru_value	0
+#define pkru_get_init_value()	0
 #endif
 
 static inline bool __pkru_allows_read(u32 pkru, u16 pkey)


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 43/66] x86/pkru: Provide pkru_write_default()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (41 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 42/66] x86/pkru: Provide pkru_get_init_value() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 14:30   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 44/66] x86/cpu: Write the default PKRU value when enabling PKE Thomas Gleixner
                   ` (27 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Provide a simple and trivial helper which just writes the PKRU default
value without trying to fiddle with the tasks xsave buffer.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pkru.h |    8 ++++++++
 1 file changed, 8 insertions(+)

--- a/arch/x86/include/asm/pkru.h
+++ b/arch/x86/include/asm/pkru.h
@@ -60,4 +60,12 @@ static inline void write_pkru(u32 pkru)
 	fpregs_unlock();
 }
 
+static inline void pkru_write_default(void)
+{
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
+		return;
+
+	wrpkru(pkru_get_init_value());
+}
+
 #endif


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 44/66] x86/cpu: Write the default PKRU value when enabling PKE
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (42 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 43/66] x86/pkru: Provide pkru_write_default() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 14:19 ` [patch V3 45/66] x86/fpu: Use pkru_write_default() in copy_init_fpstate_to_fpregs() Thomas Gleixner
                   ` (26 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

In preparation of making the PKRU management more independent from XSTATES,
write the default PKRU value into the hardware right after enabling PKRU in
CR4. This ensures that switch_to() and copy_thread() have the correct
setting for init task and the per CPU idle threads right away.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/cpu/common.c |    2 ++
 1 file changed, 2 insertions(+)

--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -480,6 +480,8 @@ static __always_inline void setup_pku(st
 	}
 
 	cr4_set_bits(X86_CR4_PKE);
+	/* Load the default PKRU value */
+	pkru_write_default();
 }
 
 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 45/66] x86/fpu: Use pkru_write_default() in copy_init_fpstate_to_fpregs()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (43 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 44/66] x86/cpu: Write the default PKRU value when enabling PKE Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 14:19 ` [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread() Thomas Gleixner
                   ` (25 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

There is no point in using copy_init_pkru_to_fpregs() which in turn calls
write_pkru(). write_pkru() tries to fiddle with the task's xstate buffer
for nothing because the XRSTOR[S](init_fpstate) just cleared the xfeature
flag in the xstate header which makes get_xsave_addr() fail.

It's a useless exercise anyway because the reinitialization activates the
FPU so before the task's xstate buffer can be used again a XRSTOR[S] must
happen which in turn dumps the PKRU value.

Get rid of the now unused copy_init_pkru_to_fpregs().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pkeys.h |    1 -
 arch/x86/kernel/fpu/core.c   |    3 +--
 arch/x86/mm/pkeys.c          |   17 -----------------
 include/linux/pkeys.h        |    4 ----
 4 files changed, 1 insertion(+), 24 deletions(-)

--- a/arch/x86/include/asm/pkeys.h
+++ b/arch/x86/include/asm/pkeys.h
@@ -124,7 +124,6 @@ extern int arch_set_user_pkey_access(str
 		unsigned long init_val);
 extern int __arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
 		unsigned long init_val);
-extern void copy_init_pkru_to_fpregs(void);
 
 static inline int vma_pkey(struct vm_area_struct *vma)
 {
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -377,8 +377,7 @@ static inline void load_fpregs_from_init
 	else
 		frstor(&init_fpstate.fsave);
 
-	if (cpu_feature_enabled(X86_FEATURE_OSPKE))
-		copy_init_pkru_to_fpregs();
+	pkru_write_default();
 }
 
 /*
--- a/arch/x86/mm/pkeys.c
+++ b/arch/x86/mm/pkeys.c
@@ -10,7 +10,6 @@
 
 #include <asm/cpufeature.h>             /* boot_cpu_has, ...            */
 #include <asm/mmu_context.h>            /* vma_pkey()                   */
-#include <asm/pkru.h>			/* read/write_pkru()		*/
 
 int __execute_only_pkey(struct mm_struct *mm)
 {
@@ -125,22 +124,6 @@ u32 init_pkru_value = PKRU_AD_KEY( 1) |
 		      PKRU_AD_KEY(10) | PKRU_AD_KEY(11) | PKRU_AD_KEY(12) |
 		      PKRU_AD_KEY(13) | PKRU_AD_KEY(14) | PKRU_AD_KEY(15);
 
-/*
- * Called from the FPU code when creating a fresh set of FPU
- * registers.  This is called from a very specific context where
- * we know the FPU registers are safe for use and we can use PKRU
- * directly.
- */
-void copy_init_pkru_to_fpregs(void)
-{
-	u32 init_pkru_value_snapshot = READ_ONCE(init_pkru_value);
-	/*
-	 * Override the PKRU state that came from 'init_fpstate'
-	 * with the baseline from the process.
-	 */
-	write_pkru(init_pkru_value_snapshot);
-}
-
 static ssize_t init_pkru_read_file(struct file *file, char __user *user_buf,
 			     size_t count, loff_t *ppos)
 {
--- a/include/linux/pkeys.h
+++ b/include/linux/pkeys.h
@@ -44,10 +44,6 @@ static inline bool arch_pkeys_enabled(vo
 	return false;
 }
 
-static inline void copy_init_pkru_to_fpregs(void)
-{
-}
-
 #endif /* ! CONFIG_ARCH_HAS_PKEYS */
 
 #endif /* _LINUX_PKEYS_H */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (44 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 45/66] x86/fpu: Use pkru_write_default() in copy_init_fpstate_to_fpregs() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 14:40   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants Thomas Gleixner
                   ` (24 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Make it clear what the function is about.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    3 ++-
 arch/x86/kernel/fpu/core.c          |    4 ++--
 arch/x86/kernel/process.c           |    2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -29,12 +29,13 @@
 extern int  fpu__restore_sig(void __user *buf, int ia32_frame);
 extern void fpu__drop(struct fpu *fpu);
 extern void fpu__clear_user_states(struct fpu *fpu);
-extern void fpu__clear_all(struct fpu *fpu);
 extern int  fpu__exception_code(struct fpu *fpu, int trap_nr);
 
 extern void fpu_sync_fpstate(struct fpu *fpu);
 
+/* Clone and exit operations */
 extern int  fpu_clone(struct task_struct *dst);
+extern void fpu_flush_thread(void);
 
 /*
  * Boot time FPU initialization functions:
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -350,9 +350,9 @@ void fpu__clear_user_states(struct fpu *
 	fpu__clear(fpu, true);
 }
 
-void fpu__clear_all(struct fpu *fpu)
+void fpu_flush_thread(void)
 {
-	fpu__clear(fpu, false);
+	fpu__clear(&current->thread.fpu, false);
 }
 
 /*
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -205,7 +205,7 @@ void flush_thread(void)
 	flush_ptrace_hw_breakpoint(tsk);
 	memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 
-	fpu__clear_all(&tsk->thread.fpu);
+	fpu_flush_thread();
 }
 
 void disable_TSC(void)


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (45 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 15:38   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs() Thomas Gleixner
                   ` (23 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Andy Lutomirski <luto@kernel.org>

fpu__clear() currently resets both register state and kernel XSAVE buffer
state.  It has two modes: one for all state (supervisor and user) and
another for user state only.  fpu__clear_all() uses the "all state"
(user_only=0) mode, while a number of signal paths use the user_only=1
mode.

Make fpu__clear() work only for user state (user_only=1) and remove the
"all state" (user_only=0) code.  Rename it to match so it can be used by
the signal paths.

Replace the "all state" (user_only=0) fpu__clear() functionality.  Use the
TIF_NEED_FPU_LOAD functionality instead of making any actual hardware
registers changes in this path.

Instead of invoking fpu__initialize() just memcpy() init_fpstate into the
tasks FPU state because that has already the correct format and in case of
PKRU also contains the default PKRU value. Move the actual PKRU write out
into flush_thread() where it belongs and where it will end up anyway when
PKRU and XSTATE have been distangled.

For bisectability a workaround is required which stores the PKRU value in
the xstate memory until PKRU is distangled from XSTATE for context
switching and return to user.

[ Dave Hansen: Polished changelog ]
[ tglx: Fixed the PKRU fallout ]

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/core.c |  111 ++++++++++++++++++++++++++++++---------------
 arch/x86/kernel/process.c  |   10 ++++
 2 files changed, 85 insertions(+), 36 deletions(-)

--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -260,19 +260,6 @@ int fpu_clone(struct task_struct *dst)
 }
 
 /*
- * Activate the current task's in-memory FPU context,
- * if it has not been used before:
- */
-static void fpu__initialize(struct fpu *fpu)
-{
-	WARN_ON_FPU(fpu != &current->thread.fpu);
-
-	set_thread_flag(TIF_NEED_FPU_LOAD);
-	fpstate_init(&fpu->state);
-	trace_x86_fpu_init_state(fpu);
-}
-
-/*
  * Drops current FPU state: deactivates the fpregs and
  * the fpstate. NOTE: it still leaves previous contents
  * in the fpregs in the eager-FPU case.
@@ -314,47 +301,99 @@ static inline void load_fpregs_from_init
 	pkru_write_default();
 }
 
+static inline unsigned int init_fpstate_copy_size(void)
+{
+	if (!use_xsave())
+		return fpu_kernel_xstate_size;
+
+	/* XSAVE(S) just needs the legacy and the xstate header part */
+	return sizeof(init_fpstate.xsave);
+}
+
+/* Temporary workaround. Will be removed once PKRU and XSTATE are distangled. */
+static inline void pkru_set_default_in_xstate(struct xregs_state *xsave)
+{
+	struct pkru_state *pk;
+
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
+		return;
+	/*
+	 * Force XFEATURE_PKRU to be set in the header otherwise
+	 * get_xsave_addr() does not work and it also needs to be set to
+	 * make XRSTOR(S) load it.
+	 */
+	xsave->header.xfeatures |= XFEATURE_MASK_PKRU;
+	pk = get_xsave_addr(xsave, XFEATURE_PKRU);
+	pk->pkru = pkru_get_init_value();
+}
+
 /*
- * Clear the FPU state back to init state.
- *
- * Called by sys_execve(), by the signal handler code and by various
- * error paths.
+ * Reset current->fpu memory state to the init values.
  */
-static void fpu__clear(struct fpu *fpu, bool user_only)
+static void fpu_reset_fpstate(void)
+{
+	struct fpu *fpu= &current->thread.fpu;
+
+	fpregs_lock();
+	fpu__drop(fpu);
+	/*
+	 * This does not change the actual hardware registers. It just
+	 * resets the memory image and sets TIF_NEED_FPU_LOAD so a
+	 * subsequent return to usermode will reload the registers from the
+	 * tasks memory image.
+	 *
+	 * Do not use fpstate_init() here. Just copy init_fpstate which has
+	 * the correct content already except for PKRU.
+	 */
+	memcpy(&fpu->state, &init_fpstate, init_fpstate_copy_size());
+	pkru_set_default_in_xstate(&fpu->state.xsave);
+	set_thread_flag(TIF_NEED_FPU_LOAD);
+	fpregs_unlock();
+}
+
+/*
+ * Reset current's user FPU states to the init states.  current's
+ * supervisor states, if any, are not modified by this function.  The
+ * caller guarantees that the XSTATE header in memory is intact.
+ */
+void fpu__clear_user_states(struct fpu *fpu)
 {
 	WARN_ON_FPU(fpu != &current->thread.fpu);
 
+	fpregs_lock();
 	if (!static_cpu_has(X86_FEATURE_FPU)) {
-		fpu__drop(fpu);
-		fpu__initialize(fpu);
+		fpu_reset_fpstate();
+		fpregs_unlock();
 		return;
 	}
 
-	fpregs_lock();
-
-	if (user_only) {
-		if (!fpregs_state_valid(fpu, smp_processor_id()) &&
-		    xfeatures_mask_supervisor())
-			os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
-		load_fpregs_from_init_fpstate(xfeatures_mask_user());
-	} else {
-		load_fpregs_from_init_fpstate(xfeatures_mask_all);
+	/*
+	 * Ensure that current's supervisor states are loaded into their
+	 * corresponding registers.
+	 */
+	if (xfeatures_mask_supervisor() &&
+	    !fpregs_state_valid(fpu, smp_processor_id())) {
+		os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
 	}
 
+	/* Reset user states in registers. */
+	load_fpregs_from_init_fpstate(xfeatures_mask_user());
+
+	/*
+	 * Now all FPU registers have their desired values.  Inform the FPU
+	 * state machine that current's FPU registers are in the hardware
+	 * registers. The memory image does not need to be updated because
+	 * any operation relying on it has to save the registers first when
+	 * currents FPU is marked active.
+	 */
 	fpregs_mark_activate();
 	fpregs_unlock();
 }
 
-void fpu__clear_user_states(struct fpu *fpu)
-{
-	fpu__clear(fpu, true);
-}
-
 void fpu_flush_thread(void)
 {
-	fpu__clear(&current->thread.fpu, false);
+	fpu_reset_fpstate();
 }
-
 /*
  * Load FPU context before returning to userspace.
  */
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -198,6 +198,15 @@ int copy_thread(unsigned long clone_flag
 	return ret;
 }
 
+static void pkru_flush_thread(void)
+{
+	/*
+	 * If PKRU is enabled the default PKRU value has to be loaded into
+	 * the hardware right here (similar to context switch).
+	 */
+	pkru_write_default();
+}
+
 void flush_thread(void)
 {
 	struct task_struct *tsk = current;
@@ -206,6 +215,7 @@ void flush_thread(void)
 	memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 
 	fpu_flush_thread();
+	pkru_flush_thread();
 }
 
 void disable_TSC(void)


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (46 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 15:40   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs() Thomas Gleixner
                   ` (22 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Rename it so that it becomes entirely clear what this function is
about. It's purpose is to restore the FPU registers to the state which was
saved in the task's FPU memory state either at context switch or by an in
kernel FPU user.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    6 ++----
 arch/x86/kernel/fpu/core.c          |    2 +-
 arch/x86/kernel/fpu/signal.c        |    2 +-
 3 files changed, 4 insertions(+), 6 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -468,10 +468,8 @@ static inline void fpregs_activate(struc
 	trace_x86_fpu_regs_activated(fpu);
 }
 
-/*
- * Internal helper, do not use directly. Use switch_fpu_return() instead.
- */
-static inline void __fpregs_load_activate(void)
+/* Internal helper for switch_fpu_return() and signal frame setup */
+static inline void fpregs_restore_userregs(void)
 {
 	struct fpu *fpu = &current->thread.fpu;
 	int cpu = smp_processor_id();
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -402,7 +402,7 @@ void switch_fpu_return(void)
 	if (!static_cpu_has(X86_FEATURE_FPU))
 		return;
 
-	__fpregs_load_activate();
+	fpregs_restore_userregs();
 }
 EXPORT_SYMBOL_GPL(switch_fpu_return);
 
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -188,7 +188,7 @@ int copy_fpstate_to_sigframe(void __user
 	 */
 	fpregs_lock();
 	if (test_thread_flag(TIF_NEED_FPU_LOAD))
-		__fpregs_load_activate();
+		fpregs_restore_userregs();
 
 	pagefault_disable();
 	ret = copy_fpregs_to_sigframe(buf_fx);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (47 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 15:58   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi() Thomas Gleixner
                   ` (21 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

copy_kernel_to_fpregs() restores all xfeatures but it is also the place
where the AMD FXSAVE_LEAK bug is handled.

That prevents fpregs_restore_userregs() to limit the restored features,
which is required to distangle PKRU and XSTATE handling and also for the
upcoming supervisor state management.

Move the FXSAVE_LEAK quirk into __copy_kernel_to_fpregs() and deinline that
function which has become rather fat.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |   25 +------------------------
 arch/x86/kernel/fpu/core.c          |   27 +++++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 24 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -380,33 +380,10 @@ static inline int os_xrstor_safe(struct
 
 extern void save_fpregs_to_fpstate(struct fpu *fpu);
 
-static inline void __restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask)
-{
-	if (use_xsave()) {
-		os_xrstor(&fpstate->xsave, mask);
-	} else {
-		if (use_fxsr())
-			fxrstor(&fpstate->fxsave);
-		else
-			frstor(&fpstate->fsave);
-	}
-}
+extern void __restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask);
 
 static inline void restore_fpregs_from_fpstate(union fpregs_state *fpstate)
 {
-	/*
-	 * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is
-	 * pending. Clear the x87 state here by setting it to fixed values.
-	 * "m" is a random variable that should be in L1.
-	 */
-	if (unlikely(static_cpu_has_bug(X86_BUG_FXSAVE_LEAK))) {
-		asm volatile(
-			"fnclex\n\t"
-			"emms\n\t"
-			"fildl %P[addr]"	/* set F?P to defined value */
-			: : [addr] "m" (fpstate));
-	}
-
 	__restore_fpregs_from_fpstate(fpstate, -1);
 }
 
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -124,6 +124,33 @@ void save_fpregs_to_fpstate(struct fpu *
 }
 EXPORT_SYMBOL(save_fpregs_to_fpstate);
 
+void __restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask)
+{
+	/*
+	 * AMD K7/K8 and later CPUs up to Zen don't save/restore
+	 * FDP/FIP/FOP unless an exception is pending. Clear the x87 state
+	 * here by setting it to fixed values.  "m" is a random variable
+	 * that should be in L1.
+	 */
+	if (unlikely(static_cpu_has_bug(X86_BUG_FXSAVE_LEAK))) {
+		asm volatile(
+			"fnclex\n\t"
+			"emms\n\t"
+			"fildl %P[addr]"	/* set F?P to defined value */
+			: : [addr] "m" (fpstate));
+	}
+
+	if (use_xsave()) {
+		os_xrstor(&fpstate->xsave, mask);
+	} else {
+		if (use_fxsr())
+			fxrstor(&fpstate->fxsave);
+		else
+			frstor(&fpstate->fsave);
+	}
+}
+EXPORT_SYMBOL_GPL(__restore_fpregs_from_fpstate);
+
 void kernel_fpu_begin_mask(unsigned int kfpu_mask)
 {
 	preempt_disable();


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (48 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 16:02   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace() Thomas Gleixner
                   ` (20 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Rename it so it's clear that this is about user ABI features which can
differ from the feature set which the kernel saves and restores because the
kernel handles e.g. PKRU differently. But the user ABI (ptrace, signal
frame) expects it to be there.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    7 ++++++-
 arch/x86/include/asm/fpu/xstate.h   |    6 +++++-
 arch/x86/kernel/fpu/core.c          |    2 +-
 arch/x86/kernel/fpu/signal.c        |   10 +++++-----
 arch/x86/kernel/fpu/xstate.c        |   18 +++++++++---------
 5 files changed, 26 insertions(+), 17 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -323,7 +323,12 @@ static inline void os_xrstor(struct xreg
  */
 static inline int xsave_to_user_sigframe(struct xregs_state __user *buf)
 {
-	u64 mask = xfeatures_mask_user();
+	/*
+	 * Include the features which are not xsaved/rstored by the kernel
+	 * internally, e.g. PKRU. That's user space ABI and also required
+	 * to allow the signal handler to modify PKRU.
+	 */
+	u64 mask = xfeatures_mask_uabi();
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
 	int err;
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -83,7 +83,11 @@ static inline u64 xfeatures_mask_supervi
 	return xfeatures_mask_all & XFEATURE_MASK_SUPERVISOR_SUPPORTED;
 }
 
-static inline u64 xfeatures_mask_user(void)
+/*
+ * The xfeatures which are enabled in XCR0 and expected to be in ptrace
+ * buffers and signal frames.
+ */
+static inline u64 xfeatures_mask_uabi(void)
 {
 	return xfeatures_mask_all & XFEATURE_MASK_USER_SUPPORTED;
 }
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -404,7 +404,7 @@ void fpu__clear_user_states(struct fpu *
 	}
 
 	/* Reset user states in registers. */
-	load_fpregs_from_init_fpstate(xfeatures_mask_user());
+	load_fpregs_from_init_fpstate(xfeatures_mask_uabi());
 
 	/*
 	 * Now all FPU registers have their desired values.  Inform the FPU
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -257,14 +257,14 @@ static int copy_user_to_fpregs_zeroing(v
 
 	if (use_xsave()) {
 		if (fx_only) {
-			init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE;
+			init_bv = xfeatures_mask_uabi() & ~XFEATURE_MASK_FPSSE;
 
 			r = fxrstor_from_user_sigframe(buf);
 			if (!r)
 				os_xrstor(&init_fpstate.xsave, init_bv);
 			return r;
 		} else {
-			init_bv = xfeatures_mask_user() & ~xbv;
+			init_bv = xfeatures_mask_uabi() & ~xbv;
 
 			r = xrstor_from_user_sigframe(buf, xbv);
 			if (!r && unlikely(init_bv))
@@ -420,7 +420,7 @@ static int __fpu__restore_sig(void __use
 	fpregs_unlock();
 
 	if (use_xsave() && !fx_only) {
-		u64 init_bv = xfeatures_mask_user() & ~user_xfeatures;
+		u64 init_bv = xfeatures_mask_uabi() & ~user_xfeatures;
 
 		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx);
 		if (ret)
@@ -454,7 +454,7 @@ static int __fpu__restore_sig(void __use
 		if (use_xsave()) {
 			u64 init_bv;
 
-			init_bv = xfeatures_mask_user() & ~XFEATURE_MASK_FPSSE;
+			init_bv = xfeatures_mask_uabi() & ~XFEATURE_MASK_FPSSE;
 			os_xrstor(&init_fpstate.xsave, init_bv);
 		}
 
@@ -549,7 +549,7 @@ void fpu__init_prepare_fx_sw_frame(void)
 
 	fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
 	fx_sw_reserved.extended_size = size;
-	fx_sw_reserved.xfeatures = xfeatures_mask_user();
+	fx_sw_reserved.xfeatures = xfeatures_mask_uabi();
 	fx_sw_reserved.xstate_size = fpu_user_xstate_size;
 
 	if (IS_ENABLED(CONFIG_IA32_EMULATION) ||
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -144,7 +144,7 @@ void fpu__init_cpu_xstate(void)
 	 * managed by XSAVE{C, OPT, S} and XRSTOR{S}.  Only XSAVE user
 	 * states can be set here.
 	 */
-	xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user());
+	xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_uabi());
 
 	/*
 	 * MSR_IA32_XSS sets supervisor states managed by XSAVES.
@@ -453,7 +453,7 @@ int xfeature_size(int xfeature_nr)
 static int validate_user_xstate_header(const struct xstate_header *hdr)
 {
 	/* No unknown or supervisor features may be set */
-	if (hdr->xfeatures & ~xfeatures_mask_user())
+	if (hdr->xfeatures & ~xfeatures_mask_uabi())
 		return -EINVAL;
 
 	/* Userspace must use the uncompacted format */
@@ -756,7 +756,7 @@ void __init fpu__init_system_xstate(void
 	cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
 	xfeatures_mask_all |= ecx + ((u64)edx << 32);
 
-	if ((xfeatures_mask_user() & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
+	if ((xfeatures_mask_uabi() & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
 		/*
 		 * This indicates that something really unexpected happened
 		 * with the enumeration.  Disable XSAVE and try to continue
@@ -791,7 +791,7 @@ void __init fpu__init_system_xstate(void
 	 * Update info used for ptrace frames; use standard-format size and no
 	 * supervisor xstates:
 	 */
-	update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask_user());
+	update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask_uabi());
 
 	fpu__init_prepare_fx_sw_frame();
 	setup_init_fpu_buf();
@@ -828,14 +828,14 @@ void fpu__resume_cpu(void)
 	/*
 	 * Restore XCR0 on xsave capable CPUs:
 	 */
-	if (boot_cpu_has(X86_FEATURE_XSAVE))
-		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user());
+	if (cpu_feature_enabled(X86_FEATURE_XSAVE))
+		xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_uabi());
 
 	/*
 	 * Restore IA32_XSS. The same CPUID bit enumerates support
 	 * of XSAVES and MSR_IA32_XSS.
 	 */
-	if (boot_cpu_has(X86_FEATURE_XSAVES)) {
+	if (cpu_feature_enabled(X86_FEATURE_XSAVES)) {
 		wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor()  |
 				     xfeatures_mask_independent());
 	}
@@ -993,7 +993,7 @@ void copy_xstate_to_uabi_buf(struct memb
 		break;
 
 	case XSTATE_COPY_XSAVE:
-		header.xfeatures &= xfeatures_mask_user();
+		header.xfeatures &= xfeatures_mask_uabi();
 		break;
 	}
 
@@ -1038,7 +1038,7 @@ void copy_xstate_to_uabi_buf(struct memb
 		 * compacted init_fpstate. The gap tracking will zero this
 		 * later.
 		 */
-		if (!(xfeatures_mask_user() & BIT_ULL(i)))
+		if (!(xfeatures_mask_uabi() & BIT_ULL(i)))
 			continue;
 
 		/*


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (49 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 16:08   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer Thomas Gleixner
                   ` (19 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

switch_to(), flush_thread() write the task's PKRU value eagerly so the PKRU
value of current is always valid in the hardware.

That means there is no point in restoring PKRU on exit to user or when
reactivating the task's FPU registers in the signal frame setup path.

This allows to remove all the xstate buffer updates with PKRU values once
the PKRU state is stored in thread struct while a task is scheduled out.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Restore supervisor state too. (Yu-Cheng)
---
 arch/x86/include/asm/fpu/internal.h |   16 +++++++++++++++-
 arch/x86/include/asm/fpu/xstate.h   |   19 +++++++++++++++++++
 arch/x86/kernel/fpu/core.c          |    2 +-
 3 files changed, 35 insertions(+), 2 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -458,7 +458,21 @@ static inline void fpregs_restore_userre
 		return;
 
 	if (!fpregs_state_valid(fpu, cpu)) {
-		restore_fpregs_from_fpstate(&fpu->state);
+		u64 mask;
+
+		/*
+		 * This restores _all_ xstate which has not been
+		 * established yet.
+		 *
+		 * If PKRU is enabled, then the PKRU value is already
+		 * correct because it was either set in switch_to() or in
+		 * flush_thread(). So it is excluded because it might be
+		 * not up to date in current->thread.fpu.xsave state.
+		 */
+		mask = xfeatures_mask_restore_user() |
+			xfeatures_mask_supervisor();
+		__restore_fpregs_from_fpstate(&fpu->state, mask);
+
 		fpregs_activate(fpu);
 		fpu->last_cpu = cpu;
 	}
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -35,6 +35,14 @@
 				      XFEATURE_MASK_BNDREGS | \
 				      XFEATURE_MASK_BNDCSR)
 
+/*
+ * Features which are restored when returning to user space.
+ * PKRU is not restored on return to user space because PKRU
+ * is switched eagerly in switch_to() and flush_thread()
+ */
+#define XFEATURE_MASK_USER_RESTORE	\
+	(XFEATURE_MASK_USER_SUPPORTED & ~XFEATURE_MASK_PKRU)
+
 /* All currently supported supervisor features */
 #define XFEATURE_MASK_SUPERVISOR_SUPPORTED (XFEATURE_MASK_PASID)
 
@@ -92,6 +100,17 @@ static inline u64 xfeatures_mask_uabi(vo
 	return xfeatures_mask_all & XFEATURE_MASK_USER_SUPPORTED;
 }
 
+/*
+ * The xfeatures which are restored by the kernel when returning to user
+ * mode. This is not necessarily the same as xfeatures_mask_uabi() as the
+ * kernel does not manage all XCR0 enabled features via xsave/xrstor as
+ * some of them have to be switched eagerly on context switch and exec().
+ */
+static inline u64 xfeatures_mask_restore_user(void)
+{
+	return xfeatures_mask_all & XFEATURE_MASK_USER_RESTORE;
+}
+
 static inline u64 xfeatures_mask_independent(void)
 {
 	if (!boot_cpu_has(X86_FEATURE_ARCH_LBR))
--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -404,7 +404,7 @@ void fpu__clear_user_states(struct fpu *
 	}
 
 	/* Reset user states in registers. */
-	load_fpregs_from_init_fpstate(xfeatures_mask_uabi());
+	load_fpregs_from_init_fpstate(xfeatures_mask_restore_user());
 
 	/*
 	 * Now all FPU registers have their desired values.  Inform the FPU


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (50 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 16:55   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace() Thomas Gleixner
                   ` (18 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Dave Hansen <dave.hansen@linux.intel.com>

PKRU is currently partly XSAVE-managed and partly not.  It has space in the
task XSAVE buffer and is context-switched by XSAVE/XRSTOR.  However, it is
switched more eagerly than FPU because there may be a need for PKRU to be
up-to-date for things like copy_to/from_user() since PKRU affects
user-permission memory accesses, not just accesses from userspace itself.

This leaves PKRU in a very odd position.  XSAVE brings very little value to
the table for how Linux uses PKRU except for signal related XSTATE
handling.

Prepare to move PKRU away from being XSAVE-managed.  Allocate space in the
thread_struct for it and save/restore it in the context-switch path
separately from the XSAVE-managed features. task->thread_struct.pkru is
only valid when the task is scheduled out. For the current task the
authoritative source is the hardware, i.e. it has to be retrieved via
rdpkru().

Leave the XSAVE code in place for now to ensure bisectability.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V3: Fix the fallout on !PKRU enabled systems in copy_thread() - Intel testing via Dave
---
 arch/x86/include/asm/processor.h |    9 +++++++++
 arch/x86/kernel/process.c        |    7 +++++++
 arch/x86/kernel/process_64.c     |   25 +++++++++++++++++++++++++
 3 files changed, 41 insertions(+)

--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -518,6 +518,15 @@ struct thread_struct {
 
 	unsigned int		sig_on_uaccess_err:1;
 
+	/*
+	 * Protection Keys Register for Userspace.  Loaded immediately on
+	 * context switch. Store it in thread_struct to avoid a lookup in
+	 * the tasks's FPU xstate buffer. This value is only valid when a
+	 * task is scheduled out. For 'current' the authoritative source of
+	 * PKRU is the hardware itself.
+	 */
+	u32			pkru;
+
 	/* Floating point and extended processor state */
 	struct fpu		fpu;
 	/*
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -156,11 +156,18 @@ int copy_thread(unsigned long clone_flag
 
 	/* Kernel thread ? */
 	if (unlikely(p->flags & PF_KTHREAD)) {
+		p->thread.pkru = pkru_get_init_value();
 		memset(childregs, 0, sizeof(struct pt_regs));
 		kthread_frame_init(frame, sp, arg);
 		return 0;
 	}
 
+	/*
+	 * Clone current's PKRU value from hardware. tsk->thread.pkru
+	 * is only valid when scheduled out.
+	 */
+	p->thread.pkru = read_pkru();
+
 	frame->bx = 0;
 	*childregs = *current_pt_regs();
 	childregs->ax = 0;
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -340,6 +340,29 @@ static __always_inline void load_seg_leg
 	}
 }
 
+/*
+ * Store prev's PKRU value and load next's PKRU value if they differ. PKRU
+ * is not XSTATE managed on context switch because that would require a
+ * lookup in the task's FPU xsave buffer and require to keep that updated
+ * in various places.
+ */
+static __always_inline void x86_pkru_load(struct thread_struct *prev,
+					  struct thread_struct *next)
+{
+	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
+		return;
+
+	/* Stash the prev task's value: */
+	prev->pkru = rdpkru();
+
+	/*
+	 * PKRU writes are slightly expensive.  Avoid them when not
+	 * strictly necessary:
+	 */
+	if (prev->pkru != next->pkru)
+		wrpkru(next->pkru);
+}
+
 static __always_inline void x86_fsgsbase_load(struct thread_struct *prev,
 					      struct thread_struct *next)
 {
@@ -589,6 +612,8 @@ void compat_start_thread(struct pt_regs
 
 	x86_fsgsbase_load(prev, next);
 
+	x86_pkru_load(prev, next);
+
 	/*
 	 * Switch the PDA and FPU contexts.
 	 */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (51 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:01   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations Thomas Gleixner
                   ` (17 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

From: Dave Hansen <dave.hansen@linux.intel.com>

One nice thing about having PKRU be XSAVE-managed is that it gets naturally
exposed into the XSAVE-using ABIs.  Now that XSAVE will not be used to
manage PKRU, these ABIs need to be manually enabled to deal with PKRU.

ptrace() uses copy_uabi_xstate_to_kernel() to collect the tracee's
XSTATE. As PKRU is not in the task's XSTATE buffer, use task->thread.pkru
for filling in up the ptrace buffer.

Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/xstate.h |    2 +-
 arch/x86/kernel/fpu/regset.c      |   10 ++++------
 arch/x86/kernel/fpu/xstate.c      |   25 ++++++++++++++++++-------
 3 files changed, 23 insertions(+), 14 deletions(-)

--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -139,7 +139,7 @@ enum xstate_copy_mode {
 };
 
 struct membuf;
-void copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave,
+void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk,
 			     enum xstate_copy_mode mode);
 
 #endif
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -78,7 +78,7 @@ int xfpregs_get(struct task_struct *targ
 				    sizeof(fpu->state.fxsave));
 	}
 
-	copy_xstate_to_uabi_buf(to, &fpu->state.xsave, XSTATE_COPY_FX);
+	copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_FX);
 	return 0;
 }
 
@@ -127,14 +127,12 @@ int xfpregs_set(struct task_struct *targ
 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 		struct membuf to)
 {
-	struct fpu *fpu = &target->thread.fpu;
-
 	if (!cpu_feature_enabled(X86_FEATURE_XSAVE))
 		return -ENODEV;
 
-	sync_fpstate(fpu);
+	sync_fpstate(&target->thread.fpu);
 
-	copy_xstate_to_uabi_buf(to, &fpu->state.xsave, XSTATE_COPY_XSAVE);
+	copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_XSAVE);
 	return 0;
 }
 
@@ -337,7 +335,7 @@ int fpregs_get(struct task_struct *targe
 		struct membuf mb = { .p = &fxsave, .left = sizeof(fxsave) };
 
 		/* Handle init state optimized xstate correctly */
-		copy_xstate_to_uabi_buf(mb, &fpu->state.xsave, XSTATE_COPY_FP);
+		copy_xstate_to_uabi_buf(mb, target, XSTATE_COPY_FP);
 		fx = &fxsave;
 	} else {
 		fx = &fpu->state.fxsave;
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -962,7 +962,7 @@ static void copy_feature(bool from_xstat
 /**
  * copy_xstate_to_uabi_buf - Copy kernel saved xstate to a UABI buffer
  * @to:		membuf descriptor
- * @xsave:	The kernel xstate buffer to copy from
+ * @tsk:	The task from which to copy the saved xstate
  * @copy_mode:	The requested copy mode
  *
  * Converts from kernel XSAVE or XSAVES compacted format to UABI conforming
@@ -971,10 +971,11 @@ static void copy_feature(bool from_xstat
  *
  * It supports partial copy but @to.pos always starts from zero.
  */
-void copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave,
+void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk,
 			     enum xstate_copy_mode copy_mode)
 {
 	const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr);
+	struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
 	struct xregs_state *xinit = &init_fpstate.xsave;
 	struct xstate_header header;
 	unsigned int zerofrom;
@@ -1048,11 +1049,21 @@ void copy_xstate_to_uabi_buf(struct memb
 		if (zerofrom < xstate_offsets[i])
 			membuf_zero(&to, xstate_offsets[i] - zerofrom);
 
-		copy_feature(header.xfeatures & BIT_ULL(i), &to,
-			     __raw_xsave_addr(xsave, i),
-			     __raw_xsave_addr(xinit, i),
-			     xstate_sizes[i]);
-
+		if (i == XFEATURE_PKRU) {
+			struct pkru_state pkru = {0};
+			/*
+			 * PKRU is not necessarily up to date in the
+			 * thread's XSAVE buffer.  Fill this part from the
+			 * per-thread storage.
+			 */
+			pkru.pkru = tsk->thread.pkru;
+			membuf_write(&to, &pkru, sizeof(pkru));
+		} else {
+			copy_feature(header.xfeatures & BIT_ULL(i), &to,
+				     __raw_xsave_addr(xsave, i),
+				     __raw_xsave_addr(xinit, i),
+				     xstate_sizes[i]);
+		}
 		/*
 		 * Keep track of the last copied state in the non-compacted
 		 * target buffer for gap zeroing.


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (52 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:07   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish() Thomas Gleixner
                   ` (16 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

As the PKRU state is managed seperately restoring it from the xstate buffer
would be counterproductive as it might either restore a stale value or
reinit the PKRU state to 0.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    4 ++--
 arch/x86/include/asm/fpu/xstate.h   |   10 ++++++++++
 arch/x86/kernel/fpu/xstate.c        |    1 +
 arch/x86/mm/extable.c               |    2 +-
 4 files changed, 14 insertions(+), 3 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -258,7 +258,7 @@ static inline void fxsave(struct fxregs_
  */
 static inline void os_xrstor_booting(struct xregs_state *xstate)
 {
-	u64 mask = -1;
+	u64 mask = xfeatures_mask_fpstate();
 	u32 lmask = mask;
 	u32 hmask = mask >> 32;
 	int err;
@@ -389,7 +389,7 @@ extern void __restore_fpregs_from_fpstat
 
 static inline void restore_fpregs_from_fpstate(union fpregs_state *fpstate)
 {
-	__restore_fpregs_from_fpstate(fpstate, -1);
+	__restore_fpregs_from_fpstate(fpstate, xfeatures_mask_fpstate());
 }
 
 extern int copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size);
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -111,6 +111,16 @@ static inline u64 xfeatures_mask_restore
 	return xfeatures_mask_all & XFEATURE_MASK_USER_RESTORE;
 }
 
+/*
+ * Like xfeatures_mask_restore_user() but additionally restors the
+ * supported supervisor states.
+ */
+static inline u64 xfeatures_mask_fpstate(void)
+{
+	return xfeatures_mask_all & \
+		(XFEATURE_MASK_USER_RESTORE | XFEATURE_MASK_SUPERVISOR_SUPPORTED);
+}
+
 static inline u64 xfeatures_mask_independent(void)
 {
 	if (!boot_cpu_has(X86_FEATURE_ARCH_LBR))
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -60,6 +60,7 @@ static short xsave_cpuid_features[] __in
  * XSAVE buffer, both supervisor and user xstates.
  */
 u64 xfeatures_mask_all __ro_after_init;
+EXPORT_SYMBOL_GPL(xfeatures_mask_all);
 
 static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =
 	{ [ 0 ... XFEATURE_MAX - 1] = -1};
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -65,7 +65,7 @@ EXPORT_SYMBOL_GPL(ex_handler_fault);
 	WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
 		  (void *)instruction_pointer(regs));
 
-	__restore_fpregs_from_fpstate(&init_fpstate, -1);
+	__restore_fpregs_from_fpstate(&init_fpstate, xfeatures_mask_fpstate());
 	return true;
 }
 EXPORT_SYMBOL_GPL(ex_handler_fprestore);


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (53 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:08   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate() Thomas Gleixner
                   ` (15 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

PKRU is already updated and the xstate is not longer the proper source of
information.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |   34 ++++------------------------------
 1 file changed, 4 insertions(+), 30 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -549,39 +549,13 @@ static inline void switch_fpu_prepare(st
  */
 
 /*
- * Load PKRU from the FPU context if available. Delay loading of the
- * complete FPU state until the return to userland.
+ * Delay loading of the complete FPU state until the return to userland.
+ * PKRU is handled seperately.
  */
 static inline void switch_fpu_finish(struct fpu *new_fpu)
 {
-	u32 pkru_val = init_pkru_value;
-	struct pkru_state *pk;
-
-	if (!static_cpu_has(X86_FEATURE_FPU))
-		return;
-
-	set_thread_flag(TIF_NEED_FPU_LOAD);
-
-	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
-		return;
-
-	/*
-	 * PKRU state is switched eagerly because it needs to be valid before we
-	 * return to userland e.g. for a copy_to_user() operation.
-	 */
-	if (!(current->flags & PF_KTHREAD)) {
-		/*
-		 * If the PKRU bit in xsave.header.xfeatures is not set,
-		 * then the PKRU component was in init state, which means
-		 * XRSTOR will set PKRU to 0. If the bit is not set then
-		 * get_xsave_addr() will return NULL because the PKRU value
-		 * in memory is not valid. This means pkru_val has to be
-		 * set to 0 and not to init_pkru_value.
-		 */
-		pk = get_xsave_addr(&new_fpu->state.xsave, XFEATURE_PKRU);
-		pkru_val = pk ? pk->pkru : 0;
-	}
-	__write_pkru(pkru_val);
+	if (static_cpu_has(X86_FEATURE_FPU))
+		set_thread_flag(TIF_NEED_FPU_LOAD);
 }
 
 #endif /* _ASM_X86_FPU_INTERNAL_H */


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (54 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:10   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru() Thomas Gleixner
                   ` (14 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

PKRU for a task is stored in task->thread.pkru when the task is scheduled
out. For 'current' the authoritative source of PKRU is the hardware.

fpu_reset_fpstate() has two callers:

  1) fpu__clear_user_states() for !FPU systems. For those PKRU is irrelevant

  2) fpu_flush_thread() which is invoked from flush_thread(). flush_thread()
     resets the hardware to the kernel restrictive default value.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/core.c |   22 ++++------------------
 1 file changed, 4 insertions(+), 18 deletions(-)

--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -337,23 +337,6 @@ static inline unsigned int init_fpstate_
 	return sizeof(init_fpstate.xsave);
 }
 
-/* Temporary workaround. Will be removed once PKRU and XSTATE are distangled. */
-static inline void pkru_set_default_in_xstate(struct xregs_state *xsave)
-{
-	struct pkru_state *pk;
-
-	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
-		return;
-	/*
-	 * Force XFEATURE_PKRU to be set in the header otherwise
-	 * get_xsave_addr() does not work and it also needs to be set to
-	 * make XRSTOR(S) load it.
-	 */
-	xsave->header.xfeatures |= XFEATURE_MASK_PKRU;
-	pk = get_xsave_addr(xsave, XFEATURE_PKRU);
-	pk->pkru = pkru_get_init_value();
-}
-
 /*
  * Reset current->fpu memory state to the init values.
  */
@@ -371,9 +354,12 @@ static void fpu_reset_fpstate(void)
 	 *
 	 * Do not use fpstate_init() here. Just copy init_fpstate which has
 	 * the correct content already except for PKRU.
+	 *
+	 * PKRU handling does not rely on the xstate when restoring for
+	 * user space as PKRU is eagerly written in switch_to() and
+	 * flush_thread().
 	 */
 	memcpy(&fpu->state, &init_fpstate, init_fpstate_copy_size());
-	pkru_set_default_in_xstate(&fpu->state.xsave);
 	set_thread_flag(TIF_NEED_FPU_LOAD);
 	fpregs_unlock();
 }


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (55 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:15   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 58/66] x86/fpu: Mark init_fpstate __ro_after_init Thomas Gleixner
                   ` (13 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

The PKRU value of a task is stored in task->thread.pkru when the task is
scheduled out. PKRU is restored on schedule in from there. So keeping the
XSAVE buffer up to date is a pointless exercise.

Remove the xstate fiddling and cleanup all related functions.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pkru.h          |   17 ++++-------------
 arch/x86/include/asm/special_insns.h |   14 +-------------
 arch/x86/kvm/x86.c                   |    4 ++--
 3 files changed, 7 insertions(+), 28 deletions(-)

--- a/arch/x86/include/asm/pkru.h
+++ b/arch/x86/include/asm/pkru.h
@@ -41,23 +41,14 @@ static inline u32 read_pkru(void)
 
 static inline void write_pkru(u32 pkru)
 {
-	struct pkru_state *pk;
-
 	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
 		return;
-
-	pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
-
 	/*
-	 * The PKRU value in xstate needs to be in sync with the value that is
-	 * written to the CPU. The FPU restore on return to userland would
-	 * otherwise load the previous value again.
+	 * WRPKRU is relatively expensive compared to RDPKRU.
+	 * Avoid WRPKRU when it would not change the value.
 	 */
-	fpregs_lock();
-	if (pk)
-		pk->pkru = pkru;
-	__write_pkru(pkru);
-	fpregs_unlock();
+	if (pkru != rdpkru())
+		wrpkru(pkru);
 }
 
 static inline void pkru_write_default(void)
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -104,25 +104,13 @@ static inline void wrpkru(u32 pkru)
 		     : : "a" (pkru), "c"(ecx), "d"(edx));
 }
 
-static inline void __write_pkru(u32 pkru)
-{
-	/*
-	 * WRPKRU is relatively expensive compared to RDPKRU.
-	 * Avoid WRPKRU when it would not change the value.
-	 */
-	if (pkru == rdpkru())
-		return;
-
-	wrpkru(pkru);
-}
-
 #else
 static inline u32 rdpkru(void)
 {
 	return 0;
 }
 
-static inline void __write_pkru(u32 pkru)
+static inline void wrpkru(u32 pkru)
 {
 }
 #endif
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -943,7 +943,7 @@ void kvm_load_guest_xsave_state(struct k
 	    (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 	     (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 	    vcpu->arch.pkru != vcpu->arch.host_pkru)
-		__write_pkru(vcpu->arch.pkru);
+		write_pkru(vcpu->arch.pkru);
 }
 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 
@@ -957,7 +957,7 @@ void kvm_load_host_xsave_state(struct kv
 	     (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 		vcpu->arch.pkru = rdpkru();
 		if (vcpu->arch.pkru != vcpu->arch.host_pkru)
-			__write_pkru(vcpu->arch.host_pkru);
+			write_pkru(vcpu->arch.host_pkru);
 	}
 
 	if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 58/66] x86/fpu: Mark init_fpstate __ro_after_init
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (56 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 14:19 ` [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore() Thomas Gleixner
                   ` (12 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Nothing has to write into that state after init

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch
---
 arch/x86/kernel/fpu/core.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/kernel/fpu/core.c
+++ b/arch/x86/kernel/fpu/core.c
@@ -23,7 +23,7 @@
  * Represents the initial FPU state. It's mostly (but not completely) zeroes,
  * depending on the FPU hardware format:
  */
-union fpregs_state init_fpstate __read_mostly;
+union fpregs_state init_fpstate __ro_after_init;
 
 /*
  * Track whether the kernel is using the FPU state


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (57 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 58/66] x86/fpu: Mark init_fpstate __ro_after_init Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:35   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check Thomas Gleixner
                   ` (11 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

__fpu_sig_restore() is convoluted and some of the basic checks can trivialy be done
in the calling function as well as the final error handling of clearing user state.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |   76 +++++++++++++++++++++++--------------------
 1 file changed, 41 insertions(+), 35 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -277,11 +277,11 @@ static int copy_user_to_fpregs_zeroing(v
 		return frstor_from_user_sigframe(buf);
 }
 
-static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
+static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
+			     bool ia32_fxstate)
 {
 	struct user_i387_ia32_struct *envp = NULL;
 	int state_size = fpu_kernel_xstate_size;
-	int ia32_fxstate = (buf != buf_fx);
 	struct task_struct *tsk = current;
 	struct fpu *fpu = &tsk->thread.fpu;
 	struct user_i387_ia32_struct env;
@@ -289,26 +289,6 @@ static int __fpu__restore_sig(void __use
 	int fx_only = 0;
 	int ret = 0;
 
-	ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) ||
-			 IS_ENABLED(CONFIG_IA32_EMULATION));
-
-	if (!buf) {
-		fpu__clear_user_states(fpu);
-		return 0;
-	}
-
-	if (!access_ok(buf, size)) {
-		ret = -EACCES;
-		goto out;
-	}
-
-	if (!static_cpu_has(X86_FEATURE_FPU)) {
-		ret = fpregs_soft_set(current, NULL, 0,
-				      sizeof(struct user_i387_ia32_struct),
-				      NULL, buf);
-		goto out;
-	}
-
 	if (use_xsave()) {
 		struct _fpx_sw_bytes fx_sw_user;
 		if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
@@ -391,7 +371,7 @@ static int __fpu__restore_sig(void __use
 		 */
 		ret = __copy_from_user(&env, buf, sizeof(env));
 		if (ret)
-			goto out;
+			return ret;
 		envp = &env;
 	}
 
@@ -424,7 +404,7 @@ static int __fpu__restore_sig(void __use
 
 		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx);
 		if (ret)
-			goto out;
+			return ret;
 
 		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures,
 					      fx_only);
@@ -442,10 +422,8 @@ static int __fpu__restore_sig(void __use
 
 	} else if (use_fxsr()) {
 		ret = __copy_from_user(&fpu->state.fxsave, buf_fx, state_size);
-		if (ret) {
-			ret = -EFAULT;
-			goto out;
-		}
+		if (ret)
+			return -EFAULT;
 
 		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures,
 					      fx_only);
@@ -462,7 +440,7 @@ static int __fpu__restore_sig(void __use
 	} else {
 		ret = __copy_from_user(&fpu->state.fsave, buf_fx, state_size);
 		if (ret)
-			goto out;
+			return ret;
 
 		fpregs_lock();
 		ret = frstor_safe(&fpu->state.fsave);
@@ -472,10 +450,6 @@ static int __fpu__restore_sig(void __use
 	else
 		fpregs_deactivate(fpu);
 	fpregs_unlock();
-
-out:
-	if (ret)
-		fpu__clear_user_states(fpu);
 	return ret;
 }
 
@@ -490,15 +464,47 @@ static inline int xstate_sigframe_size(v
  */
 int fpu__restore_sig(void __user *buf, int ia32_frame)
 {
+	unsigned int size = xstate_sigframe_size();
 	void __user *buf_fx = buf;
-	int size = xstate_sigframe_size();
+	bool ia32_fxstate = false;
+	int ret;
 
+	if (unlikely(!buf)) {
+		fpu__clear_user_states(&current->thread.fpu);
+		return 0;
+	}
+
+	ia32_frame &= (IS_ENABLED(CONFIG_X86_32) ||
+		       IS_ENABLED(CONFIG_IA32_EMULATION));
+
+	/*
+	 * Only FXSR enabled systems need the FX state quirk.
+	 * FRSTOR does not need it and can use the fast path.
+	 */
 	if (ia32_frame && use_fxsr()) {
 		buf_fx = buf + sizeof(struct fregs_state);
 		size += sizeof(struct fregs_state);
+		ia32_fxstate = true;
+	}
+
+	if (!access_ok(buf, size)) {
+		ret = -EACCES;
+		goto out;
+	}
+
+	if (!IS_ENABLED(CONFIG_X86_64) && !static_cpu_has(X86_FEATURE_FPU)) {
+		return fpregs_soft_set(current, NULL, 0,
+				       sizeof(struct user_i387_ia32_struct),
+				       NULL, buf);
 	}
 
-	return __fpu__restore_sig(buf, buf_fx, size);
+	ret = __fpu_restore_sig(buf, buf_fx, ia32_fxstate);
+
+out:
+	if (unlikely(ret))
+		fpu__clear_user_states(&current->thread.fpu);
+
+	return ret;
 }
 
 unsigned long


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (58 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-22 17:40   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe Thomas Gleixner
                   ` (10 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Checking for the XSTATE buffer being 64 byte aligned and if not deciding
just to restore the FXSR state is daft.

If user space provides an unaligned math frame and has the extended state
magic set in the FX software reserved bytes, then it really can keep the
pieces.

If the frame is unaligned and the FX software magic is not set, then
fx_only is already set and the restore will use fxrstor.

Remove it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |    3 ---
 1 file changed, 3 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -306,9 +306,6 @@ static int __fpu_restore_sig(void __user
 		}
 	}
 
-	if ((unsigned long)buf_fx % 64)
-		fx_only = 1;
-
 	if (!ia32_fxstate) {
 		/*
 		 * Attempt to restore the FPU registers directly from user


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (59 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-18 21:02   ` Andrew Cooper
  2021-06-22 19:10   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing() Thomas Gleixner
                   ` (9 subsequent siblings)
  70 siblings, 2 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Utilize the check for the extended state magic in the FX software reserved
bytes and set the parameters for restoring fx_only in the relevant members
of fw_sw_user.

This allows further cleanups on top because the data is consistent.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |   69 +++++++++++++++++++------------------------
 1 file changed, 32 insertions(+), 37 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -15,29 +15,29 @@
 #include <asm/sigframe.h>
 #include <asm/trace/fpu.h>
 
-static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
+static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32 __ro_after_init;
 
 /*
  * Check for the presence of extended state information in the
  * user fpstate pointer in the sigcontext.
  */
-static inline int check_for_xstate(struct fxregs_state __user *buf,
-				   void __user *fpstate,
-				   struct _fpx_sw_bytes *fx_sw)
+static inline int check_xstate_in_sigframe(struct fxregs_state __user *fxbuf,
+					   struct _fpx_sw_bytes *fx_sw)
 {
 	int min_xstate_size = sizeof(struct fxregs_state) +
 			      sizeof(struct xstate_header);
+	void __user *fpstate = fxbuf;
 	unsigned int magic2;
 
-	if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
-		return -1;
+	if (__copy_from_user(fx_sw, &fxbuf->sw_reserved[0], sizeof(*fx_sw)))
+		return -EFAULT;
 
 	/* Check for the first magic field and other error scenarios. */
 	if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
 	    fx_sw->xstate_size < min_xstate_size ||
 	    fx_sw->xstate_size > fpu_user_xstate_size ||
 	    fx_sw->xstate_size > fx_sw->extended_size)
-		return -1;
+		goto setfx;
 
 	/*
 	 * Check for the presence of second magic word at the end of memory
@@ -45,10 +45,18 @@ static inline int check_for_xstate(struc
 	 * fpstate layout with out copying the extended state information
 	 * in the memory layout.
 	 */
-	if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
-	    || magic2 != FP_XSTATE_MAGIC2)
-		return -1;
+	if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)))
+		return -EFAULT;
 
+	if (likely(magic2 == FP_XSTATE_MAGIC2))
+		return 0;
+setfx:
+	trace_x86_fpu_xstate_check_failed(&current->thread.fpu);
+
+	/* Set the parameters for fx only state */
+	fx_sw->magic1 = 0;
+	fx_sw->xstate_size = sizeof(struct fxregs_state);
+	fx_sw->xfeatures = XFEATURE_MASK_FPSSE;
 	return 0;
 }
 
@@ -213,21 +221,15 @@ int copy_fpstate_to_sigframe(void __user
 
 static inline void
 sanitize_restored_user_xstate(union fpregs_state *state,
-			      struct user_i387_ia32_struct *ia32_env,
-			      u64 user_xfeatures, int fx_only)
+			      struct user_i387_ia32_struct *ia32_env, u64 mask)
 {
 	struct xregs_state *xsave = &state->xsave;
 	struct xstate_header *header = &xsave->header;
 
 	if (use_xsave()) {
 		/*
-		 * Clear all features bit which are not set in
-		 * user_xfeatures and clear all extended features
-		 * for fx_only mode.
-		 */
-		u64 mask = fx_only ? XFEATURE_MASK_FPSSE : user_xfeatures;
-
-		/*
+		 * Clear all features bit which are not set in mask
+		 *
 		 * Supervisor state has to be preserved. The sigframe
 		 * restore can only modify user features, i.e. @mask
 		 * cannot contain them.
@@ -286,24 +288,19 @@ static int __fpu_restore_sig(void __user
 	struct fpu *fpu = &tsk->thread.fpu;
 	struct user_i387_ia32_struct env;
 	u64 user_xfeatures = 0;
-	int fx_only = 0;
+	bool fx_only = false;
 	int ret = 0;
 
 	if (use_xsave()) {
 		struct _fpx_sw_bytes fx_sw_user;
-		if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
-			/*
-			 * Couldn't find the extended state information in the
-			 * memory layout. Restore just the FP/SSE and init all
-			 * the other extended state.
-			 */
-			state_size = sizeof(struct fxregs_state);
-			fx_only = 1;
-			trace_x86_fpu_xstate_check_failed(fpu);
-		} else {
-			state_size = fx_sw_user.xstate_size;
-			user_xfeatures = fx_sw_user.xfeatures;
-		}
+
+		ret = check_xstate_in_sigframe(buf_fx, &fx_sw_user);
+		if (unlikely(ret))
+			return ret;
+
+		fx_only = !fx_sw_user.magic1;
+		state_size = fx_sw_user.xstate_size;
+		user_xfeatures = fx_sw_user.xfeatures;
 	}
 
 	if (!ia32_fxstate) {
@@ -403,8 +400,7 @@ static int __fpu_restore_sig(void __user
 		if (ret)
 			return ret;
 
-		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures,
-					      fx_only);
+		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures);
 
 		fpregs_lock();
 		if (unlikely(init_bv))
@@ -422,8 +418,7 @@ static int __fpu_restore_sig(void __user
 		if (ret)
 			return -EFAULT;
 
-		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures,
-					      fx_only);
+		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures);
 
 		fpregs_lock();
 		if (use_xsave()) {


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing()
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (60 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-23  7:51   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 63/66] x86/fpu/signal: Split out the direct restore code Thomas Gleixner
                   ` (8 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Now that user_xfeatures is correctly set when xsave is enabled, remove the
duplicated initialization of components.

Rename the function while at it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |   36 +++++++++++++++---------------------
 1 file changed, 15 insertions(+), 21 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -250,33 +250,27 @@ sanitize_restored_user_xstate(union fpre
 }
 
 /*
- * Restore the extended state if present. Otherwise, restore the FP/SSE state.
+ * Restore the FPU state directly from the userspace signal frame.
  */
-static int copy_user_to_fpregs_zeroing(void __user *buf, u64 xbv, int fx_only)
+static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
 {
-	u64 init_bv;
-	int r;
-
 	if (use_xsave()) {
-		if (fx_only) {
-			init_bv = xfeatures_mask_uabi() & ~XFEATURE_MASK_FPSSE;
+		u64 init_bv = xfeatures_mask_uabi() & ~xrestore;
+		int ret;
 
-			r = fxrstor_from_user_sigframe(buf);
-			if (!r)
-				os_xrstor(&init_fpstate.xsave, init_bv);
-			return r;
-		} else {
-			init_bv = xfeatures_mask_uabi() & ~xbv;
-
-			r = xrstor_from_user_sigframe(buf, xbv);
-			if (!r && unlikely(init_bv))
-				os_xrstor(&init_fpstate.xsave, init_bv);
-			return r;
-		}
+		if (likely(!fx_only))
+			ret = xrstor_from_user_sigframe(buf, xrestore);
+		else
+			ret = fxrstor_from_user_sigframe(buf);
+
+		if (!ret && unlikely(init_bv))
+			os_xrstor(&init_fpstate.xsave, init_bv);
+		return ret;
 	} else if (use_fxsr()) {
 		return fxrstor_from_user_sigframe(buf);
-	} else
+	} else {
 		return frstor_from_user_sigframe(buf);
+	}
 }
 
 static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
@@ -313,7 +307,7 @@ static int __fpu_restore_sig(void __user
 		 */
 		fpregs_lock();
 		pagefault_disable();
-		ret = copy_user_to_fpregs_zeroing(buf_fx, user_xfeatures, fx_only);
+		ret = restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only);
 		pagefault_enable();
 		if (!ret) {
 


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 63/66] x86/fpu/signal: Split out the direct restore code
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (61 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing() Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-23  8:10   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 64/66] x86/fpu: Return proper error codes from user access functions Thomas Gleixner
                   ` (7 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Prepare for smarter failure handling of the direct restore.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |  110 +++++++++++++++++++++----------------------
 1 file changed, 56 insertions(+), 54 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -249,10 +249,7 @@ sanitize_restored_user_xstate(union fpre
 	}
 }
 
-/*
- * Restore the FPU state directly from the userspace signal frame.
- */
-static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
+static int restore_hwregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
 {
 	if (use_xsave()) {
 		u64 init_bv = xfeatures_mask_uabi() & ~xrestore;
@@ -273,6 +270,56 @@ static int restore_fpregs_from_user(void
 	}
 }
 
+static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
+{
+	struct fpu *fpu = &current->thread.fpu;
+	int ret ;
+
+	fpregs_lock();
+	pagefault_disable();
+	ret = restore_hwregs_from_user(buf, xrestore, fx_only);
+	pagefault_enable();
+
+	if (unlikely(ret)) {
+		/*
+		 * The above did an FPU restore operation, restricted to
+		 * the user portion of the registers, and failed, but the
+		 * microcode might have modified the FPU registers
+		 * nevertheless.
+		 *
+		 * If the FPU registers do not belong to current, then
+		 * invalidate the FPU register state otherwise the task
+		 * might preempt current and return to user space with
+		 * corrupted FPU registers.
+		 *
+		 * In case current owns the FPU registers then no further
+		 * action is required. The fixup in the slow path will
+		 * handle it correctly.
+		 */
+		if (test_thread_flag(TIF_NEED_FPU_LOAD))
+			__cpu_invalidate_fpregs_state();
+		fpregs_unlock();
+		return ret;
+	}
+
+	/*
+	 * Restore supervisor states: previous context switch etc has done
+	 * XSAVES and saved the supervisor states in the kernel buffer from
+	 * which they can be restored now.
+	 *
+	 * We cannot do a single XRSTORS here - which would be nice -
+	 * because the rest of the FPU registers are being restored from a
+	 * user buffer directly. The single XRSTORS happens below, when the
+	 * user buffer has been copied to the kernel one.
+	 */
+	if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor())
+		os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
+
+	fpregs_mark_activate();
+	fpregs_unlock();
+	return 0;
+}
+
 static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
 			     bool ia32_fxstate)
 {
@@ -297,61 +344,16 @@ static int __fpu_restore_sig(void __user
 		user_xfeatures = fx_sw_user.xfeatures;
 	}
 
-	if (!ia32_fxstate) {
+	if (likely(!ia32_fxstate)) {
 		/*
 		 * Attempt to restore the FPU registers directly from user
-		 * memory. For that to succeed, the user access cannot cause
-		 * page faults. If it does, fall back to the slow path below,
-		 * going through the kernel buffer with the enabled pagefault
-		 * handler.
+		 * memory. For that to succeed, the user access cannot cause page
+		 * faults. If it does, fall back to the slow path below, going
+		 * through the kernel buffer with the enabled pagefault handler.
 		 */
-		fpregs_lock();
-		pagefault_disable();
 		ret = restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only);
-		pagefault_enable();
-		if (!ret) {
-
-			/*
-			 * Restore supervisor states: previous context switch
-			 * etc has done XSAVES and saved the supervisor states
-			 * in the kernel buffer from which they can be restored
-			 * now.
-			 *
-			 * We cannot do a single XRSTORS here - which would
-			 * be nice - because the rest of the FPU registers are
-			 * being restored from a user buffer directly. The
-			 * single XRSTORS happens below, when the user buffer
-			 * has been copied to the kernel one.
-			 */
-			if (test_thread_flag(TIF_NEED_FPU_LOAD) &&
-			    xfeatures_mask_supervisor()) {
-				os_xrstor(&fpu->state.xsave,
-					  xfeatures_mask_supervisor());
-			}
-			fpregs_mark_activate();
-			fpregs_unlock();
+		if (likely(!ret))
 			return 0;
-		}
-
-		/*
-		 * The above did an FPU restore operation, restricted to
-		 * the user portion of the registers, and failed, but the
-		 * microcode might have modified the FPU registers
-		 * nevertheless.
-		 *
-		 * If the FPU registers do not belong to current, then
-		 * invalidate the FPU register state otherwise the task might
-		 * preempt current and return to user space with corrupted
-		 * FPU registers.
-		 *
-		 * In case current owns the FPU registers then no further
-		 * action is required. The fixup below will handle it
-		 * correctly.
-		 */
-		if (test_thread_flag(TIF_NEED_FPU_LOAD))
-			__cpu_invalidate_fpregs_state();
-
-		fpregs_unlock();
 	} else {
 		/*
 		 * For 32-bit frames with fxstate, copy the fxstate so it can


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 64/66] x86/fpu: Return proper error codes from user access functions
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (62 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 63/66] x86/fpu/signal: Split out the direct restore code Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-23  8:30   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path Thomas Gleixner
                   ` (6 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

When *RSTOR from user memory raises an exception there is no way to
differentiate them. That's bad because it forces the slow path even when
the failure was not a fault. If the operation raised eg. #GP then going
through the slow path is pointless.

Use _ASM_EXTABLE_FAULT() which stores the trap number and let the exception
fixup return the negated trap number as error.

This allows to seperate the fast path and let it handle faults directly and
avoid the slow path for all other exceptions.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h |    9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -87,6 +87,7 @@ extern void fpstate_init_soft(struct swr
 static inline void fpstate_init_soft(struct swregs_state *soft) {}
 #endif
 
+/* Returns 0 or the negated trap number, which results in -EFAULT for #PF */
 #define user_insn(insn, output, input...)				\
 ({									\
 	int err;							\
@@ -94,14 +95,14 @@ static inline void fpstate_init_soft(str
 	might_fault();							\
 									\
 	asm volatile(ASM_STAC "\n"					\
-		     "1:" #insn "\n\t"					\
+		     "1: " #insn "\n"					\
 		     "2: " ASM_CLAC "\n"				\
 		     ".section .fixup,\"ax\"\n"				\
-		     "3:  movl $-1,%[err]\n"				\
+		     "3:  negl %%eax\n"					\
 		     "    jmp  2b\n"					\
 		     ".previous\n"					\
-		     _ASM_EXTABLE(1b, 3b)				\
-		     : [err] "=r" (err), output				\
+		     _ASM_EXTABLE_FAULT(1b, 3b)				\
+		     : [err] "=a" (err), output				\
 		     : "0"(0), input);					\
 	err;								\
 })


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (63 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 64/66] x86/fpu: Return proper error codes from user access functions Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-23  8:45   ` Borislav Petkov
  2021-06-18 14:19 ` [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init Thomas Gleixner
                   ` (5 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

If *RSTOR raises an exception, then the slow path is taken. That's wrong
because if the reason was not #PF then going through the slow path is waste
of time because that will end up with the same conclusion that the data is
invalid.

Now that the wrapper around *RSTOR return an negative error code, which is
the negated trap number, it's possible to differentiate.

If the *RSTOR raised #PF then handle it directly in the fast path and if it
was some other exception, e.g. #GP, then give up and do not try the fast
path.

This removes the legacy frame FRSTOR code from the slow path because FRSTOR
is not a ia32_fxstate frame and is therefore handled in the fast path.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |   65 ++++++++++++++++++++-----------------------
 1 file changed, 31 insertions(+), 34 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -270,11 +270,17 @@ static int restore_hwregs_from_user(void
 	}
 }
 
-static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
+/*
+ * Attempt to restore the FPU registers directly from user memory.
+ * Pagefaults are handled and any errors returned are fatal.
+ */
+static int restore_fpregs_from_user(void __user *buf, u64 xrestore,
+				    bool fx_only, unsigned int size)
 {
 	struct fpu *fpu = &current->thread.fpu;
 	int ret ;
 
+retry:
 	fpregs_lock();
 	pagefault_disable();
 	ret = restore_hwregs_from_user(buf, xrestore, fx_only);
@@ -291,15 +297,16 @@ static int restore_fpregs_from_user(void
 		 * invalidate the FPU register state otherwise the task
 		 * might preempt current and return to user space with
 		 * corrupted FPU registers.
-		 *
-		 * In case current owns the FPU registers then no further
-		 * action is required. The fixup in the slow path will
-		 * handle it correctly.
 		 */
 		if (test_thread_flag(TIF_NEED_FPU_LOAD))
 			__cpu_invalidate_fpregs_state();
 		fpregs_unlock();
-		return ret;
+
+		if (ret == -EFAULT)
+			ret = fault_in_pages_readable(buf, size);
+		if (!ret)
+			goto retry;
+		return ret == -EFAULT ? ret : -EINVAL;
 	}
 
 	/*
@@ -309,8 +316,7 @@ static int restore_fpregs_from_user(void
 	 *
 	 * We cannot do a single XRSTORS here - which would be nice -
 	 * because the rest of the FPU registers are being restored from a
-	 * user buffer directly. The single XRSTORS happens below, when the
-	 * user buffer has been copied to the kernel one.
+	 * user buffer directly.
 	 */
 	if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor())
 		os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
@@ -323,14 +329,13 @@ static int restore_fpregs_from_user(void
 static int __fpu_restore_sig(void __user *buf, void __user *buf_fx,
 			     bool ia32_fxstate)
 {
-	struct user_i387_ia32_struct *envp = NULL;
 	int state_size = fpu_kernel_xstate_size;
 	struct task_struct *tsk = current;
 	struct fpu *fpu = &tsk->thread.fpu;
 	struct user_i387_ia32_struct env;
 	u64 user_xfeatures = 0;
 	bool fx_only = false;
-	int ret = 0;
+	int ret;
 
 	if (use_xsave()) {
 		struct _fpx_sw_bytes fx_sw_user;
@@ -351,21 +356,20 @@ static int __fpu_restore_sig(void __user
 		 * faults. If it does, fall back to the slow path below, going
 		 * through the kernel buffer with the enabled pagefault handler.
 		 */
-		ret = restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only);
-		if (likely(!ret))
-			return 0;
-	} else {
-		/*
-		 * For 32-bit frames with fxstate, copy the fxstate so it can
-		 * be reconstructed later.
-		 */
-		ret = __copy_from_user(&env, buf, sizeof(env));
-		if (ret)
-			return ret;
-		envp = &env;
+		return restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only,
+						state_size);
 	}
 
 	/*
+	 * Copy the legacy state because the FP portion of the FX frame has
+	 * to be ignored for histerical raisins. The legacy state is folded
+	 * in once the larger state has been copied.
+	 */
+	ret = __copy_from_user(&env, buf, sizeof(env));
+	if (ret)
+		return ret;
+
+	/*
 	 * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is
 	 * not modified on context switch and that the xstate is considered
 	 * to be loaded again on return to userland (overriding last_cpu avoids
@@ -379,8 +383,7 @@ static int __fpu_restore_sig(void __user
 		 * supervisor state is preserved. Save the full state for
 		 * simplicity. There is no point in optimizing this by only
 		 * saving the supervisor states and then shuffle them to
-		 * the right place in memory. This is the slow path and the
-		 * above XRSTOR failed or ia32_fxstate is true. Shrug.
+		 * the right place in memory. It's ia32 mode. Shrug.
 		 */
 		if (xfeatures_mask_supervisor())
 			os_xsave(&fpu->state.xsave);
@@ -396,7 +399,7 @@ static int __fpu_restore_sig(void __user
 		if (ret)
 			return ret;
 
-		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures);
+		sanitize_restored_user_xstate(&fpu->state, &env, user_xfeatures);
 
 		fpregs_lock();
 		if (unlikely(init_bv))
@@ -409,12 +412,12 @@ static int __fpu_restore_sig(void __user
 		ret = os_xrstor_safe(&fpu->state.xsave,
 				     user_xfeatures | xfeatures_mask_supervisor());
 
-	} else if (use_fxsr()) {
+	} else {
 		ret = __copy_from_user(&fpu->state.fxsave, buf_fx, state_size);
 		if (ret)
 			return -EFAULT;
 
-		sanitize_restored_user_xstate(&fpu->state, envp, user_xfeatures);
+		sanitize_restored_user_xstate(&fpu->state, &env, user_xfeatures);
 
 		fpregs_lock();
 		if (use_xsave()) {
@@ -425,14 +428,8 @@ static int __fpu_restore_sig(void __user
 		}
 
 		ret = fxrstor_safe(&fpu->state.fxsave);
-	} else {
-		ret = __copy_from_user(&fpu->state.fsave, buf_fx, state_size);
-		if (ret)
-			return ret;
-
-		fpregs_lock();
-		ret = frstor_safe(&fpu->state.fsave);
 	}
+
 	if (!ret)
 		fpregs_mark_activate();
 	else


^ permalink raw reply	[flat|nested] 133+ messages in thread

* [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (64 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path Thomas Gleixner
@ 2021-06-18 14:19 ` Thomas Gleixner
  2021-06-23  8:56   ` Borislav Petkov
  2021-06-21 16:15 ` [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Yu, Yu-cheng
                   ` (4 subsequent siblings)
  70 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 14:19 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

There is no reason to do an extra XRSTOR from initfp_state for feature bits
which have been cleared by user space in the FX magic xfeatures storage.

Just clear them in the task's XSTATE header and do a full restore which
will put these cleared features into init state.

There is no real difference in performance because the current code already
does a full restore when the xfeatures bits are preserved as the signal
frame setup has stored them, which is the full UABI feature set.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/fpu/signal.c |   92 +++++++++++++++----------------------------
 1 file changed, 33 insertions(+), 59 deletions(-)

--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -219,36 +219,6 @@ int copy_fpstate_to_sigframe(void __user
 	return 0;
 }
 
-static inline void
-sanitize_restored_user_xstate(union fpregs_state *state,
-			      struct user_i387_ia32_struct *ia32_env, u64 mask)
-{
-	struct xregs_state *xsave = &state->xsave;
-	struct xstate_header *header = &xsave->header;
-
-	if (use_xsave()) {
-		/*
-		 * Clear all features bit which are not set in mask
-		 *
-		 * Supervisor state has to be preserved. The sigframe
-		 * restore can only modify user features, i.e. @mask
-		 * cannot contain them.
-		 */
-		header->xfeatures &= mask | xfeatures_mask_supervisor();
-	}
-
-	if (use_fxsr()) {
-		/*
-		 * mscsr reserved bits must be masked to zero for security
-		 * reasons.
-		 */
-		xsave->i387.mxcsr &= mxcsr_feature_mask;
-
-		if (ia32_env)
-			convert_to_fxsr(&state->fxsave, ia32_env);
-	}
-}
-
 static int restore_hwregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
 {
 	if (use_xsave()) {
@@ -347,6 +317,8 @@ static int __fpu_restore_sig(void __user
 		fx_only = !fx_sw_user.magic1;
 		state_size = fx_sw_user.xstate_size;
 		user_xfeatures = fx_sw_user.xfeatures;
+	} else {
+		user_xfeatures = XFEATURE_MASK_FPSSE;
 	}
 
 	if (likely(!ia32_fxstate)) {
@@ -390,54 +362,56 @@ static int __fpu_restore_sig(void __user
 		set_thread_flag(TIF_NEED_FPU_LOAD);
 	}
 	__fpu_invalidate_fpregs_state(fpu);
+	__cpu_invalidate_fpregs_state();
 	fpregs_unlock();
 
 	if (use_xsave() && !fx_only) {
-		u64 init_bv = xfeatures_mask_uabi() & ~user_xfeatures;
-
-		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx);
+		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave,
+							buf_fx);
 		if (ret)
 			return ret;
+	} else {
+		if (__copy_from_user(&fpu->state.fxsave, buf_fx,
+				     sizeof(fpu->state.fxsave)))
+			return -EFAULT;
 
-		sanitize_restored_user_xstate(&fpu->state, &env, user_xfeatures);
+		/* Reject invalid MXCSR values. */
+		if (fpu->state.fxsave.mxcsr & mxcsr_feature_mask)
+			return -EINVAL;
 
-		fpregs_lock();
-		if (unlikely(init_bv))
-			os_xrstor(&init_fpstate.xsave, init_bv);
+		/* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */
+		if (use_xsave())
+			fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
+	}
+
+	/* Fold the legacy FP storage */
+	convert_to_fxsr(&fpu->state.fxsave, &env);
 
+	fpregs_lock();
+	if (use_xsave()) {
 		/*
-		 * Restore previously saved supervisor xstates along with
-		 * copied-in user xstates.
+		 * Remove all UABI feature bits not set in user_xfeatures
+		 * from the memory xstate header which makes the full
+		 * restore below bring them into init state. This works for
+		 * fx_only mode as well because that has only FP and SSE
+		 * set in user_xfeatures.
+		 *
+		 * Preserve supervisor states!
 		 */
-		ret = os_xrstor_safe(&fpu->state.xsave,
-				     user_xfeatures | xfeatures_mask_supervisor());
+		u64 mask = user_xfeatures | xfeatures_mask_supervisor();
 
+		fpu->state.xsave.header.xfeatures &= mask;
+		ret = os_xrstor_safe(&fpu->state.xsave, xfeatures_mask_all);
 	} else {
-		ret = __copy_from_user(&fpu->state.fxsave, buf_fx, state_size);
-		if (ret)
-			return -EFAULT;
-
-		sanitize_restored_user_xstate(&fpu->state, &env, user_xfeatures);
-
-		fpregs_lock();
-		if (use_xsave()) {
-			u64 init_bv;
-
-			init_bv = xfeatures_mask_uabi() & ~XFEATURE_MASK_FPSSE;
-			os_xrstor(&init_fpstate.xsave, init_bv);
-		}
-
 		ret = fxrstor_safe(&fpu->state.fxsave);
 	}
 
-	if (!ret)
+	if (likely(!ret))
 		fpregs_mark_activate();
-	else
-		fpregs_deactivate(fpu);
+
 	fpregs_unlock();
 	return ret;
 }
-
 static inline int xstate_sigframe_size(void)
 {
 	return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE :


^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE
  2021-06-18 14:18 ` [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE Thomas Gleixner
@ 2021-06-18 20:41   ` Thomas Gleixner
  2021-06-18 20:44     ` Borislav Petkov
  2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
  1 sibling, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 20:41 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang, Andrew Cooper

Andrew!

On Fri, Jun 18 2021 at 16:18, Thomas Gleixner wrote:
>
> Fixes: 6bad06b76892 ("x86, xsave: Use xsaveopt in context-switch path when supported")
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>

Doh, I wanted to add Borislav's R-B tag and either my brain tricked me
because I was staring at this way too long or my tired finger memory
ended up using the wrong shortcut. So this should obviously be:

  Reviewed-by: Borislav Petkov <bp@suse.de>

Thanks for spotting this.

       tglx


^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE
  2021-06-18 20:41   ` Thomas Gleixner
@ 2021-06-18 20:44     ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-18 20:44 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang, Andrew Cooper

On Fri, Jun 18, 2021 at 10:41:01PM +0200, Thomas Gleixner wrote:
> Doh, I wanted to add Borislav's R-B tag and either my brain tricked me
> because I was staring at this way too long or my tired finger memory
> ended up using the wrong shortcut. So this should obviously be:
> 
>   Reviewed-by: Borislav Petkov <bp@suse.de>

Well, it is in a disadvantage this way: it is waay better if you review
your own patch than I.

:-P


-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe
  2021-06-18 14:19 ` [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe Thomas Gleixner
@ 2021-06-18 21:02   ` Andrew Cooper
  2021-06-18 23:49     ` Thomas Gleixner
  2021-06-22 19:10   ` Borislav Petkov
  1 sibling, 1 reply; 133+ messages in thread
From: Andrew Cooper @ 2021-06-18 21:02 UTC (permalink / raw)
  To: Thomas Gleixner, LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang, Andrew Cooper

On 18/06/2021 15:19, Thomas Gleixner wrote:
> Utilize the check for the extended state magic in the FX software reserved
> bytes and set the parameters for restoring fx_only in the relevant members
> of fw_sw_user.
>
> This allows further cleanups on top because the data is consistent.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   69 +++++++++++++++++++------------------------
>  1 file changed, 32 insertions(+), 37 deletions(-)
>
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -15,29 +15,29 @@
>  #include <asm/sigframe.h>
>  #include <asm/trace/fpu.h>
>  
> -static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
> +static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32 __ro_after_init;

You probably want a second __ro_after_init here.

~Andrew

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe
  2021-06-18 21:02   ` Andrew Cooper
@ 2021-06-18 23:49     ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-18 23:49 UTC (permalink / raw)
  To: Andrew Cooper, LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang, Andrew Cooper

Andrew,

On Fri, Jun 18 2021 at 22:02, Andrew Cooper wrote:
> On 18/06/2021 15:19, Thomas Gleixner wrote:
>> -static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
>> +static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32 __ro_after_init;
>
> You probably want a second __ro_after_init here.

Ooops.

Thanks for spotting it!

       tglx


^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate()
  2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
@ 2021-06-19  8:34   ` Borislav Petkov
  2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
  1 sibling, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-19  8:34 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:24PM +0200, Thomas Gleixner wrote:
> Subject: Re: [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in

Prefix repeated.

> From: Thomas Gleixner <tglx@linutronix.de>
> 
> sanitize_restored_user_xstate() preserves the supervisor states only
> when the fx_only argument is zero, which allows unpriviledged user space
> to put supervisor states back into init state.

Yikes.

> Preserve them unconditionally.
> 
> Fixes: 5d6b6a6f9b5c ("x86/fpu/xstate: Update sanitize_restored_xstate() for supervisor xstates")
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: stable@vger.kernel.org
> ---
>  arch/x86/kernel/fpu/signal.c |   26 ++++++++------------------
>  1 file changed, 8 insertions(+), 18 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -221,28 +221,18 @@ sanitize_restored_user_xstate(union fpre
>  
>  	if (use_xsave()) {
>  		/*
> -		 * Note: we don't need to zero the reserved bits in the
> -		 * xstate_header here because we either didn't copy them at all,
> -		 * or we checked earlier that they aren't set.
> +		 * Clear all features bit which are not set in

			    feature bits

> +		 * user_xfeatures and clear all extended features
> +		 * for fx_only mode.
>  		 */
> +		u64 mask = fx_only ? XFEATURE_MASK_FPSSE : user_xfeatures;
>  
>  		/*
> -		 * 'user_xfeatures' might have bits clear which are
> -		 * set in header->xfeatures. This represents features that
> -		 * were in init state prior to a signal delivery, and need
> -		 * to be reset back to the init state.  Clear any user
> -		 * feature bits which are set in the kernel buffer to get
> -		 * them back to the init state.
> -		 *
> -		 * Supervisor state is unchanged by input from userspace.
> -		 * Ensure supervisor state bits stay set and supervisor
> -		 * state is not modified.
> +		 * Supervisor state has to be preserved. The sigframe
> +		 * restore can only modify user features, i.e. @mask
> +		 * cannot contain them.
>  		 */
> -		if (fx_only)
> -			header->xfeatures = XFEATURE_MASK_FPSSE;
> -		else
> -			header->xfeatures &= user_xfeatures |
> -					     xfeatures_mask_supervisor();
> +		header->xfeatures &= mask | xfeatures_mask_supervisor();

With those addressed:

Reviewed-by: Borislav Petkov <bp@suse.de>

Thx.

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling
  2021-06-18 14:18 ` [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling Thomas Gleixner
@ 2021-06-19  9:41   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-19  9:41 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:26PM +0200, Thomas Gleixner wrote:
> The gap handling in copy_xstate_to_kernel() is wrong when XSAVES is in use.
> 
> Using init_fpstate for copying the init state of features which are
> not set in the xstate header is only correct for the legacy area, but
> not for the extended features area because when XSAVES is in use then
> init_fpstate is in compacted form which means the xstate offsets which
> are used to copy from init_fpstate are not valid.
> 
> Fortunately this is not a real problem today because all extended
> features in use have an all zeros init state, but it is wrong
> nevertheless and with a potentially dynamically sized init_fpstate
> this would result in access outside of the init_fpstate.
> 
> Fix this by keeping track of the last copied state in the target buffer and
> explicitly zero it when there is a feature or alignment gap.
> 
> Use the compacted offset when accessing the extended feature space in
> init_fpstate.
> 
> As this is not a functional issue on older kernels this is intentionally
> not tagged for stable.
> 
> Fixes: b8be15d58806 ("x86/fpu/xstate: Re-enable XSAVES")
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Remove the AVX/SEE thinko
>     Fix comments (Boris)
> V2: New patch
> ---
>  arch/x86/kernel/fpu/xstate.c |  105 ++++++++++++++++++++++++-------------------
>  1 file changed, 61 insertions(+), 44 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init
  2021-06-18 14:18 ` [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init Thomas Gleixner
@ 2021-06-20  8:44   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-20  8:44 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:29PM +0200, Thomas Gleixner wrote:
> Nothing has to modify this after init.
> 
> But of course there is code which unconditionaly masks xfeatures_mask_all

WARNING: 'unconditionaly' may be misspelled - perhaps 'unconditionally'?
#71: 
But of course there is code which unconditionaly masks xfeatures_mask_all
                                  ^^^^^^^^^^^^^^
> @@ -896,8 +888,18 @@ void __init fpu__init_system_xstate(void
>  	setup_init_fpu_buf();
>  	setup_xstate_comp_offsets();
>  	setup_supervisor_only_offsets();
> -	print_xstate_offset_size();
>  
> +	/*
> +	 * Paranoia check whether something in the setup modified the
> +	 * xfeatures mask.
> +	 */
> +	if (xfeatures != xfeatures_mask_all) {
> +		pr_err("x86/fpu: xfeatures modified during init %016llx %016llx, disabling XSAVE\n",

Let's make that:

		pr_err("x86/fpu: xfeatures modified from 0x%016llx to 0x%016llx during init, disabling XSAVE\n",

so that it is clear which is which.

With those:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask()
  2021-06-18 14:18 ` [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask() Thomas Gleixner
@ 2021-06-20  9:02   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-20  9:02 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:30PM +0200, Thomas Gleixner wrote:
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1715,9 +1715,8 @@ void print_cpu_info(struct cpuinfo_x86 *
>  }
>  
>  /*
> - * clearcpuid= was already parsed in fpu__init_parse_early_param.
> - * But we need to keep a dummy __setup around otherwise it would
> - * show up as an environment variable for init.
> + * clearcpuid= was already parsed in cpu_parse_early_param().  This dummy
> + * function prevents it to become an environment variable for init.

... prevents it from becoming...

In any case:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 11/66] x86/fpu: Sanitize xstateregs_set()
  2021-06-18 14:18 ` [patch V3 11/66] x86/fpu: Sanitize xstateregs_set() Thomas Gleixner
@ 2021-06-20 21:30   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-20 21:30 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:34PM +0200, Thomas Gleixner wrote:
> xstateregs_set() operates on a stopped task and tries to copy the provided
> buffer into the task's fpu.state.xsave buffer.
> 
> Any error while copying or invalid state detected after copying results in
> wiping the target task's FPU state completely including supervisor states.
> 
> That's just wrong. The caller supplied invalid data or has a problem with
> unmapped memory, so there is absolutely no justification to corrupt the
> target state.
> 
> Fix this with the following modifications:
> 
>  1) If data has to be copied from userspace, allocate a buffer and copy from
>     user first.
> 
>  2) Use copy_kernel_to_xstate() unconditionally so that header checking
>     works correctly.
> 
>  3) Return on error without corrupting the target state.
> 
> This prevents corrupting states and lets the caller deal with the problem
> it caused in the first place.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/xstate.h |    4 ---
>  arch/x86/kernel/fpu/regset.c      |   44 +++++++++++++++-----------------------
>  arch/x86/kernel/fpu/xstate.c      |   14 ++++++------
>  3 files changed, 26 insertions(+), 36 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

Nice!

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate()
  2021-06-18 14:18 ` [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate() Thomas Gleixner
@ 2021-06-21 10:00   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 10:00 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:35PM +0200, Thomas Gleixner wrote:
> Instead of masking out reserved bits, check them and reject the provided
> state as invalid if not zero.
> 
> Suggested-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Validate MXCSR when FP|SSE|YMM are set. The quirk check is only
>     correct for the copy function.
> V2: New patch
> ---
>  arch/x86/kernel/fpu/xstate.c |   19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values
  2021-06-18 14:18 ` [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values Thomas Gleixner
@ 2021-06-21 10:17   ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-21 10:17 UTC (permalink / raw)
  To: LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18 2021 at 16:18, Thomas Gleixner wrote:

> From: Andy Lutomirski <luto@kernel.org>
>
> There is no benefit from accepting and silently changing an invalid MXCSR
> value supplied via ptrace().  Instead, return -EINVAL on invalid input.
>
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V2: New patch. Picked up from Andy.
> ---
>  arch/x86/kernel/fpu/regset.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> ---
> --- a/arch/x86/kernel/fpu/regset.c
> +++ b/arch/x86/kernel/fpu/regset.c
> @@ -64,8 +64,9 @@ int xfpregs_set(struct task_struct *targ
>  	if (ret)
>  		return ret;
>  
> -	/* Mask invalid MXCSR bits (for historical reasons). */
> -	newstate.mxcsr &= mxcsr_feature_mask;
> +	/* Do not allow an invalid MXCSR value. */
> +	if (newstate.mxcsr & ~mxcsr_feature_mask)
> +		ret = -EINVAL;

This obviously needs to be:

               return -EINVAL;

/me goes to find a brown paperbag

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 14/66] x86/fpu: Rewrite xfpregs_set()
  2021-06-18 14:18 ` [patch V3 14/66] x86/fpu: Rewrite xfpregs_set() Thomas Gleixner
@ 2021-06-21 10:20   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 10:20 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:37PM +0200, Thomas Gleixner wrote:
> From: Andy Lutomirski <luto@kernel.org>
> 
> xfpregs_set() was incomprehensible.  Almost all of the complexity was due
> to trying to support nonsensically sized writes or -EFAULT errors that
> would have partially or completely overwritten the destination before
> failing.  Nonsensically sized input would only have been possible using
> PTRACE_SETREGSET on REGSET_XFP.  Fortunately, it appears (based on Debian
> code search results) that no one uses that API at all, let alone with the
> wrong sized buffer.  Failed user access can be handled more cleanly by
> first copying to kernel memory.
> 
> Just rewrite it to require sensible input.
> 
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V2: New patch picked up from Andy
> ---
>  arch/x86/kernel/fpu/regset.c |   40 +++++++++++++++++++++++++---------------
>  1 file changed, 25 insertions(+), 15 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/regset.c
> +++ b/arch/x86/kernel/fpu/regset.c
> @@ -47,30 +47,40 @@ int xfpregs_set(struct task_struct *targ
>  		const void *kbuf, const void __user *ubuf)
>  {
>  	struct fpu *fpu = &target->thread.fpu;
> +	struct user32_fxsr_struct newstate;
>  	int ret;
>  
> -	if (!boot_cpu_has(X86_FEATURE_FXSR))
> +	BUILD_BUG_ON(sizeof(newstate) != sizeof(struct fxregs_state));
> +
> +	if (!cpu_feature_enabled(X86_FEATURE_FXSR))
>  		return -ENODEV;
>  
> -	fpu__prepare_write(fpu);
> -	fpstate_sanitize_xstate(fpu);
> +	/* No funny business with partial or oversized writes is permitted. */
> +	if (pos != 0 || count != sizeof(newstate))
> +		return -EINVAL;
>  
>  	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> -				 &fpu->state.fxsave, 0, -1);
> +				 &newstate, 0, -1);

Like the last time: you can let that line stick out - it fits within 80
cols.

With that:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 16/66] x86/fpu: Clean up fpregs_set()
  2021-06-18 14:18 ` [patch V3 16/66] x86/fpu: Clean up fpregs_set() Thomas Gleixner
@ 2021-06-21 12:05   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 12:05 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:39PM +0200, Thomas Gleixner wrote:
> From: Andy Lutomirski <luto@kernel.org>
> 
> fpregs_set() has unnecessary complexity to support short or nonzero-offset
> writes and to handle the case in which a copy from userspace overwrites
> some of the target buffer and then fails.  Support for partial writes is
> useless -- just require that the write have offset 0 and the correct size,
> and copy into a temporary kernel buffer to avoid clobbering the state if
> the user access fails.
> 
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V2: New patch. Picked up from Andy
> ---
>  arch/x86/kernel/fpu/regset.c |   29 +++++++++++++++--------------
>  1 file changed, 15 insertions(+), 14 deletions(-)
> ---
> --- a/arch/x86/kernel/fpu/regset.c
> +++ b/arch/x86/kernel/fpu/regset.c
> @@ -305,31 +305,32 @@ int fpregs_set(struct task_struct *targe
>  	struct user_i387_ia32_struct env;
>  	int ret;
>  
> -	fpu__prepare_write(fpu);
> -	fpstate_sanitize_xstate(fpu);
> +	/* No funny business with partial or oversized writes is permitted. */
> +	if (pos != 0 || count != sizeof(struct user_i387_ia32_struct))
> +		return -EINVAL;
>  
> -	if (!boot_cpu_has(X86_FEATURE_FPU))
> +	if (!cpu_feature_enabled(X86_FEATURE_FPU))
>  		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
>  
> -	if (!boot_cpu_has(X86_FEATURE_FXSR))
> -		return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
> -					  &fpu->state.fsave, 0,
> -					  -1);
> +	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
> +	if (ret)
> +		return ret;
>  
> -	if (pos > 0 || count < sizeof(env))
> -		convert_from_fxsr(&env, target);
> +	fpu__prepare_write(fpu);
>  
> -	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
> -	if (!ret)
> +	if (cpu_feature_enabled(X86_FEATURE_FXSR))
>  		convert_to_fxsr(&target->thread.fpu.state.fxsave, &env);
> +	else
> +		memcpy(&target->thread.fpu.state.fsave, &env, sizeof(env));

You have above in the prologue:

	struct fpu *fpu = &target->thread.fpu;

so here you can just as well do:

        if (cpu_feature_enabled(X86_FEATURE_FXSR))
                convert_to_fxsr(&fpu->state.fxsave, &env);
        else
                memcpy(&fpu->state.fsave, &env, sizeof(env));

asm is identical.

With that:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get()
  2021-06-18 14:18 ` [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get() Thomas Gleixner
@ 2021-06-21 12:32   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 12:32 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:40PM +0200, Thomas Gleixner wrote:
> When xsave with init state optimization is used then a component's state
> in the task's xsave buffer can be stale when the corresponding feature bit
> is not set.
> 
> fpregs_get() and xfpregs_get() invoke fpstate_sanitize_xstate() to update
> the task's xsave buffer before retrieving the FX or FP state. That's just
> duplicated code as copy_xstate_to_kernel() already handles this correctly.
> 
> Add a copy mode argument to the function which allows to restrict the state
> copy to the FP and SSE features.
> 
> Also rename the function to copy_xstate_to_uabi_buf() so the name reflects
> what it is doing.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Rename to copy_xstate_to_uabi_buf() - Boris
> V2: New patch
> ---
>  arch/x86/include/asm/fpu/xstate.h |   12 +++++++++-
>  arch/x86/kernel/fpu/regset.c      |    2 -
>  arch/x86/kernel/fpu/xstate.c      |   42 ++++++++++++++++++++++++++++----------
>  3 files changed, 42 insertions(+), 14 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset
  2021-06-18 14:18 ` [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset Thomas Gleixner
@ 2021-06-21 13:26   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 13:26 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:44PM +0200, Thomas Gleixner wrote:
> The function can only be used from the regset get() callbacks safely. So
> there is no reason to have it globaly exposed.

"globally"

> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    1 -
>  arch/x86/kernel/fpu/core.c          |   20 --------------------
>  arch/x86/kernel/fpu/regset.c        |   22 +++++++++++++++++++---
>  3 files changed, 19 insertions(+), 24 deletions(-)

...

> --- a/arch/x86/kernel/fpu/regset.c
> +++ b/arch/x86/kernel/fpu/regset.c
> @@ -28,6 +28,22 @@ int regset_xregset_fpregs_active(struct
>  		return 0;
>  }
>  
> +/*
> + * The regset get() functions are invoked from:
> + *
> + *   - coredump to dump the current task's fpstate. If the current task
> + *     owns the FPU then the memory state has to be synchronized and the
> + *     FPU register state preserved. Otherwise fpstate is already in sync.
> + *
> + *   - ptrace to dump fpstate of a stopped task, in which case the register
									^

"registers"

With that:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset
  2021-06-18 14:18 ` [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset Thomas Gleixner
@ 2021-06-21 15:30   ` Borislav Petkov
  2021-06-21 20:15     ` Thomas Gleixner
  0 siblings, 1 reply; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 15:30 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:45PM +0200, Thomas Gleixner wrote:
> The only usecase for fpu__write_begin is the set() callback of regset, so
> the function is pointlessly global.
> 
> Move it to the regset code and rename it to fpu_force_restore() which is
> exactly decribing what the function does.

And makes the _set() callbacks a lot more readable, nice!

> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    1 -
>  arch/x86/kernel/fpu/core.c          |   24 ------------------------
>  arch/x86/kernel/fpu/regset.c        |   25 ++++++++++++++++++++++---
>  3 files changed, 22 insertions(+), 28 deletions(-)

...

> --- a/arch/x86/kernel/fpu/regset.c
> +++ b/arch/x86/kernel/fpu/regset.c
> @@ -44,6 +44,25 @@ static void fpu_sync_fpstate(struct fpu
>  		fpu__save(fpu);
>  }
>  
> +/*
> + * Invalidate cached FPU registers before modifying the stopped target
> + * task's fpstate.
> + *
> + * This forces the target task on resume to restore the FPU registers from
> + * modified fpstate. Otherwise the task might skip the restore and operate
> + * with the cached FPU registers which discards the modifications.
> + */
> +static void fpu_force_restore(struct fpu *fpu)
> +{
> +	/*
> +	 * Only stopped child tasks can be used to modify the FPU
> +	 * state in the fpstate buffer:
> +	 */
> +	WARN_ON_FPU(fpu == &current->thread.fpu);
> +
> +	__fpu_invalidate_fpregs_state(fpu);
> +}
> +
>  int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
>  		struct membuf to)
>  {
> @@ -89,7 +108,7 @@ int xfpregs_set(struct task_struct *targ
>  	if (newstate.mxcsr & ~mxcsr_feature_mask)
>  		ret = -EINVAL;
		^^^^^^^^^^^^^^

Don't forget to fix that thing, btw.

> -	fpu__prepare_write(fpu);
> +	fpu_force_restore(fpu);
>  
>  	/* Copy the state  */
>  	memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
> @@ -147,7 +166,7 @@ int xstateregs_set(struct task_struct *t
>  		}
>  	}
>  
> -	fpu__prepare_write(fpu);
> +	fpu_force_restore(fpu);
>  	ret = copy_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);

Ok, this here:

fpu_force_restore() will unconditionally invalidate the fpregs but the
following copy_kernel_to_xstate() call can return -EINVAL when the
xstate header validation fails or mxcsr has reserved bits set so we will
not have copied anything to the target thread.

Or do we say this is a slowpath so we don't care?

Thx.

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (65 preceding siblings ...)
  2021-06-18 14:19 ` [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init Thomas Gleixner
@ 2021-06-21 16:15 ` Yu, Yu-cheng
  2021-06-21 21:53 ` Fenghua Yu
                   ` (3 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Yu, Yu-cheng @ 2021-06-21 16:15 UTC (permalink / raw)
  To: Thomas Gleixner, LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

On 6/18/2021 7:18 AM, Thomas Gleixner wrote:
> The main parts of this series are:
> 
>    - Yet more bug fixes
> 
>    - Simplification and removal/replacement of redundant and/or
>      overengineered code.
> 
>    - Name space cleanup as the existing names were just a permanent source
>      of confusion.
> 
>    - Clear seperation of user ABI and kernel internal state handling.
> 
>    - Removal of PKRU from being XSTATE managed in the kernel because PKRU
>      has to be eagerly restored on context switch and keeping it in sync
>      in the xstate buffer is just pointless overhead and fragile.
> 
>      The kernel still XSAVEs PKRU on context switch but the value in the
>      buffer is not longer used and never restored from the buffer.
> 
>      This still needs to be cleaned up, but the series is already 40+
>      patches large and the cleanup of this is not a functional problem.
> 
>      The functional issues of PKRU management are fully addressed with the
>      series as is.
> 
>    - Cleanup of fpu signal restore
> 
>      - Make the fast path self contained. Handle #PF directly and skip
>        the slow path on any other exception as that will just end up
>        with the same result that the frame is invalid. This allows
>        the compiler to optimize the slow path out for 64bit kernels
>        w/o ia32 emulation.
> 
>      - Reduce code duplication and unnecessary operations
>        
> 
> It applies on top of
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git master
> 
> and is also available via git:
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu
> 
> This is a follow up to V2 which can be found here:
> 
>       https://lore.kernel.org/r/20210614154408.673478623@linutronix.de
> 
> Changes vs. V2:
> 
>    - Fixed the testing fallout (Dave, Kan)
> 
>    - Fixed a few issues found by myself when going through the lot
>      with a fine comb, especially MXCSR handling
> 
>    - Drop the FNSAVE optimizations
> 
>    - Cleanup of signal restore
> 
>    - Addressed review comments, mostly comments and a hopefully better
>      naming scheme which now just uses the instruction names and
>      consolidates everything else on save/restore so it's close to the way
>      how the hardware works.
> 
>    - A few cleanups and simplifications on the way (mostly regset related).
> 
>    - Picked up tags
> 
> With the above I'm not intending to do any further surgery on that
> code at the moment, though there is still room for improvement which
> can and has to be worked on when new bits are added.
> 
> Thanks,

Run all my tests again, and all pass.

Thanks,
Yu-cheng

> 
> 	tglx
> ---
>   arch/x86/events/intel/lbr.c          |    6
>   arch/x86/include/asm/fpu/internal.h  |  211 +++-------
>   arch/x86/include/asm/fpu/xstate.h    |   70 ++-
>   arch/x86/include/asm/pgtable.h       |   57 --
>   arch/x86/include/asm/pkeys.h         |    9
>   arch/x86/include/asm/pkru.h          |   62 +++
>   arch/x86/include/asm/processor.h     |    9
>   arch/x86/include/asm/special_insns.h |   14
>   arch/x86/kernel/cpu/common.c         |   34 -
>   arch/x86/kernel/fpu/core.c           |  276 +++++++------
>   arch/x86/kernel/fpu/init.c           |   15
>   arch/x86/kernel/fpu/regset.c         |  220 ++++++-----
>   arch/x86/kernel/fpu/signal.c         |  423 +++++++++------------
>   arch/x86/kernel/fpu/xstate.c         |  693 ++++++++++++++---------------------
>   arch/x86/kernel/process.c            |   22 -
>   arch/x86/kernel/process_64.c         |   28 +
>   arch/x86/kernel/traps.c              |    5
>   arch/x86/kvm/svm/sev.c               |    1
>   arch/x86/kvm/x86.c                   |   56 +-
>   arch/x86/mm/extable.c                |    2
>   arch/x86/mm/fault.c                  |    2
>   arch/x86/mm/pkeys.c                  |   22 -
>   include/linux/pkeys.h                |    4
>   23 files changed, 1060 insertions(+), 1181 deletions(-)
> 
>

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs()
  2021-06-18 14:18 ` [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs() Thomas Gleixner
@ 2021-06-21 18:00   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 18:00 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:50PM +0200, Thomas Gleixner wrote:
> The function names for xsave[s]/xrstor[s] operations are horribly named and
> a permanent source of confusion.
> 
> Rename:
> 	copy_xregs_to_kernel() to os_xsave()
> 	copy_kernel_to_xregs() to os_xrstor()
> 
> These are truly low level wrappers around the actual instructions
> XSAVE[OPT]/XRSTOR and XSAVES/XRSTORS with the twist that the selection
> based on the available CPU features happens with an alternative to avoid
> conditionals all over the place and to provide the best performance for hot
> pathes.

"paths".

You need more elisp magic here. :)

> @@ -385,7 +390,7 @@ extern int copy_fpregs_to_fpstate(struct
>  static inline void __copy_kernel_to_fpregs(union fpregs_state *fpstate, u64 mask)
>  {
>  	if (use_xsave()) {
> -		copy_kernel_to_xregs(&fpstate->xsave, mask);
> +		os_xrstor(&fpstate->xsave, mask);

Yeah, this reads funny now:

	if use xsave, then xrstor.

and then later

	if use xsave, then xsave.

where latter makes perfect sense but former makes you stop and think for
a bit.

:-)

Regardless, it is still move in the right direction.

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user()
  2021-06-18 14:18 ` [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user() Thomas Gleixner
@ 2021-06-21 19:44   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 19:44 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:51PM +0200, Thomas Gleixner wrote:
> The function names for xsave[s]/xrstor[s] operations are horribly named and
> a permanent source of confusion.
> 
> Rename:
> 	copy_xregs_to_user() to xsave_to_user_sigframe()
> 	copy_user_to_xregs() to xrstor_from_user_sigframe()
> 
> so it's entirely clear what this is about. This is also a clear indicator
> of the potentially different storage format because this is user ABI and
> cannot use compacted format.
> 
> No functional change.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    4 ++--
>  arch/x86/kernel/fpu/signal.c        |    4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset
  2021-06-21 15:30   ` Borislav Petkov
@ 2021-06-21 20:15     ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-21 20:15 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Mon, Jun 21 2021 at 17:30, Borislav Petkov wrote:
>> @@ -89,7 +108,7 @@ int xfpregs_set(struct task_struct *targ
>>  	if (newstate.mxcsr & ~mxcsr_feature_mask)
>>  		ret = -EINVAL;
> 		^^^^^^^^^^^^^^
>
> Don't forget to fix that thing, btw.

Fixed localy at the right spot already.

>> -	fpu__prepare_write(fpu);
>> +	fpu_force_restore(fpu);
>>  
>>  	/* Copy the state  */
>>  	memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate));
>> @@ -147,7 +166,7 @@ int xstateregs_set(struct task_struct *t
>>  		}
>>  	}
>>  
>> -	fpu__prepare_write(fpu);
>> +	fpu_force_restore(fpu);
>>  	ret = copy_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf);
>
> Ok, this here:
>
> fpu_force_restore() will unconditionally invalidate the fpregs but the
> following copy_kernel_to_xstate() call can return -EINVAL when the
> xstate header validation fails or mxcsr has reserved bits set so we will
> not have copied anything to the target thread.

Then the task has to restore FPU on the way to user space. Not a big
deal, it's traced - so what?

Thanks,

        tglx

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features
  2021-06-18 14:19 ` [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
@ 2021-06-21 20:42   ` Liang, Kan
  2021-06-22 11:32   ` Borislav Petkov
  1 sibling, 0 replies; 133+ messages in thread
From: Liang, Kan @ 2021-06-21 20:42 UTC (permalink / raw)
  To: Thomas Gleixner, LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra



On 6/18/2021 10:19 AM, Thomas Gleixner wrote:
> The copy functions for the independent features are horribly named and the
> supervisor and independent part is just overengineered.
> 
> The point is that the supplied mask has either to be a subset of the
> independent feature or a subset of the task->fpu.xstate managed features.
> 
> Rewrite it so it checks check for invalid overlaps of these areas in the
> caller supplied feature mask. Rename it so it follows the new naming
> convention for these operations. Mop up the function documentation.
> 
> This allows to use that function for other purposes as well.
> 
> Suggested-by: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Kan Liang <kan.liang@linux.intel.com>
> ---


I have tested the LBR Xsave feature. Everything looks good.

Tested-by: Kan Liang <kan.liang@linux.intel.com>

Thanks,
Kan

> V3: Rename
> ---
>   arch/x86/events/intel/lbr.c       |    6 +-
>   arch/x86/include/asm/fpu/xstate.h |    5 +-
>   arch/x86/kernel/fpu/xstate.c      |   93 +++++++++++++++++++-------------------
>   3 files changed, 53 insertions(+), 51 deletions(-)
> 
> --- a/arch/x86/events/intel/lbr.c
> +++ b/arch/x86/events/intel/lbr.c
> @@ -491,7 +491,7 @@ static void intel_pmu_arch_lbr_xrstors(v
>   {
>   	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
>   
> -	copy_kernel_to_independent_supervisor(&task_ctx->xsave, XFEATURE_MASK_LBR);
> +	xrstors(&task_ctx->xsave, XFEATURE_MASK_LBR);
>   }
>   
>   static __always_inline bool lbr_is_reset_in_cstate(void *ctx)
> @@ -576,7 +576,7 @@ static void intel_pmu_arch_lbr_xsaves(vo
>   {
>   	struct x86_perf_task_context_arch_lbr_xsave *task_ctx = ctx;
>   
> -	copy_independent_supervisor_to_kernel(&task_ctx->xsave, XFEATURE_MASK_LBR);
> +	xsaves(&task_ctx->xsave, XFEATURE_MASK_LBR);
>   }
>   
>   static void __intel_pmu_lbr_save(void *ctx)
> @@ -992,7 +992,7 @@ static void intel_pmu_arch_lbr_read_xsav
>   		intel_pmu_store_lbr(cpuc, NULL);
>   		return;
>   	}
> -	copy_independent_supervisor_to_kernel(&xsave->xsave, XFEATURE_MASK_LBR);
> +	xsaves(&xsave->xsave, XFEATURE_MASK_LBR);
>   
>   	intel_pmu_store_lbr(cpuc, xsave->lbr.entries);
>   }
> --- a/arch/x86/include/asm/fpu/xstate.h
> +++ b/arch/x86/include/asm/fpu/xstate.h
> @@ -104,8 +104,9 @@ void *get_xsave_addr(struct xregs_state
>   int xfeature_size(int xfeature_nr);
>   int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf);
>   int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf);
> -void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask);
> -void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask);
> +
> +void xsaves(struct xregs_state *xsave, u64 mask);
> +void xrstors(struct xregs_state *xsave, u64 mask);
>   
>   enum xstate_copy_mode {
>   	XSTATE_COPY_FP,
> --- a/arch/x86/kernel/fpu/xstate.c
> +++ b/arch/x86/kernel/fpu/xstate.c
> @@ -1163,75 +1163,76 @@ int copy_sigframe_from_user_to_xstate(st
>   }
>   
>   /**
> - * copy_independent_supervisor_to_kernel() - Save independent supervisor states to
> - *                                           an xsave area
> - * @xstate: A pointer to an xsave area
> - * @mask: Represent the independent supervisor features saved into the xsave area
> + * xsaves - Save selected components to a kernel xstate buffer
> + * @xstate:	Pointer to the buffer
> + * @mask:	Feature mask to select the components to save
>    *
> - * Only the independent supervisor states sets in the mask are saved into the xsave
> - * area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of independent
> - * supervisor feature). Besides the independent supervisor states, the legacy
> - * region and XSAVE header are also saved into the xsave area. The supervisor
> - * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
> - * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved.
> + * The @xstate buffer must be 64 byte aligned and correctly initialized as
> + * XSAVES does not write the full xstate header. Before first use the
> + * buffer should be zeroed otherwise a consecutive XRSTORS from that buffer
> + * can #GP.
>    *
> - * The xsave area must be 64-bytes aligned.
> + * The feature mask must either be a subset of the independent features or
> + * a subset of the task->fpstate related features
>    */
> -void copy_independent_supervisor_to_kernel(struct xregs_state *xstate, u64 mask)
> +void xsaves(struct xregs_state *xstate, u64 mask)
>   {
> -	u64 independent_mask = xfeatures_mask_independent() & mask;
> -	u32 lmask, hmask;
> +	u64 xchk;
>   	int err;
>   
> -	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
> +	if (WARN_ON_FPU(!cpu_feature_enabled(X86_FEATURE_XSAVES)))
>   		return;
> +	/*
> +	 * Validate that this is either a task->fpstate related component
> +	 * subset or an independent one.
> +	 */
> +	if (mask & xfeatures_mask_independent())
> +		xchk = ~xfeatures_mask_independent();
> +	else
> +		xchk = ~xfeatures_mask_all;
>   
> -	if (WARN_ON_FPU(!independent_mask))
> +	if (WARN_ON_ONCE(!mask || mask & xchk))
>   		return;
>   
> -	lmask = independent_mask;
> -	hmask = independent_mask >> 32;
> -
> -	XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
> -
> -	/* Should never fault when copying to a kernel buffer */
> -	WARN_ON_FPU(err);
> +	XSTATE_OP(XSAVES, xstate, (u32)mask, (u32)(mask >> 32), err);
> +	WARN_ON_ONCE(err);
>   }
>   
>   /**
> - * copy_kernel_to_independent_supervisor() - Restore independent supervisor states from
> - *                                           an xsave area
> - * @xstate: A pointer to an xsave area
> - * @mask: Represent the independent supervisor features restored from the xsave area
> + * xrstors - Restore selected components from a kernel xstate buffer
> + * @xstate:	Pointer to the buffer
> + * @mask:	Feature mask to select the components to restore
> + *
> + * The @xstate buffer must be 64 byte aligned and correctly initialized
> + * otherwise XRSTORS from that buffer can #GP.
>    *
> - * Only the independent supervisor states sets in the mask are restored from the
> - * xsave area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of
> - * independent supervisor feature). Besides the independent supervisor states, the
> - * legacy region and XSAVE header are also restored from the xsave area. The
> - * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
> - * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored.
> + * Proper usage is to restore the state which was saved with
> + * xsaves() into @xstate.
>    *
> - * The xsave area must be 64-bytes aligned.
> + * The feature mask must either be a subset of the independent features or
> + * a subset of the task->fpstate related features
>    */
> -void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask)
> +void xrstors(struct xregs_state *xstate, u64 mask)
>   {
> -	u64 independent_mask = xfeatures_mask_independent() & mask;
> -	u32 lmask, hmask;
> +	u64 xchk;
>   	int err;
>   
> -	if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES)))
> +	if (WARN_ON_FPU(!cpu_feature_enabled(X86_FEATURE_XSAVES)))
>   		return;
> +	/*
> +	 * Validate that this is either a task->fpstate related component
> +	 * subset or an independent one.
> +	 */
> +	if (mask & xfeatures_mask_independent())
> +		xchk = ~xfeatures_mask_independent();
> +	else
> +		xchk = ~xfeatures_mask_all;
>   
> -	if (WARN_ON_FPU(!independent_mask))
> +	if (WARN_ON_ONCE(!mask || mask & xchk))
>   		return;
>   
> -	lmask = independent_mask;
> -	hmask = independent_mask >> 32;
> -
> -	XSTATE_OP(XRSTORS, xstate, lmask, hmask, err);
> -
> -	/* Should never fault when copying from a kernel buffer */
> -	WARN_ON_FPU(err);
> +	XSTATE_OP(XRSTORS, xstate, (u32)mask, (u32)(mask >> 32), err);
> +	WARN_ON_ONCE(err);
>   }
>   
>   #ifdef CONFIG_PROC_PID_ARCH_STATUS
> 

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (66 preceding siblings ...)
  2021-06-21 16:15 ` [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Yu, Yu-cheng
@ 2021-06-21 21:53 ` Fenghua Yu
  2021-06-21 22:22 ` Bae, Chang Seok
                   ` (2 subsequent siblings)
  70 siblings, 0 replies; 133+ messages in thread
From: Fenghua Yu @ 2021-06-21 21:53 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Hi, X86 maintainers,

On Fri, Jun 18, 2021 at 04:18:23PM +0200, Thomas Gleixner wrote:
> The main parts of this series are:
> 
>   - Yet more bug fixes
...
> and is also available via git:
>   git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu
...
> Changes vs. V2:
...

After reverting the disabling PASID patch, resolving one PKRU conflict, and
porting the latest internal IDXD patches to this series, I can run stress
PASID context switch tests on this series (and v2 as well). I don't see any
issue for PASID context switch.

Also thank you very much for moving the PASID feature forward.

-Fenghua

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (67 preceding siblings ...)
  2021-06-21 21:53 ` Fenghua Yu
@ 2021-06-21 22:22 ` Bae, Chang Seok
  2021-06-22 20:02   ` Bae, Chang Seok
  2021-06-22  1:59 ` Oliver Sang
  2021-06-22 18:56 ` Dey, Megha
  70 siblings, 1 reply; 133+ messages in thread
From: Bae, Chang Seok @ 2021-06-21 22:22 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Yu, Fenghua, Luck, Tony, Yu,
	Yu-cheng, Sebastian Andrzej Siewior, Borislav Petkov,
	Peter Zijlstra, Kan Liang

On Jun 18, 2021, at 07:18, Thomas Gleixner <tglx@linutronix.de> wrote:
> 
> It applies on top of
> 
>  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git master
> 
> and is also available via git:
> 
>  git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu

I tried to apply AMX patches on top of this. The test looks to be okay by far.
I will also give an update here if I find anything.

Thanks,
Chang

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 29/66] x86/fpu: Rename fxregs related copy functions
  2021-06-18 14:18 ` [patch V3 29/66] x86/fpu: Rename fxregs related copy functions Thomas Gleixner
@ 2021-06-21 23:00   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-21 23:00 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:52PM +0200, Thomas Gleixner wrote:
> The function names for fxsave/fxrstor operations are horribly named and
> a permanent source of confusion.
> 
> Rename:
> 	copy_fxregs_to_kernel() to fxsave()
> 	copy_kernel_to_fxregs() to fxrstor()
> 	copy_fxregs_to_user() to fxsave_to_user_sigframe()
> 	copy_user_to_fxregs() to fxrstor_from_user_sigframe()
> 
> so it's clear what these are doing. All these functions are really low
> level wrappers around the equaly named instructions, so mapping to the
> documentation is just natural.
> 
> While at it replace the static_cpu_has(X86_FEATURE_FXSR) with use_fxsr() to
> be consistent with the rest of the code.

I think you mean with this...

> --- a/arch/x86/kernel/fpu/core.c
> +++ b/arch/x86/kernel/fpu/core.c
> @@ -107,7 +107,7 @@ int copy_fpregs_to_fpstate(struct fpu *f
>  	}
>  
>  	if (likely(use_fxsr())) {
> -		copy_fxregs_to_kernel(fpu);
> +		fxsave(&fpu->state.fxsave);
>  		return 1;
>  	}
>  
> @@ -360,7 +360,7 @@ static inline void copy_init_fpstate_to_
>  	if (use_xsave())
>  		os_xrstor(&init_fpstate.xsave, features_mask);
>  	else if (static_cpu_has(X86_FEATURE_FXSR))
> -		copy_kernel_to_fxregs(&init_fpstate.fxsave);
> +		fxrstor(&init_fpstate.fxsave);
>  	else
>  		copy_kernel_to_fregs(&init_fpstate.fsave);
>  

... this else if branch here. IOW, it should be:

	...
	else if (use_fxsr())
		fxrstor(&init_fpstate.fxsave);

		...


Gnight!

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (68 preceding siblings ...)
  2021-06-21 22:22 ` Bae, Chang Seok
@ 2021-06-22  1:59 ` Oliver Sang
  2021-06-22  9:08   ` Thomas Gleixner
  2021-06-22 18:56 ` Dey, Megha
  70 siblings, 1 reply; 133+ messages in thread
From: Oliver Sang @ 2021-06-22  1:59 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Yu, Fenghua, Luck, Tony, Yu,
	Yu-cheng, Sebastian Andrzej Siewior, Borislav Petkov,
	Peter Zijlstra, Kan Liang, Li, Aubrey, Xing, Zhengjun, Tang,
	Feng, Liu, Yujie, Si, Beibei, Li, Philip, Du, Julie

Hi Thomas,

On Fri, Jun 18, 2021 at 10:18:23PM +0800, Thomas Gleixner wrote:
> The main parts of this series are:
> 
>   - Yet more bug fixes
> 
>   - Simplification and removal/replacement of redundant and/or
>     overengineered code.
> 
>   - Name space cleanup as the existing names were just a permanent source
>     of confusion.
> 
>   - Clear seperation of user ABI and kernel internal state handling.
> 
>   - Removal of PKRU from being XSTATE managed in the kernel because PKRU
>     has to be eagerly restored on context switch and keeping it in sync
>     in the xstate buffer is just pointless overhead and fragile.
> 
>     The kernel still XSAVEs PKRU on context switch but the value in the
>     buffer is not longer used and never restored from the buffer.
> 
>     This still needs to be cleaned up, but the series is already 40+
>     patches large and the cleanup of this is not a functional problem.
> 
>     The functional issues of PKRU management are fully addressed with the
>     series as is.
> 
>   - Cleanup of fpu signal restore
> 
>     - Make the fast path self contained. Handle #PF directly and skip
>       the slow path on any other exception as that will just end up
>       with the same result that the frame is invalid. This allows
>       the compiler to optimize the slow path out for 64bit kernels
>       w/o ia32 emulation.
> 
>     - Reduce code duplication and unnecessary operations
> 
> 
> It applies on top of
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git master
> 
> and is also available via git:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu

0-Day kernel CI tested this branch from performance view,
choosing some sub-tests from will-it-scale (detail as below), since we
thought if the branch has the impact of fpu ops, will-it-scale should be
able to catch it.
we also plan to add stress-ng for new round test.
could you suggest if any other suitable test suites? and what's the most
proper sub-tests in will-it-scale and stress-ng?

Test Summary
============
no obvious will-it-scale performance changes found so far

Test Environment
================
https://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git/log/?h=x86/fpu
* 0619677ee36c3 (tglx-devel/x86/fpu) x86/fpu/signal: Let xrstor handle the features to init   <----- the tip we tested
* a114fd9946c28 x86/fpu/signal: Handle #PF in the direct restore path
* 73e26fdd0cf1c x86/fpu: Return proper error codes from user access functions
...
* 63bf804bfa6b0 x86/fpu: Make init_fpstate correct with optimized XSAVE
* 6db8e02d5e932 x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate()
*   4fe93c2272dbb Merge branch 'x86/fpu' of ../tip into x86/fpu    <----- the base we compared
|\
| * b7c11876d24bd (tip/x86/fpu, peterz-queue/x86/fpu) selftests/x86: Test signal frame XSTATE header corruption handling

64bit kernel testing, upon below platform:
model: Cascade Lake
Intel(R) Xeon(R) Gold 6238M CPU @ 2.10GHz
nr_node: 2
nr_cpu: 88
memory: 128G


32bit kernel testing, upon below platform:
Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz
model: Ivy Bridge
nr_node: 1
nr_cpu: 8
memory: 16G


tested below test suites:
will-it-scale-performance-context_switch1
will-it-scale-performance-page_fault1
will-it-scale-performance-poll1
will-it-scale-performance-pthread_mutex1
will-it-scale-performance-writeseek1



> 
> This is a follow up to V2 which can be found here:
> 
>      https://lore.kernel.org/r/20210614154408.673478623@linutronix.de
> 
> Changes vs. V2:
> 
>   - Fixed the testing fallout (Dave, Kan)
> 
>   - Fixed a few issues found by myself when going through the lot
>     with a fine comb, especially MXCSR handling
> 
>   - Drop the FNSAVE optimizations
> 
>   - Cleanup of signal restore
> 
>   - Addressed review comments, mostly comments and a hopefully better
>     naming scheme which now just uses the instruction names and
>     consolidates everything else on save/restore so it's close to the way
>     how the hardware works.
> 
>   - A few cleanups and simplifications on the way (mostly regset related).
> 
>   - Picked up tags
> 
> With the above I'm not intending to do any further surgery on that
> code at the moment, though there is still room for improvement which
> can and has to be worked on when new bits are added.
> 
> Thanks,
> 
>         tglx
> ---
>  arch/x86/events/intel/lbr.c          |    6
>  arch/x86/include/asm/fpu/internal.h  |  211 +++-------
>  arch/x86/include/asm/fpu/xstate.h    |   70 ++-
>  arch/x86/include/asm/pgtable.h       |   57 --
>  arch/x86/include/asm/pkeys.h         |    9
>  arch/x86/include/asm/pkru.h          |   62 +++
>  arch/x86/include/asm/processor.h     |    9
>  arch/x86/include/asm/special_insns.h |   14
>  arch/x86/kernel/cpu/common.c         |   34 -
>  arch/x86/kernel/fpu/core.c           |  276 +++++++------
>  arch/x86/kernel/fpu/init.c           |   15
>  arch/x86/kernel/fpu/regset.c         |  220 ++++++-----
>  arch/x86/kernel/fpu/signal.c         |  423 +++++++++------------
>  arch/x86/kernel/fpu/xstate.c         |  693 ++++++++++++++---------------------
>  arch/x86/kernel/process.c            |   22 -
>  arch/x86/kernel/process_64.c         |   28 +
>  arch/x86/kernel/traps.c              |    5
>  arch/x86/kvm/svm/sev.c               |    1
>  arch/x86/kvm/x86.c                   |   56 +-
>  arch/x86/mm/extable.c                |    2
>  arch/x86/mm/fault.c                  |    2
>  arch/x86/mm/pkeys.c                  |   22 -
>  include/linux/pkeys.h                |    4
>  23 files changed, 1060 insertions(+), 1181 deletions(-)
> 
> 

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-22  1:59 ` Oliver Sang
@ 2021-06-22  9:08   ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-22  9:08 UTC (permalink / raw)
  To: Oliver Sang
  Cc: LKML, Andy Lutomirski, Dave Hansen, Yu, Fenghua, Luck, Tony, Yu,
	Yu-cheng, Sebastian Andrzej Siewior, Borislav Petkov,
	Peter Zijlstra, Kan Liang, Li, Aubrey, Xing, Zhengjun, Tang,
	Feng, Liu, Yujie, Si, Beibei, Li, Philip, Du, Julie

Oliver,

On Tue, Jun 22 2021 at 09:59, Oliver Sang wrote:
> On Fri, Jun 18, 2021 at 10:18:23PM +0800, Thomas Gleixner wrote:
>>   git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu
>
> 0-Day kernel CI tested this branch from performance view,
> choosing some sub-tests from will-it-scale (detail as below), since we
> thought if the branch has the impact of fpu ops, will-it-scale should be
> able to catch it.
> we also plan to add stress-ng for new round test.
> could you suggest if any other suitable test suites? and what's the most
> proper sub-tests in will-it-scale and stress-ng?

Hard to tell. Anything scheduling heavy will exercise these code paths.

Thanks,

        tglx

        

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 30/66] x86/fpu: Rename fregs related copy functions
  2021-06-18 14:18 ` [patch V3 30/66] x86/fpu: Rename fregs " Thomas Gleixner
@ 2021-06-22  9:31   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22  9:31 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:53PM +0200, Thomas Gleixner wrote:
> The function names for fnsave/fnrstor operations are horribly named and
> a permanent source of confusion.
> 
> Rename:
> 	copy_fregs_to_kernel() to fnsave()

That first one is not existant.

> 	copy_kernel_to_fregs() to fnrstor()

				frstor() - no "n"

> 	copy_fregs_to_user()   to fnsave_to_user_sigframe()
> 	copy_user_to_fregs()   to fnrstor_from_user_sigframe()
> 
> so it's clear what these are doing. All these functions are really low
> level wrappers around the equaly named instructions, so mapping to the
> documentation is just natural.
> 
> No functional change.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Rename (Boris)
> ---
>  arch/x86/include/asm/fpu/internal.h |   10 +++++-----
>  arch/x86/kernel/fpu/core.c          |    2 +-
>  arch/x86/kernel/fpu/signal.c        |    6 +++---
>  3 files changed, 9 insertions(+), 9 deletions(-)

Regardless, above is just nitpicks.

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI
  2021-06-18 14:18 ` [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI Thomas Gleixner
@ 2021-06-22  9:38   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22  9:38 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:54PM +0200, Thomas Gleixner wrote:
> Rename them to reflect that these functions deal with user space format
> XSAVE buffers.
> 
>       copy_kernel_to_xstate() -> copy_uabi_from_kernel_to_xstate()
>       copy_user_to_xstate()   -> copy_sigframe_from_user_to_xstate()
> 
> Again a clear statement that these functions deal with user space ABI.
> 
> Suggested-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/xstate.h |    4 ++--
>  arch/x86/kernel/fpu/regset.c      |    2 +-
>  arch/x86/kernel/fpu/signal.c      |    2 +-
>  arch/x86/kernel/fpu/xstate.c      |    5 +++--
>  4 files changed, 7 insertions(+), 6 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate()
  2021-06-18 14:18 ` [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate() Thomas Gleixner
@ 2021-06-22 10:09   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 10:09 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:55PM +0200, Thomas Gleixner wrote:
> copy_uabi_from_user_to_xstate() and copy_uabi_from_kernel_to_xstate() are
> almost identical except for the copy function.
> 
> Unify them.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Acked-by: Andy Lutomirski <luto@kernel.org>
> ---
> V3: Fixed MXCSR thinkos and simplified the handling of MXCSR
> ---
>  arch/x86/kernel/fpu/xstate.c |  137 ++++++++++++++-----------------------------
>  1 file changed, 47 insertions(+), 90 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate()
  2021-06-18 14:18 ` [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate() Thomas Gleixner
@ 2021-06-22 10:16   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 10:16 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:56PM +0200, Thomas Gleixner wrote:
> A copy is guaranteed to leave the source intact, which is not the case when
> FNSAVE is used as that reinitilizes the registers.
> 
> Save does not make such guarantees and it matches what this is about,
> i.e. to save the state for a later restore.
> 
> Rename it to save_fpregs_to_fpstate(). 
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    4 ++--
>  arch/x86/kernel/fpu/core.c          |   10 +++++-----
>  arch/x86/kvm/x86.c                  |    2 +-
>  3 files changed, 8 insertions(+), 8 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization
  2021-06-18 14:18 ` [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization Thomas Gleixner
@ 2021-06-22 10:36   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 10:36 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:57PM +0200, Thomas Gleixner wrote:
> The FNSAVE support requires conditionals in quite some call paths because
> FNSAVE reinitialized the FPU hardware. If the save has to preserve the FPU

reinitializes

> register state then the caller has to conditionally restore it from memory
> when FNSAVE is in use.
> 
> This also requires a conditional in context switch because the restore
> avoidance optimization cannot work with FNSAVE. As this only affects 20+
> years old CPUs there is really no reason to keep this optimization
> effective for FNSAVE. It's about time to not optimize for antiques anymore.
> 
> Just unconditionally FRSTOR the save content to the registers and clean up
> the conditionals all over the place.
> 
> Suggested-by: Dave Hansen <dave.hansen@linux.intel.com>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: New patch
> ---
>  arch/x86/include/asm/fpu/internal.h |   17 +++++++----
>  arch/x86/kernel/fpu/core.c          |   54 +++++++++++++++---------------------
>  2 files changed, 34 insertions(+), 37 deletions(-)
> 
> --- a/arch/x86/include/asm/fpu/internal.h
> +++ b/arch/x86/include/asm/fpu/internal.h
> @@ -375,7 +375,7 @@ static inline int os_xrstor_safe(struct
>  	return err;
>  }
>  
> -extern int save_fpregs_to_fpstate(struct fpu *fpu);
> +extern void save_fpregs_to_fpstate(struct fpu *fpu);

You can move that stray forward declaration up, to the others.

...

> --- a/arch/x86/kernel/fpu/core.c
> +++ b/arch/x86/kernel/fpu/core.c
> @@ -83,16 +83,20 @@ bool irq_fpu_usable(void)
>  EXPORT_SYMBOL(irq_fpu_usable);
>  
>  /*
> - * These must be called with preempt disabled. Returns
> - * 'true' if the FPU state is still intact and we can
> - * keep registers active.
> + * Save the FPU register state in fpu->state. The register state is
> + * preserved.
>   *
> - * The legacy FNSAVE instruction cleared all FPU state
> - * unconditionally, so registers are essentially destroyed.
> - * Modern FPU state can be kept in registers, if there are
> - * no pending FP exceptions.
> + * Must be called with fpregs_lock() held.
> + *
> + * The legacy FNSAVE instruction clears all FPU state unconditionally, so
> + * register state has to be reloaded. That might be a pointless exercise
> + * when the FPU is going to be used by another task right after that. But
> + * this only affect 20+ years old 32bit systems and avoids conditionals all

affects

> + * over the place.
> + *
> + * FXSAVE and all XSAVE variants preserve the FPU register state.
>   */
> -int save_fpregs_to_fpstate(struct fpu *fpu)
> +void save_fpregs_to_fpstate(struct fpu *fpu)

With that addressed:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel()
  2021-06-18 14:18 ` [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel() Thomas Gleixner
@ 2021-06-22 10:46   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 10:46 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:58PM +0200, Thomas Gleixner wrote:

> Subject: Re: [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel()

... to restore_fpregs_from_fpstate"


> This is not a copy functionality. It restores the register state from the
> supplied kernel buffer.

"No functional changes."

> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    8 ++++----
>  arch/x86/kvm/x86.c                  |    4 ++--
>  arch/x86/mm/extable.c               |    2 +-
>  3 files changed, 7 insertions(+), 7 deletions(-)

with that:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 36/66] x86/fpu: Rename initstate copy functions
  2021-06-18 14:18 ` [patch V3 36/66] x86/fpu: Rename initstate copy functions Thomas Gleixner
@ 2021-06-22 10:48   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 10:48 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:18:59PM +0200, Thomas Gleixner wrote:
> Again this not a copy. It's loading register state.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/core.c |    6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/core.c
> +++ b/arch/x86/kernel/fpu/core.c
> @@ -303,7 +303,7 @@ void fpu__drop(struct fpu *fpu)
>   * Clear FPU registers by setting them up from the init fpstate.
>   * Caller must do fpregs_[un]lock() around it.
>   */
> -static inline void copy_init_fpstate_to_fpregs(u64 features_mask)
> +static inline void load_fpregs_from_init_fpstate(u64 features_mask)
>  {
>  	if (use_xsave())
>  		os_xrstor(&init_fpstate.xsave, features_mask);
> @@ -338,9 +338,9 @@ static void fpu__clear(struct fpu *fpu,
>  		if (!fpregs_state_valid(fpu, smp_processor_id()) &&
>  		    xfeatures_mask_supervisor())
>  			os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
> -		copy_init_fpstate_to_fpregs(xfeatures_mask_user());
> +		load_fpregs_from_init_fpstate(xfeatures_mask_user());
>  	} else {
> -		copy_init_fpstate_to_fpregs(xfeatures_mask_all);
> +		load_fpregs_from_init_fpstate(xfeatures_mask_all);
>  	}

"load"?

I think you want "restore" here in accordance with the new convention,
like with the previous patch.

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent"
  2021-06-18 14:19 ` [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent" Thomas Gleixner
@ 2021-06-22 11:05   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 11:05 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:00PM +0200, Thomas Gleixner wrote:
> --- a/arch/x86/include/asm/fpu/xstate.h
> +++ b/arch/x86/include/asm/fpu/xstate.h
> @@ -56,7 +56,7 @@
>   * - Don't set the bit corresponding to the dynamic supervisor feature in
>   *   IA32_XSS at run time, since it has been set at boot time.
>   */
> -#define XFEATURE_MASK_DYNAMIC (XFEATURE_MASK_LBR)
> +#define XFEATURE_MASK_INDEPENDENT (XFEATURE_MASK_LBR)

Yah, you kinda missed all those "dynamic" in the comment here explaining
what this mask means.

Do a

$ git grep dynamic arch/x86/

after renaming to make sure you've caught them all.

> @@ -1199,34 +1199,34 @@ void copy_dynamic_supervisor_to_kernel(s
>  }
>  
>  /**
> - * copy_kernel_to_dynamic_supervisor() - Restore dynamic supervisor states from
> - *                                       an xsave area
> + * copy_kernel_to_independent_supervisor() - Restore independent supervisor states from
> + *                                           an xsave area
>   * @xstate: A pointer to an xsave area
> - * @mask: Represent the dynamic supervisor features restored from the xsave area
> + * @mask: Represent the independent supervisor features restored from the xsave area
>   *
> - * Only the dynamic supervisor states sets in the mask are restored from the
> - * xsave area (See the comment in XFEATURE_MASK_DYNAMIC for the details of
> - * dynamic supervisor feature). Besides the dynamic supervisor states, the
> + * Only the independent supervisor states sets in the mask are restored from the
> + * xsave area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of
> + * independent supervisor feature). Besides the independent supervisor states, the
>   * legacy region and XSAVE header are also restored from the xsave area. The
>   * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
>   * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored.
>   *
>   * The xsave area must be 64-bytes aligned.
>   */
> -void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask)
> +void copy_kernel_to_independent_supervisor(struct xregs_state *xstate, u64 mask)

Well, can't say I'm crazy about the naming which is a mouthful and
reminds me of an "independent supervisor", i.e., like some United
Nations thing.

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features
  2021-06-18 14:19 ` [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
  2021-06-21 20:42   ` Liang, Kan
@ 2021-06-22 11:32   ` Borislav Petkov
  1 sibling, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 11:32 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:01PM +0200, Thomas Gleixner wrote:
> The copy functions for the independent features are horribly named and the
> supervisor and independent part is just overengineered.
> 
> The point is that the supplied mask has either to be a subset of the
> independent feature or a subset of the task->fpu.xstate managed features.

features

> Rewrite it so it checks check for invalid overlaps of these areas in the

s/ check//

> caller supplied feature mask. Rename it so it follows the new naming
> convention for these operations. Mop up the function documentation.
> 
> This allows to use that function for other purposes as well.
> 
> Suggested-by: Peter Zijlstra <peterz@infradead.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Kan Liang <kan.liang@linux.intel.com>
> ---
> V3: Rename
> ---
>  arch/x86/events/intel/lbr.c       |    6 +-
>  arch/x86/include/asm/fpu/xstate.h |    5 +-
>  arch/x86/kernel/fpu/xstate.c      |   93 +++++++++++++++++++-------------------
>  3 files changed, 53 insertions(+), 51 deletions(-)

...

>  /**
> - * copy_independent_supervisor_to_kernel() - Save independent supervisor states to
> - *                                           an xsave area
> - * @xstate: A pointer to an xsave area
> - * @mask: Represent the independent supervisor features saved into the xsave area
> + * xsaves - Save selected components to a kernel xstate buffer
> + * @xstate:	Pointer to the buffer
> + * @mask:	Feature mask to select the components to save
>   *
> - * Only the independent supervisor states sets in the mask are saved into the xsave
> - * area (See the comment in XFEATURE_MASK_INDEPENDENT for the details of independent
> - * supervisor feature). Besides the independent supervisor states, the legacy
> - * region and XSAVE header are also saved into the xsave area. The supervisor
> - * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and
> - * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved.
> + * The @xstate buffer must be 64 byte aligned and correctly initialized as
> + * XSAVES does not write the full xstate header. Before first use the
> + * buffer should be zeroed otherwise a consecutive XRSTORS from that buffer
> + * can #GP.
>   *
> - * The xsave area must be 64-bytes aligned.
> + * The feature mask must either be a subset of the independent features or
> + * a subset of the task->fpstate related features
						    ^
						    Fullstop.

In the corresponding sentence for xrstors() too.

Btw, looking at how almost identical the two are, they're kinda begging
for a common worker function __x_handle_supervisor() or so which is
called by xsaves() and xrstors(). But maybe later.

With the above nitpicks addressed:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* [tip: x86/urgent] x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate()
  2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
  2021-06-19  8:34   ` Borislav Petkov
@ 2021-06-22 11:45   ` tip-bot2 for Thomas Gleixner
  1 sibling, 0 replies; 133+ messages in thread
From: tip-bot2 for Thomas Gleixner @ 2021-06-22 11:45 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: Thomas Gleixner, Borislav Petkov, stable, x86, linux-kernel

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     9301982c424a003c0095bf157154a85bf5322bd0
Gitweb:        https://git.kernel.org/tip/9301982c424a003c0095bf157154a85bf5322bd0
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Fri, 18 Jun 2021 16:18:24 +02:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 22 Jun 2021 10:51:23 +02:00

x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate()

sanitize_restored_user_xstate() preserves the supervisor states only
when the fx_only argument is zero, which allows unprivileged user space
to put supervisor states back into init state.

Preserve them unconditionally.

 [ bp: Fix a typo or two in the text. ]

Fixes: 5d6b6a6f9b5c ("x86/fpu/xstate: Update sanitize_restored_xstate() for supervisor xstates")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20210618143444.438635017@linutronix.de
---
 arch/x86/kernel/fpu/signal.c | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
index ec3ae30..b7b92cd 100644
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -221,28 +221,18 @@ sanitize_restored_user_xstate(union fpregs_state *state,
 
 	if (use_xsave()) {
 		/*
-		 * Note: we don't need to zero the reserved bits in the
-		 * xstate_header here because we either didn't copy them at all,
-		 * or we checked earlier that they aren't set.
+		 * Clear all feature bits which are not set in
+		 * user_xfeatures and clear all extended features
+		 * for fx_only mode.
 		 */
+		u64 mask = fx_only ? XFEATURE_MASK_FPSSE : user_xfeatures;
 
 		/*
-		 * 'user_xfeatures' might have bits clear which are
-		 * set in header->xfeatures. This represents features that
-		 * were in init state prior to a signal delivery, and need
-		 * to be reset back to the init state.  Clear any user
-		 * feature bits which are set in the kernel buffer to get
-		 * them back to the init state.
-		 *
-		 * Supervisor state is unchanged by input from userspace.
-		 * Ensure supervisor state bits stay set and supervisor
-		 * state is not modified.
+		 * Supervisor state has to be preserved. The sigframe
+		 * restore can only modify user features, i.e. @mask
+		 * cannot contain them.
 		 */
-		if (fx_only)
-			header->xfeatures = XFEATURE_MASK_FPSSE;
-		else
-			header->xfeatures &= user_xfeatures |
-					     xfeatures_mask_supervisor();
+		header->xfeatures &= mask | xfeatures_mask_supervisor();
 	}
 
 	if (use_fxsr()) {

^ permalink raw reply related	[flat|nested] 133+ messages in thread

* [tip: x86/urgent] x86/fpu: Make init_fpstate correct with optimized XSAVE
  2021-06-18 14:18 ` [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE Thomas Gleixner
  2021-06-18 20:41   ` Thomas Gleixner
@ 2021-06-22 11:45   ` tip-bot2 for Thomas Gleixner
  1 sibling, 0 replies; 133+ messages in thread
From: tip-bot2 for Thomas Gleixner @ 2021-06-22 11:45 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: Thomas Gleixner, Borislav Petkov, stable, x86, linux-kernel

The following commit has been merged into the x86/urgent branch of tip:

Commit-ID:     f9dfb5e390fab2df9f7944bb91e7705aba14cd26
Gitweb:        https://git.kernel.org/tip/f9dfb5e390fab2df9f7944bb91e7705aba14cd26
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Fri, 18 Jun 2021 16:18:25 +02:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 22 Jun 2021 11:06:21 +02:00

x86/fpu: Make init_fpstate correct with optimized XSAVE

The XSAVE init code initializes all enabled and supported components with
XRSTOR(S) to init state. Then it XSAVEs the state of the components back
into init_fpstate which is used in several places to fill in the init state
of components.

This works correctly with XSAVE, but not with XSAVEOPT and XSAVES because
those use the init optimization and skip writing state of components which
are in init state. So init_fpstate.xsave still contains all zeroes after
this operation.

There are two ways to solve that:

   1) Use XSAVE unconditionally, but that requires to reshuffle the buffer when
      XSAVES is enabled because XSAVES uses compacted format.

   2) Save the components which are known to have a non-zero init state by other
      means.

Looking deeper, #2 is the right thing to do because all components the
kernel supports have all-zeroes init state except the legacy features (FP,
SSE). Those cannot be hard coded because the states are not identical on all
CPUs, but they can be saved with FXSAVE which avoids all conditionals.

Use FXSAVE to save the legacy FP/SSE components in init_fpstate along with
a BUILD_BUG_ON() which reminds developers to validate that a newly added
component has all zeroes init state. As a bonus remove the now unused
copy_xregs_to_kernel_booting() crutch.

The XSAVE and reshuffle method can still be implemented in the unlikely
case that components are added which have a non-zero init state and no
other means to save them. For now, FXSAVE is just simple and good enough.

  [ bp: Fix a typo or two in the text. ]

Fixes: 6bad06b76892 ("x86, xsave: Use xsaveopt in context-switch path when supported")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20210618143444.587311343@linutronix.de
---
 arch/x86/include/asm/fpu/internal.h | 30 +++++---------------
 arch/x86/kernel/fpu/xstate.c        | 41 +++++++++++++++++++++++++---
 2 files changed, 46 insertions(+), 25 deletions(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index fdee23e..16bf4d4 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -204,6 +204,14 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
 		asm volatile("fxsaveq %[fx]" : [fx] "=m" (fpu->state.fxsave));
 }
 
+static inline void fxsave(struct fxregs_state *fx)
+{
+	if (IS_ENABLED(CONFIG_X86_32))
+		asm volatile( "fxsave %[fx]" : [fx] "=m" (*fx));
+	else
+		asm volatile("fxsaveq %[fx]" : [fx] "=m" (*fx));
+}
+
 /* These macros all use (%edi)/(%rdi) as the single memory argument. */
 #define XSAVE		".byte " REX_PREFIX "0x0f,0xae,0x27"
 #define XSAVEOPT	".byte " REX_PREFIX "0x0f,0xae,0x37"
@@ -272,28 +280,6 @@ static inline void copy_fxregs_to_kernel(struct fpu *fpu)
  * This function is called only during boot time when x86 caps are not set
  * up and alternative can not be used yet.
  */
-static inline void copy_xregs_to_kernel_booting(struct xregs_state *xstate)
-{
-	u64 mask = xfeatures_mask_all;
-	u32 lmask = mask;
-	u32 hmask = mask >> 32;
-	int err;
-
-	WARN_ON(system_state != SYSTEM_BOOTING);
-
-	if (boot_cpu_has(X86_FEATURE_XSAVES))
-		XSTATE_OP(XSAVES, xstate, lmask, hmask, err);
-	else
-		XSTATE_OP(XSAVE, xstate, lmask, hmask, err);
-
-	/* We should never fault when copying to a kernel buffer: */
-	WARN_ON_FPU(err);
-}
-
-/*
- * This function is called only during boot time when x86 caps are not set
- * up and alternative can not be used yet.
- */
 static inline void copy_kernel_to_xregs_booting(struct xregs_state *xstate)
 {
 	u64 mask = -1;
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index d0eef96..1cadb2f 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -441,12 +441,35 @@ static void __init print_xstate_offset_size(void)
 }
 
 /*
+ * All supported features have either init state all zeros or are
+ * handled in setup_init_fpu() individually. This is an explicit
+ * feature list and does not use XFEATURE_MASK*SUPPORTED to catch
+ * newly added supported features at build time and make people
+ * actually look at the init state for the new feature.
+ */
+#define XFEATURES_INIT_FPSTATE_HANDLED		\
+	(XFEATURE_MASK_FP |			\
+	 XFEATURE_MASK_SSE |			\
+	 XFEATURE_MASK_YMM |			\
+	 XFEATURE_MASK_OPMASK |			\
+	 XFEATURE_MASK_ZMM_Hi256 |		\
+	 XFEATURE_MASK_Hi16_ZMM	 |		\
+	 XFEATURE_MASK_PKRU |			\
+	 XFEATURE_MASK_BNDREGS |		\
+	 XFEATURE_MASK_BNDCSR |			\
+	 XFEATURE_MASK_PASID)
+
+/*
  * setup the xstate image representing the init state
  */
 static void __init setup_init_fpu_buf(void)
 {
 	static int on_boot_cpu __initdata = 1;
 
+	BUILD_BUG_ON((XFEATURE_MASK_USER_SUPPORTED |
+		      XFEATURE_MASK_SUPERVISOR_SUPPORTED) !=
+		     XFEATURES_INIT_FPSTATE_HANDLED);
+
 	WARN_ON_FPU(!on_boot_cpu);
 	on_boot_cpu = 0;
 
@@ -466,10 +489,22 @@ static void __init setup_init_fpu_buf(void)
 	copy_kernel_to_xregs_booting(&init_fpstate.xsave);
 
 	/*
-	 * Dump the init state again. This is to identify the init state
-	 * of any feature which is not represented by all zero's.
+	 * All components are now in init state. Read the state back so
+	 * that init_fpstate contains all non-zero init state. This only
+	 * works with XSAVE, but not with XSAVEOPT and XSAVES because
+	 * those use the init optimization which skips writing data for
+	 * components in init state.
+	 *
+	 * XSAVE could be used, but that would require to reshuffle the
+	 * data when XSAVES is available because XSAVES uses xstate
+	 * compaction. But doing so is a pointless exercise because most
+	 * components have an all zeros init state except for the legacy
+	 * ones (FP and SSE). Those can be saved with FXSAVE into the
+	 * legacy area. Adding new features requires to ensure that init
+	 * state is all zeroes or if not to add the necessary handling
+	 * here.
 	 */
-	copy_xregs_to_kernel_booting(&init_fpstate.xsave);
+	fxsave(&init_fpstate.fxsave);
 }
 
 static int xfeature_uncompacted_offset(int xfeature_nr)

^ permalink raw reply related	[flat|nested] 133+ messages in thread

* Re: [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy()
  2021-06-18 14:19 ` [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy() Thomas Gleixner
@ 2021-06-22 13:51   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 13:51 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:03PM +0200, Thomas Gleixner wrote:
> Both functions are misnomed.

"Both function names are a misnomer." or simply
"Both function are not named optimally."

> -int fpu__copy(struct task_struct *dst, struct task_struct *src)
> +/* Clone current's FPU state on fork */
> +int fpu_clone(struct task_struct *dst)
>  {
> +	struct fpu *src_fpu = &current->thread.fpu;
>  	struct fpu *dst_fpu = &dst->thread.fpu;
> -	struct fpu *src_fpu = &src->thread.fpu;
>  
> +	/* The new task's FPU state cannot be valid in the hardware. */
>  	dst_fpu->last_cpu = -1;
>  
>  	if (!static_cpu_has(X86_FEATURE_FPU))

cpu_feature_enabled

while at it.

Regardless, looks nice.

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE
  2021-06-18 14:19 ` [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE Thomas Gleixner
@ 2021-06-22 14:15   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 14:15 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:04PM +0200, Thomas Gleixner wrote:
> X86_FEATURE_OSPKE is enabled first on the boot CPU and the feature flag is
> set. Secondary CPUs have to enable CR4.PKE as well and set their per CPU
> feature flag. That's ineffective because all call sites have checks for
> boot_cpu_data.
> 
> Make it smarter and force the feature flag when PKU is enabled on the boot
> cpu which allows then to use cpu_feature_enabled(X86_FEATURE_OSPKE) all
> over the place. That either compiles the code out when PKEY support is
> disabled in Kconfig or uses a static_cpu_has() for the feature check which
> makes a significant difference in hotpathes, e.g. context switch.

"hotpaths"

> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/pkeys.h |    8 ++++----
>  arch/x86/include/asm/pkru.h  |    4 ++--
>  arch/x86/kernel/cpu/common.c |   24 +++++++++++-------------
>  arch/x86/kernel/fpu/core.c   |    2 +-
>  arch/x86/kernel/fpu/xstate.c |    2 +-
>  arch/x86/kernel/process_64.c |    2 +-
>  arch/x86/mm/fault.c          |    2 +-
>  7 files changed, 21 insertions(+), 23 deletions(-)

Other than that:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 43/66] x86/pkru: Provide pkru_write_default()
  2021-06-18 14:19 ` [patch V3 43/66] x86/pkru: Provide pkru_write_default() Thomas Gleixner
@ 2021-06-22 14:30   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 14:30 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:06PM +0200, Thomas Gleixner wrote:
> Provide a simple and trivial helper which just writes the PKRU default
> value without trying to fiddle with the tasks xsave buffer.

task's

> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/pkru.h |    8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> --- a/arch/x86/include/asm/pkru.h
> +++ b/arch/x86/include/asm/pkru.h
> @@ -60,4 +60,12 @@ static inline void write_pkru(u32 pkru)
>  	fpregs_unlock();
>  }
>  
> +static inline void pkru_write_default(void)
> +{
> +	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
> +		return;
> +
> +	wrpkru(pkru_get_init_value());
> +}
> +
>  #endif

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread()
  2021-06-18 14:19 ` [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread() Thomas Gleixner
@ 2021-06-22 14:40   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 14:40 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:09PM +0200, Thomas Gleixner wrote:
> Make it clear what the function is about.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    3 ++-
>  arch/x86/kernel/fpu/core.c          |    4 ++--
>  arch/x86/kernel/process.c           |    2 +-
>  3 files changed, 5 insertions(+), 4 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants
  2021-06-18 14:19 ` [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants Thomas Gleixner
@ 2021-06-22 15:38   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 15:38 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

Only nitpicks:

On Fri, Jun 18, 2021 at 04:19:10PM +0200, Thomas Gleixner wrote:
> From: Andy Lutomirski <luto@kernel.org>
> 
> fpu__clear() currently resets both register state and kernel XSAVE buffer
> state.  It has two modes: one for all state (supervisor and user) and
> another for user state only.  fpu__clear_all() uses the "all state"
> (user_only=0) mode, while a number of signal paths use the user_only=1
> mode.
> 
> Make fpu__clear() work only for user state (user_only=1) and remove the
> "all state" (user_only=0) code.  Rename it to match so it can be used by
> the signal paths.
> 
> Replace the "all state" (user_only=0) fpu__clear() functionality.  Use the
> TIF_NEED_FPU_LOAD functionality instead of making any actual hardware
> registers changes in this path.
> 
> Instead of invoking fpu__initialize() just memcpy() init_fpstate into the
> tasks FPU state because that has already the correct format and in case of

task's

> PKRU also contains the default PKRU value. Move the actual PKRU write out
> into flush_thread() where it belongs and where it will end up anyway when
> PKRU and XSTATE have been distangled.

untangled

> 
> For bisectability a workaround is required which stores the PKRU value in
> the xstate memory until PKRU is distangled from XSTATE for context

untangled

> switching and return to user.
> 
> [ Dave Hansen: Polished changelog ]
> [ tglx: Fixed the PKRU fallout ]
> 
> Signed-off-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/core.c |  111 ++++++++++++++++++++++++++++++---------------
>  arch/x86/kernel/process.c  |   10 ++++
>  2 files changed, 85 insertions(+), 36 deletions(-)

...

> +/* Temporary workaround. Will be removed once PKRU and XSTATE are distangled. */

untangled

> +static inline void pkru_set_default_in_xstate(struct xregs_state *xsave)
> +{
> +	struct pkru_state *pk;
> +
> +	if (!cpu_feature_enabled(X86_FEATURE_OSPKE))
> +		return;
> +	/*
> +	 * Force XFEATURE_PKRU to be set in the header otherwise
> +	 * get_xsave_addr() does not work and it also needs to be set to
> +	 * make XRSTOR(S) load it.
> +	 */
> +	xsave->header.xfeatures |= XFEATURE_MASK_PKRU;
> +	pk = get_xsave_addr(xsave, XFEATURE_PKRU);
> +	pk->pkru = pkru_get_init_value();
> +}
> +
>  /*
> - * Clear the FPU state back to init state.
> - *
> - * Called by sys_execve(), by the signal handler code and by various
> - * error paths.
> + * Reset current->fpu memory state to the init values.
>   */
> -static void fpu__clear(struct fpu *fpu, bool user_only)
> +static void fpu_reset_fpstate(void)
> +{
> +	struct fpu *fpu= &current->thread.fpu;

ERROR: spaces required around that '=' (ctx:VxW)
#167: FILE: arch/x86/kernel/fpu/core.c:335:
+	struct fpu *fpu= &current->thread.fpu;
 	               ^


> +
> +	fpregs_lock();
> +	fpu__drop(fpu);
> +	/*
> +	 * This does not change the actual hardware registers. It just
> +	 * resets the memory image and sets TIF_NEED_FPU_LOAD so a
> +	 * subsequent return to usermode will reload the registers from the
> +	 * tasks memory image.

task's

> +	 *
> +	 * Do not use fpstate_init() here. Just copy init_fpstate which has
> +	 * the correct content already except for PKRU.
> +	 */

Dunno, this comment can be over the function name - it is small enough
anyway.

> +	memcpy(&fpu->state, &init_fpstate, init_fpstate_copy_size());
> +	pkru_set_default_in_xstate(&fpu->state.xsave);
> +	set_thread_flag(TIF_NEED_FPU_LOAD);
> +	fpregs_unlock();
> +}
> +
> +/*
> + * Reset current's user FPU states to the init states.  current's
> + * supervisor states, if any, are not modified by this function.  The
> + * caller guarantees that the XSTATE header in memory is intact.
> + */
> +void fpu__clear_user_states(struct fpu *fpu)
>  {
>  	WARN_ON_FPU(fpu != &current->thread.fpu);
>  
> +	fpregs_lock();
>  	if (!static_cpu_has(X86_FEATURE_FPU)) {

cpu_feature_enabled()

> -		fpu__drop(fpu);
> -		fpu__initialize(fpu);
> +		fpu_reset_fpstate();
> +		fpregs_unlock();
>  		return;
>  	}
>  
> -	fpregs_lock();
> -
> -	if (user_only) {
> -		if (!fpregs_state_valid(fpu, smp_processor_id()) &&
> -		    xfeatures_mask_supervisor())
> -			os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
> -		load_fpregs_from_init_fpstate(xfeatures_mask_user());
> -	} else {
> -		load_fpregs_from_init_fpstate(xfeatures_mask_all);
> +	/*
> +	 * Ensure that current's supervisor states are loaded into their
> +	 * corresponding registers.
> +	 */
> +	if (xfeatures_mask_supervisor() &&
> +	    !fpregs_state_valid(fpu, smp_processor_id())) {
> +		os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
>  	}
>  
> +	/* Reset user states in registers. */
> +	load_fpregs_from_init_fpstate(xfeatures_mask_user());
> +
> +	/*
> +	 * Now all FPU registers have their desired values.  Inform the FPU
> +	 * state machine that current's FPU registers are in the hardware
> +	 * registers. The memory image does not need to be updated because
> +	 * any operation relying on it has to save the registers first when
> +	 * currents FPU is marked active.

current's

> +	 */
>  	fpregs_mark_activate();
>  	fpregs_unlock();
>  }
>  

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs()
  2021-06-18 14:19 ` [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs() Thomas Gleixner
@ 2021-06-22 15:40   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 15:40 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:11PM +0200, Thomas Gleixner wrote:
> Rename it so that it becomes entirely clear what this function is
> about. It's purpose is to restore the FPU registers to the state which was
> saved in the task's FPU memory state either at context switch or by an in
> kernel FPU user.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    6 ++----
>  arch/x86/kernel/fpu/core.c          |    2 +-
>  arch/x86/kernel/fpu/signal.c        |    2 +-
>  3 files changed, 4 insertions(+), 6 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs()
  2021-06-18 14:19 ` [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs() Thomas Gleixner
@ 2021-06-22 15:58   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 15:58 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:12PM +0200, Thomas Gleixner wrote:
> copy_kernel_to_fpregs() restores all xfeatures but it is also the place
> where the AMD FXSAVE_LEAK bug is handled.
> 
> That prevents fpregs_restore_userregs() to limit the restored features,
> which is required to distangle PKRU and XSTATE handling and also for the

"untangle"

> upcoming supervisor state management.
> 
> Move the FXSAVE_LEAK quirk into __copy_kernel_to_fpregs() and deinline that
> function which has become rather fat.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |   25 +------------------------
>  arch/x86/kernel/fpu/core.c          |   27 +++++++++++++++++++++++++++
>  2 files changed, 28 insertions(+), 24 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi()
  2021-06-18 14:19 ` [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi() Thomas Gleixner
@ 2021-06-22 16:02   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 16:02 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:13PM +0200, Thomas Gleixner wrote:
> Rename it so it's clear that this is about user ABI features which can
> differ from the feature set which the kernel saves and restores because the
> kernel handles e.g. PKRU differently. But the user ABI (ptrace, signal
> frame) expects it to be there.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    7 ++++++-
>  arch/x86/include/asm/fpu/xstate.h   |    6 +++++-
>  arch/x86/kernel/fpu/core.c          |    2 +-
>  arch/x86/kernel/fpu/signal.c        |   10 +++++-----
>  arch/x86/kernel/fpu/xstate.c        |   18 +++++++++---------
>  5 files changed, 26 insertions(+), 17 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace()
  2021-06-18 14:19 ` [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace() Thomas Gleixner
@ 2021-06-22 16:08   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 16:08 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:14PM +0200, Thomas Gleixner wrote:
> switch_to(), flush_thread() write the task's PKRU value eagerly so the PKRU
> value of current is always valid in the hardware.
> 
> That means there is no point in restoring PKRU on exit to user or when
> reactivating the task's FPU registers in the signal frame setup path.
> 
> This allows to remove all the xstate buffer updates with PKRU values once
> the PKRU state is stored in thread struct while a task is scheduled out.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Restore supervisor state too. (Yu-Cheng)
> ---
>  arch/x86/include/asm/fpu/internal.h |   16 +++++++++++++++-
>  arch/x86/include/asm/fpu/xstate.h   |   19 +++++++++++++++++++
>  arch/x86/kernel/fpu/core.c          |    2 +-
>  3 files changed, 35 insertions(+), 2 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer
  2021-06-18 14:19 ` [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer Thomas Gleixner
@ 2021-06-22 16:55   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 16:55 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:15PM +0200, Thomas Gleixner wrote:
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> PKRU is currently partly XSAVE-managed and partly not.  It has space in the
> task XSAVE buffer and is context-switched by XSAVE/XRSTOR.  However, it is
> switched more eagerly than FPU because there may be a need for PKRU to be
> up-to-date for things like copy_to/from_user() since PKRU affects
> user-permission memory accesses, not just accesses from userspace itself.
> 
> This leaves PKRU in a very odd position.  XSAVE brings very little value to
> the table for how Linux uses PKRU except for signal related XSTATE
> handling.
> 
> Prepare to move PKRU away from being XSAVE-managed.  Allocate space in the
> thread_struct for it and save/restore it in the context-switch path
> separately from the XSAVE-managed features. task->thread_struct.pkru is
> only valid when the task is scheduled out. For the current task the
> authoritative source is the hardware, i.e. it has to be retrieved via
> rdpkru().
> 
> Leave the XSAVE code in place for now to ensure bisectability.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
> V3: Fix the fallout on !PKRU enabled systems in copy_thread() - Intel testing via Dave
> ---
>  arch/x86/include/asm/processor.h |    9 +++++++++
>  arch/x86/kernel/process.c        |    7 +++++++
>  arch/x86/kernel/process_64.c     |   25 +++++++++++++++++++++++++
>  3 files changed, 41 insertions(+)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace()
  2021-06-18 14:19 ` [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace() Thomas Gleixner
@ 2021-06-22 17:01   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:01 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:16PM +0200, Thomas Gleixner wrote:
> From: Dave Hansen <dave.hansen@linux.intel.com>
> 
> One nice thing about having PKRU be XSAVE-managed is that it gets naturally
> exposed into the XSAVE-using ABIs.  Now that XSAVE will not be used to
> manage PKRU, these ABIs need to be manually enabled to deal with PKRU.
> 
> ptrace() uses copy_uabi_xstate_to_kernel() to collect the tracee's
> XSTATE. As PKRU is not in the task's XSTATE buffer, use task->thread.pkru
> for filling in up the ptrace buffer.
> 
> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/xstate.h |    2 +-
>  arch/x86/kernel/fpu/regset.c      |   10 ++++------
>  arch/x86/kernel/fpu/xstate.c      |   25 ++++++++++++++++++-------
>  3 files changed, 23 insertions(+), 14 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations
  2021-06-18 14:19 ` [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations Thomas Gleixner
@ 2021-06-22 17:07   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:07 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:17PM +0200, Thomas Gleixner wrote:
> As the PKRU state is managed seperately restoring it from the xstate buffer

separately

> would be counterproductive as it might either restore a stale value or
> reinit the PKRU state to 0.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    4 ++--
>  arch/x86/include/asm/fpu/xstate.h   |   10 ++++++++++
>  arch/x86/kernel/fpu/xstate.c        |    1 +
>  arch/x86/mm/extable.c               |    2 +-
>  4 files changed, 14 insertions(+), 3 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish()
  2021-06-18 14:19 ` [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish() Thomas Gleixner
@ 2021-06-22 17:08   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:08 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:18PM +0200, Thomas Gleixner wrote:
> PKRU is already updated and the xstate is not longer the proper source of
> information.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |   34 ++++------------------------------
>  1 file changed, 4 insertions(+), 30 deletions(-)
> 
> --- a/arch/x86/include/asm/fpu/internal.h
> +++ b/arch/x86/include/asm/fpu/internal.h
> @@ -549,39 +549,13 @@ static inline void switch_fpu_prepare(st
>   */
>  
>  /*
> - * Load PKRU from the FPU context if available. Delay loading of the
> - * complete FPU state until the return to userland.
> + * Delay loading of the complete FPU state until the return to userland.
> + * PKRU is handled seperately.

separately

With that fixed:

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate()
  2021-06-18 14:19 ` [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate() Thomas Gleixner
@ 2021-06-22 17:10   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:10 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:19PM +0200, Thomas Gleixner wrote:
> PKRU for a task is stored in task->thread.pkru when the task is scheduled
> out. For 'current' the authoritative source of PKRU is the hardware.
> 
> fpu_reset_fpstate() has two callers:
> 
>   1) fpu__clear_user_states() for !FPU systems. For those PKRU is irrelevant
> 
>   2) fpu_flush_thread() which is invoked from flush_thread(). flush_thread()
>      resets the hardware to the kernel restrictive default value.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/core.c |   22 ++++------------------
>  1 file changed, 4 insertions(+), 18 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru()
  2021-06-18 14:19 ` [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru() Thomas Gleixner
@ 2021-06-22 17:15   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:15 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:20PM +0200, Thomas Gleixner wrote:
> The PKRU value of a task is stored in task->thread.pkru when the task is
> scheduled out. PKRU is restored on schedule in from there. So keeping the
> XSAVE buffer up to date is a pointless exercise.
> 
> Remove the xstate fiddling and cleanup all related functions.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/pkru.h          |   17 ++++-------------
>  arch/x86/include/asm/special_insns.h |   14 +-------------
>  arch/x86/kvm/x86.c                   |    4 ++--
>  3 files changed, 7 insertions(+), 28 deletions(-)

Yap, untangling PKRU from XSAVE makes the related code a lot nicer, I
gotta say.

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore()
  2021-06-18 14:19 ` [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore() Thomas Gleixner
@ 2021-06-22 17:35   ` Borislav Petkov
  2021-06-22 18:38     ` Thomas Gleixner
  0 siblings, 1 reply; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:35 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:22PM +0200, Thomas Gleixner wrote:

> Subject: Re: [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore()

fpu__restore_sig() is the name.

> __fpu_sig_restore() is convoluted and some of the basic checks can trivialy be done
> in the calling function as well as the final error handling of clearing user state.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   76 +++++++++++++++++++++++--------------------
>  1 file changed, 41 insertions(+), 35 deletions(-)

...

> @@ -490,15 +464,47 @@ static inline int xstate_sigframe_size(v
>   */
>  int fpu__restore_sig(void __user *buf, int ia32_frame)
>  {
> +	unsigned int size = xstate_sigframe_size();
>  	void __user *buf_fx = buf;
> -	int size = xstate_sigframe_size();
> +	bool ia32_fxstate = false;
> +	int ret;
>  
> +	if (unlikely(!buf)) {
> +		fpu__clear_user_states(&current->thread.fpu);

You could declare

	struct fpu *fpu = &tsk->thread.fpu;

above so that it is easier to read, as this call is done twice.

Also, you can do:

	int ret = 0;

	if (unlikely(!buf))
		goto out;

so that the exit paths converge at the end.

> +		return 0;
> +	}
> +
> +	ia32_frame &= (IS_ENABLED(CONFIG_X86_32) ||
> +		       IS_ENABLED(CONFIG_IA32_EMULATION));
> +
> +	/*
> +	 * Only FXSR enabled systems need the FX state quirk.
> +	 * FRSTOR does not need it and can use the fast path.
> +	 */
>  	if (ia32_frame && use_fxsr()) {
>  		buf_fx = buf + sizeof(struct fregs_state);
>  		size += sizeof(struct fregs_state);
> +		ia32_fxstate = true;
> +	}
> +
> +	if (!access_ok(buf, size)) {
> +		ret = -EACCES;
> +		goto out;
> +	}
> +
> +	if (!IS_ENABLED(CONFIG_X86_64) && !static_cpu_has(X86_FEATURE_FPU)) {

cpu_feature_enabled()

> +		return fpregs_soft_set(current, NULL, 0,
> +				       sizeof(struct user_i387_ia32_struct),
> +				       NULL, buf);

Err, don't you need to catch retval into ret here and goto out, like
before, so that you can call fpu__clear_user_states() on error?

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check
  2021-06-18 14:19 ` [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check Thomas Gleixner
@ 2021-06-22 17:40   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 17:40 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:23PM +0200, Thomas Gleixner wrote:
> Checking for the XSTATE buffer being 64 byte aligned and if not deciding
> just to restore the FXSR state is daft.
> 
> If user space provides an unaligned math frame and has the extended state
> magic set in the FX software reserved bytes, then it really can keep the
> pieces.
> 
> If the frame is unaligned and the FX software magic is not set, then
> fx_only is already set and the restore will use fxrstor.
> 
> Remove it.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |    3 ---
>  1 file changed, 3 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -306,9 +306,6 @@ static int __fpu_restore_sig(void __user
>  		}
>  	}
>  
> -	if ((unsigned long)buf_fx % 64)
> -		fx_only = 1;
> -
>  	if (!ia32_fxstate) {
>  		/*
>  		 * Attempt to restore the FPU registers directly from user

Nice, that was really daft.

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore()
  2021-06-22 17:35   ` Borislav Petkov
@ 2021-06-22 18:38     ` Thomas Gleixner
  2021-06-22 18:43       ` Thomas Gleixner
  0 siblings, 1 reply; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-22 18:38 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Tue, Jun 22 2021 at 19:35, Borislav Petkov wrote:
> On Fri, Jun 18, 2021 at 04:19:22PM +0200, Thomas Gleixner wrote:
>>  
>> +	if (unlikely(!buf)) {
>> +		fpu__clear_user_states(&current->thread.fpu);
>
> You could declare
>
> 	struct fpu *fpu = &tsk->thread.fpu;
>
> above so that it is easier to read, as this call is done twice.
>
> Also, you can do:
>
> 	int ret = 0;
>
> 	if (unlikely(!buf))
> 		goto out;
>
> so that the exit paths converge at the end.

I pondered, but look at the condition there. It gets unreadable.

So I kept is as is because this is an intentional clear which returns
success and the other is on error.

>> +	if (!IS_ENABLED(CONFIG_X86_64) && !static_cpu_has(X86_FEATURE_FPU)) {
>
> cpu_feature_enabled()
>
>> +		return fpregs_soft_set(current, NULL, 0,
>> +				       sizeof(struct user_i387_ia32_struct),
>> +				       NULL, buf);
>
> Err, don't you need to catch retval into ret here and goto out, like
> before, so that you can call fpu__clear_user_states() on error?

Yes. Actually we should do that as a separate patch way earlier in the
series. Sigh.


^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore()
  2021-06-22 18:38     ` Thomas Gleixner
@ 2021-06-22 18:43       ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-22 18:43 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Tue, Jun 22 2021 at 20:38, Thomas Gleixner wrote:

> On Tue, Jun 22 2021 at 19:35, Borislav Petkov wrote:
>> On Fri, Jun 18, 2021 at 04:19:22PM +0200, Thomas Gleixner wrote:
>>>  
>>> +	if (unlikely(!buf)) {
>>> +		fpu__clear_user_states(&current->thread.fpu);
>>
>> You could declare
>>
>> 	struct fpu *fpu = &tsk->thread.fpu;
>>
>> above so that it is easier to read, as this call is done twice.
>>
>> Also, you can do:
>>
>> 	int ret = 0;
>>
>> 	if (unlikely(!buf))
>> 		goto out;
>>
>> so that the exit paths converge at the end.
>
> I pondered, but look at the condition there. It gets unreadable.
>
> So I kept is as is because this is an intentional clear which returns
> success and the other is on error.
>
>>> +	if (!IS_ENABLED(CONFIG_X86_64) && !static_cpu_has(X86_FEATURE_FPU)) {
>>
>> cpu_feature_enabled()
>>
>>> +		return fpregs_soft_set(current, NULL, 0,
>>> +				       sizeof(struct user_i387_ia32_struct),
>>> +				       NULL, buf);
>>
>> Err, don't you need to catch retval into ret here and goto out, like
>> before, so that you can call fpu__clear_user_states() on error?
>
> Yes. Actually we should do that as a separate patch way earlier in the
> series. Sigh.

Bah, no. I screwed that up. Blush

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
                   ` (69 preceding siblings ...)
  2021-06-22  1:59 ` Oliver Sang
@ 2021-06-22 18:56 ` Dey, Megha
  70 siblings, 0 replies; 133+ messages in thread
From: Dey, Megha @ 2021-06-22 18:56 UTC (permalink / raw)
  To: Thomas Gleixner, LKML
  Cc: Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck, Yu-cheng Yu,
	Sebastian Andrzej Siewior, Borislav Petkov, Peter Zijlstra,
	Kan Liang

Hi Thomas,

On 6/18/2021 7:48 PM, Thomas Gleixner wrote:
> The main parts of this series are:
> 
>    - Yet more bug fixes
> 
>    - Simplification and removal/replacement of redundant and/or
>      overengineered code.
> 
>    - Name space cleanup as the existing names were just a permanent source
>      of confusion.
> 
>    - Clear seperation of user ABI and kernel internal state handling.
> 
>    - Removal of PKRU from being XSTATE managed in the kernel because PKRU
>      has to be eagerly restored on context switch and keeping it in sync
>      in the xstate buffer is just pointless overhead and fragile.
> 
>      The kernel still XSAVEs PKRU on context switch but the value in the
>      buffer is not longer used and never restored from the buffer.
> 
>      This still needs to be cleaned up, but the series is already 40+
>      patches large and the cleanup of this is not a functional problem.
> 
>      The functional issues of PKRU management are fully addressed with the
>      series as is.
> 
>    - Cleanup of fpu signal restore
> 
>      - Make the fast path self contained. Handle #PF directly and skip
>        the slow path on any other exception as that will just end up
>        with the same result that the frame is invalid. This allows
>        the compiler to optimize the slow path out for 64bit kernels
>        w/o ia32 emulation.
> 
>      - Reduce code duplication and unnecessary operations
>        
> 
> It applies on top of
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git master
> 
> and is also available via git:
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git x86/fpu
> 
> This is a follow up to V2 which can be found here:
> 
>       https://lore.kernel.org/r/20210614154408.673478623@linutronix.de

I tested the x86/fpu branch using both AVX2(intree) and AVX512(out of 
tree) crypto code.

I used the tcrypt test module in the kernel and ran the prime95 workload 
(which finds prime numbers using AVX2 or AVX512) as a background process 
to make sure that the AVX states don't get screwed up after we run the 
crypto in kernel.

I did not see any issues with this branch and all tcrypt tests run as 
expected. I tested using the SHA1/256, AES-CTR, AES-GCM, camelia and 
crc32t10diff crypto algorithms.

Thanks,
Megha

> 
> Changes vs. V2:
> 
>    - Fixed the testing fallout (Dave, Kan)
> 
>    - Fixed a few issues found by myself when going through the lot
>      with a fine comb, especially MXCSR handling
> 
>    - Drop the FNSAVE optimizations
> 
>    - Cleanup of signal restore
> 
>    - Addressed review comments, mostly comments and a hopefully better
>      naming scheme which now just uses the instruction names and
>      consolidates everything else on save/restore so it's close to the way
>      how the hardware works.
> 
>    - A few cleanups and simplifications on the way (mostly regset related).
> 
>    - Picked up tags
> 
> With the above I'm not intending to do any further surgery on that
> code at the moment, though there is still room for improvement which
> can and has to be worked on when new bits are added.
> 
> Thanks,
> 
> 	tglx
> ---
>   arch/x86/events/intel/lbr.c          |    6
>   arch/x86/include/asm/fpu/internal.h  |  211 +++-------
>   arch/x86/include/asm/fpu/xstate.h    |   70 ++-
>   arch/x86/include/asm/pgtable.h       |   57 --
>   arch/x86/include/asm/pkeys.h         |    9
>   arch/x86/include/asm/pkru.h          |   62 +++
>   arch/x86/include/asm/processor.h     |    9
>   arch/x86/include/asm/special_insns.h |   14
>   arch/x86/kernel/cpu/common.c         |   34 -
>   arch/x86/kernel/fpu/core.c           |  276 +++++++------
>   arch/x86/kernel/fpu/init.c           |   15
>   arch/x86/kernel/fpu/regset.c         |  220 ++++++-----
>   arch/x86/kernel/fpu/signal.c         |  423 +++++++++------------
>   arch/x86/kernel/fpu/xstate.c         |  693 ++++++++++++++---------------------
>   arch/x86/kernel/process.c            |   22 -
>   arch/x86/kernel/process_64.c         |   28 +
>   arch/x86/kernel/traps.c              |    5
>   arch/x86/kvm/svm/sev.c               |    1
>   arch/x86/kvm/x86.c                   |   56 +-
>   arch/x86/mm/extable.c                |    2
>   arch/x86/mm/fault.c                  |    2
>   arch/x86/mm/pkeys.c                  |   22 -
>   include/linux/pkeys.h                |    4
>   23 files changed, 1060 insertions(+), 1181 deletions(-)
> 
> 

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe
  2021-06-18 14:19 ` [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe Thomas Gleixner
  2021-06-18 21:02   ` Andrew Cooper
@ 2021-06-22 19:10   ` Borislav Petkov
  1 sibling, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-22 19:10 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:24PM +0200, Thomas Gleixner wrote:
> Utilize the check for the extended state magic in the FX software reserved
> bytes and set the parameters for restoring fx_only in the relevant members
> of fw_sw_user.
> 
> This allows further cleanups on top because the data is consistent.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   69 +++++++++++++++++++------------------------
>  1 file changed, 32 insertions(+), 37 deletions(-)

Modulo Andy's catch, I can't find anything out of the ordinary here and
all this does makes sense to me. Still a tentative

Reviewed-by: Borislav Petkov <bp@suse.de>

because this is all nasty magic to me. (yah, magic1 and magic2 :-))

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-21 22:22 ` Bae, Chang Seok
@ 2021-06-22 20:02   ` Bae, Chang Seok
  2021-06-24  0:06     ` Bae, Chang Seok
  0 siblings, 1 reply; 133+ messages in thread
From: Bae, Chang Seok @ 2021-06-22 20:02 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Yu, Fenghua, Luck, Tony, Yu,
	Yu-cheng, Sebastian Andrzej Siewior, Borislav Petkov,
	Peter Zijlstra, Kan Liang

On Jun 21, 2021, at 15:22, Bae, Chang Seok <chang.seok.bae@intel.com> wrote:
> I tried to apply AMX patches on top of this. The test looks to be okay by far.
> I will also give an update here if I find anything.

This looks to be vague about the test. I took cases shown in AMX v5 like this:
	https://lore.kernel.org/lkml/20210523193259.26200-24-chang.seok.bae@intel.com/
It validates AMX state with context switches, signal delivery/return, and
context injection via ptrace.

Thanks,
Chang


^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing()
  2021-06-18 14:19 ` [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing() Thomas Gleixner
@ 2021-06-23  7:51   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-23  7:51 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:25PM +0200, Thomas Gleixner wrote:
> Now that user_xfeatures is correctly set when xsave is enabled, remove the
> duplicated initialization of components.
> 
> Rename the function while at it.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   36 +++++++++++++++---------------------
>  1 file changed, 15 insertions(+), 21 deletions(-)

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 63/66] x86/fpu/signal: Split out the direct restore code
  2021-06-18 14:19 ` [patch V3 63/66] x86/fpu/signal: Split out the direct restore code Thomas Gleixner
@ 2021-06-23  8:10   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-23  8:10 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:26PM +0200, Thomas Gleixner wrote:
> Prepare for smarter failure handling of the direct restore.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |  110 +++++++++++++++++++++----------------------
>  1 file changed, 56 insertions(+), 54 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -249,10 +249,7 @@ sanitize_restored_user_xstate(union fpre
>  	}
>  }
>  
> -/*
> - * Restore the FPU state directly from the userspace signal frame.
> - */
> -static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
> +static int restore_hwregs_from_user(void __user *buf, u64 xrestore, bool fx_only)

Or simply

	__restore_fpregs_from_user

to denote it is the low-level helper like the rest of the code does
around here.

>  {
>  	if (use_xsave()) {
>  		u64 init_bv = xfeatures_mask_uabi() & ~xrestore;
> @@ -273,6 +270,56 @@ static int restore_fpregs_from_user(void
>  	}
>  }
>  
> +static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
> +{
> +	struct fpu *fpu = &current->thread.fpu;
> +	int ret ;
	       ^

superfluous space.


> +	fpregs_lock();
> +	pagefault_disable();
> +	ret = restore_hwregs_from_user(buf, xrestore, fx_only);
> +	pagefault_enable();
> +
> +	if (unlikely(ret)) {
> +		/*
> +		 * The above did an FPU restore operation, restricted to
> +		 * the user portion of the registers, and failed, but the
> +		 * microcode might have modified the FPU registers
> +		 * nevertheless.
> +		 *
> +		 * If the FPU registers do not belong to current, then
> +		 * invalidate the FPU register state otherwise the task
> +		 * might preempt current and return to user space with
> +		 * corrupted FPU registers.
> +		 *
> +		 * In case current owns the FPU registers then no further
> +		 * action is required. The fixup in the slow path will
> +		 * handle it correctly.
> +		 */
> +		if (test_thread_flag(TIF_NEED_FPU_LOAD))
> +			__cpu_invalidate_fpregs_state();
> +		fpregs_unlock();
> +		return ret;
> +	}
> +
> +	/*
> +	 * Restore supervisor states: previous context switch etc has done
> +	 * XSAVES and saved the supervisor states in the kernel buffer from
> +	 * which they can be restored now.
> +	 *
> +	 * We cannot do a single XRSTORS here - which would be nice -

Might wanna fix up the "We" brotherhood formulation, while at it. :)

> +	 * because the rest of the FPU registers are being restored from a
> +	 * user buffer directly. The single XRSTORS happens below, when the
> +	 * user buffer has been copied to the kernel one.
> +	 */
> +	if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor())
> +		os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor());
> +
> +	fpregs_mark_activate();
> +	fpregs_unlock();
> +	return 0;

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 64/66] x86/fpu: Return proper error codes from user access functions
  2021-06-18 14:19 ` [patch V3 64/66] x86/fpu: Return proper error codes from user access functions Thomas Gleixner
@ 2021-06-23  8:30   ` Borislav Petkov
  2021-06-23 10:56     ` Thomas Gleixner
  0 siblings, 1 reply; 133+ messages in thread
From: Borislav Petkov @ 2021-06-23  8:30 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:27PM +0200, Thomas Gleixner wrote:
> When *RSTOR from user memory raises an exception there is no way to
> differentiate them. That's bad because it forces the slow path even when
> the failure was not a fault. If the operation raised eg. #GP then going
> through the slow path is pointless.
> 
> Use _ASM_EXTABLE_FAULT() which stores the trap number and let the exception
> fixup return the negated trap number as error.
> 
> This allows to seperate the fast path and let it handle faults directly and

separate

> avoid the slow path for all other exceptions.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/include/asm/fpu/internal.h |    9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> --- a/arch/x86/include/asm/fpu/internal.h
> +++ b/arch/x86/include/asm/fpu/internal.h
> @@ -87,6 +87,7 @@ extern void fpstate_init_soft(struct swr
>  static inline void fpstate_init_soft(struct swregs_state *soft) {}
>  #endif
>  
> +/* Returns 0 or the negated trap number, which results in -EFAULT for #PF */
>  #define user_insn(insn, output, input...)				\
>  ({									\
>  	int err;							\
> @@ -94,14 +95,14 @@ static inline void fpstate_init_soft(str
>  	might_fault();							\
>  									\
>  	asm volatile(ASM_STAC "\n"					\
> -		     "1:" #insn "\n\t"					\
> +		     "1: " #insn "\n"					\
>  		     "2: " ASM_CLAC "\n"				\
>  		     ".section .fixup,\"ax\"\n"				\
> -		     "3:  movl $-1,%[err]\n"				\
> +		     "3:  negl %%eax\n"					\
>  		     "    jmp  2b\n"					\
>  		     ".previous\n"					\
> -		     _ASM_EXTABLE(1b, 3b)				\
> -		     : [err] "=r" (err), output				\
> +		     _ASM_EXTABLE_FAULT(1b, 3b)				\
> +		     : [err] "=a" (err), output				\
>  		     : "0"(0), input);					\
>  	err;								\

Don't we wanna do the same for XSTATE_OP() too?

Because restore_hwregs_from_user() could call
xrstor_from_user_sigframe() too which ends up doing XRSTOR and latter
can cause a #PF too.

Hmm.

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path
  2021-06-18 14:19 ` [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path Thomas Gleixner
@ 2021-06-23  8:45   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-23  8:45 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:28PM +0200, Thomas Gleixner wrote:
> If *RSTOR raises an exception, then the slow path is taken. That's wrong
> because if the reason was not #PF then going through the slow path is waste
> of time because that will end up with the same conclusion that the data is
> invalid.
> 
> Now that the wrapper around *RSTOR return an negative error code, which is
> the negated trap number, it's possible to differentiate.
> 
> If the *RSTOR raised #PF then handle it directly in the fast path and if it
> was some other exception, e.g. #GP, then give up and do not try the fast
> path.
> 
> This removes the legacy frame FRSTOR code from the slow path because FRSTOR
> is not a ia32_fxstate frame and is therefore handled in the fast path.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   65 ++++++++++++++++++++-----------------------
>  1 file changed, 31 insertions(+), 34 deletions(-)
> 
> --- a/arch/x86/kernel/fpu/signal.c
> +++ b/arch/x86/kernel/fpu/signal.c
> @@ -270,11 +270,17 @@ static int restore_hwregs_from_user(void
>  	}
>  }
>  
> -static int restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
> +/*
> + * Attempt to restore the FPU registers directly from user memory.
> + * Pagefaults are handled and any errors returned are fatal.
> + */
> +static int restore_fpregs_from_user(void __user *buf, u64 xrestore,
> +				    bool fx_only, unsigned int size)
>  {
>  	struct fpu *fpu = &current->thread.fpu;
>  	int ret ;
>  
> +retry:
>  	fpregs_lock();
>  	pagefault_disable();
>  	ret = restore_hwregs_from_user(buf, xrestore, fx_only);
> @@ -291,15 +297,16 @@ static int restore_fpregs_from_user(void
>  		 * invalidate the FPU register state otherwise the task
>  		 * might preempt current and return to user space with
>  		 * corrupted FPU registers.
> -		 *
> -		 * In case current owns the FPU registers then no further
> -		 * action is required. The fixup in the slow path will
> -		 * handle it correctly.
>  		 */
>  		if (test_thread_flag(TIF_NEED_FPU_LOAD))
>  			__cpu_invalidate_fpregs_state();
>  		fpregs_unlock();
> -		return ret;
> +
> +		if (ret == -EFAULT)
> +			ret = fault_in_pages_readable(buf, size);
> +		if (!ret)
> +			goto retry;
> +		return ret == -EFAULT ? ret : -EINVAL;

Uuuh, this is gonna make people stop and think, with all those different
ret assignments and cases. :)

In any case, __fpu_restore_sig() is starting to become somewhat saner
again, nice!

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init
  2021-06-18 14:19 ` [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init Thomas Gleixner
@ 2021-06-23  8:56   ` Borislav Petkov
  0 siblings, 0 replies; 133+ messages in thread
From: Borislav Petkov @ 2021-06-23  8:56 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Fri, Jun 18, 2021 at 04:19:29PM +0200, Thomas Gleixner wrote:
> There is no reason to do an extra XRSTOR from initfp_state for feature bits
> which have been cleared by user space in the FX magic xfeatures storage.
> 
> Just clear them in the task's XSTATE header and do a full restore which
> will put these cleared features into init state.
> 
> There is no real difference in performance because the current code already
> does a full restore when the xfeatures bits are preserved as the signal
> frame setup has stored them, which is the full UABI feature set.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  arch/x86/kernel/fpu/signal.c |   92 +++++++++++++++----------------------------
>  1 file changed, 33 insertions(+), 59 deletions(-)

...

> @@ -390,54 +362,56 @@ static int __fpu_restore_sig(void __user
>  		set_thread_flag(TIF_NEED_FPU_LOAD);
>  	}
>  	__fpu_invalidate_fpregs_state(fpu);
> +	__cpu_invalidate_fpregs_state();
>  	fpregs_unlock();
>  
>  	if (use_xsave() && !fx_only) {
> -		u64 init_bv = xfeatures_mask_uabi() & ~user_xfeatures;
> -
> -		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx);
> +		ret = copy_sigframe_from_user_to_xstate(&fpu->state.xsave,
> +							buf_fx);

Why? Just let it stick out.

Regardless,

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 64/66] x86/fpu: Return proper error codes from user access functions
  2021-06-23  8:30   ` Borislav Petkov
@ 2021-06-23 10:56     ` Thomas Gleixner
  0 siblings, 0 replies; 133+ messages in thread
From: Thomas Gleixner @ 2021-06-23 10:56 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: LKML, Andy Lutomirski, Dave Hansen, Fenghua Yu, Tony Luck,
	Yu-cheng Yu, Sebastian Andrzej Siewior, Peter Zijlstra,
	Kan Liang

On Wed, Jun 23 2021 at 10:30, Borislav Petkov wrote:
>> +/* Returns 0 or the negated trap number, which results in -EFAULT for #PF */
>>  #define user_insn(insn, output, input...)				\
>>  ({									\
>>  	int err;							\
>> @@ -94,14 +95,14 @@ static inline void fpstate_init_soft(str
>>  	might_fault();							\
>>  									\
>>  	asm volatile(ASM_STAC "\n"					\
>> -		     "1:" #insn "\n\t"					\
>> +		     "1: " #insn "\n"					\
>>  		     "2: " ASM_CLAC "\n"				\
>>  		     ".section .fixup,\"ax\"\n"				\
>> -		     "3:  movl $-1,%[err]\n"				\
>> +		     "3:  negl %%eax\n"					\
>>  		     "    jmp  2b\n"					\
>>  		     ".previous\n"					\
>> -		     _ASM_EXTABLE(1b, 3b)				\
>> -		     : [err] "=r" (err), output				\
>> +		     _ASM_EXTABLE_FAULT(1b, 3b)				\
>> +		     : [err] "=a" (err), output				\
>>  		     : "0"(0), input);					\
>>  	err;								\
>
> Don't we wanna do the same for XSTATE_OP() too?
>
> Because restore_hwregs_from_user() could call
> xrstor_from_user_sigframe() too which ends up doing XRSTOR and latter
> can cause a #PF too.

Bah, right you are.

^ permalink raw reply	[flat|nested] 133+ messages in thread

* Re: [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing
  2021-06-22 20:02   ` Bae, Chang Seok
@ 2021-06-24  0:06     ` Bae, Chang Seok
  0 siblings, 0 replies; 133+ messages in thread
From: Bae, Chang Seok @ 2021-06-24  0:06 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: LKML, Andy Lutomirski, Dave Hansen, Yu, Fenghua, Luck, Tony, Yu,
	Yu-cheng, Sebastian Andrzej Siewior, Borislav Petkov,
	Peter Zijlstra, Kan Liang, Brown, Len, Shankar, Ravi V

On Jun 22, 2021, at 13:02, Bae, Chang Seok <chang.seok.bae@intel.com> wrote:
> On Jun 21, 2021, at 15:22, Bae, Chang Seok <chang.seok.bae@intel.com> wrote:
>> I tried to apply AMX patches on top of this. The test looks to be okay by far.
>> I will also give an update here if I find anything.
> 
> This looks to be vague about the test. I took cases shown in AMX v5 like this:
> 	https://lore.kernel.org/lkml/20210523193259.26200-24-chang.seok.bae@intel.com/
> It validates AMX state with context switches, signal delivery/return, and
> context injection via ptrace.

Also, just for the record, as the next AMX version is imminent:

Lots of AMX-related code are mostly function name changes and I had to
readjust my assumption. (Maybe this is not conclusive yet as still digesting
the code.) But I think the rebase went well with the test results, and this
change improves the mainline in many ways that affect adjusting AMX code in
the right way.

Thanks,
Chang

^ permalink raw reply	[flat|nested] 133+ messages in thread

end of thread, other threads:[~2021-06-24  0:06 UTC | newest]

Thread overview: 133+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-18 14:18 [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
2021-06-18 14:18 ` [patch V3 01/66] x86/fpu: x86/fpu: Preserve supervisor states in sanitize_restored_user_xstate() Thomas Gleixner
2021-06-19  8:34   ` Borislav Petkov
2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
2021-06-18 14:18 ` [patch V3 02/66] x86/fpu: Make init_fpstate correct with optimized XSAVE Thomas Gleixner
2021-06-18 20:41   ` Thomas Gleixner
2021-06-18 20:44     ` Borislav Petkov
2021-06-22 11:45   ` [tip: x86/urgent] " tip-bot2 for Thomas Gleixner
2021-06-18 14:18 ` [patch V3 03/66] x86/fpu: Fix copy_xstate_to_kernel() gap handling Thomas Gleixner
2021-06-19  9:41   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 04/66] x86/pkeys: Revert a5eff7259790 ("x86/pkeys: Add PKRU value to init_fpstate") Thomas Gleixner
2021-06-18 14:18 ` [patch V3 05/66] x86/fpu: Mark various FPU states __ro_after_init Thomas Gleixner
2021-06-18 14:18 ` [patch V3 06/66] x86/fpu: Make xfeatures_mask_all __ro_after_init Thomas Gleixner
2021-06-20  8:44   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 07/66] x86/fpu: Get rid of fpu__get_supported_xfeatures_mask() Thomas Gleixner
2021-06-20  9:02   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 08/66] x86/fpu: Remove unused get_xsave_field_ptr() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 09/66] x86/fpu: Move inlines where they belong Thomas Gleixner
2021-06-18 14:18 ` [patch V3 10/66] x86/fpu: Limit xstate copy size in xstateregs_set() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 11/66] x86/fpu: Sanitize xstateregs_set() Thomas Gleixner
2021-06-20 21:30   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 12/66] x86/fpu: Reject invalid MXCSR values in copy_kernel_to_xstate() Thomas Gleixner
2021-06-21 10:00   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 13/66] x86/fpu: Simplify PTRACE_GETREGS code Thomas Gleixner
2021-06-18 14:18 ` [patch V3 14/66] x86/fpu: Rewrite xfpregs_set() Thomas Gleixner
2021-06-21 10:20   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 15/66] x86/fpu: Fail ptrace() requests that try to set invalid MXCSR values Thomas Gleixner
2021-06-21 10:17   ` Thomas Gleixner
2021-06-18 14:18 ` [patch V3 16/66] x86/fpu: Clean up fpregs_set() Thomas Gleixner
2021-06-21 12:05   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 17/66] x86/fpu: Make copy_xstate_to_kernel() usable for [x]fpregs_get() Thomas Gleixner
2021-06-21 12:32   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 18/66] x86/fpu: Use copy_xstate_to_uabi_buf() in xfpregs_get() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 19/66] x86/fpu: Use copy_xstate_to_uabi_buf() in fpregs_get() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 20/66] x86/fpu: Remove fpstate_sanitize_xstate() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 21/66] x86/fpu/regset: Move fpu__read_begin() into regset Thomas Gleixner
2021-06-21 13:26   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 22/66] x86/fpu: Move fpu__write_begin() to regset Thomas Gleixner
2021-06-21 15:30   ` Borislav Petkov
2021-06-21 20:15     ` Thomas Gleixner
2021-06-18 14:18 ` [patch V3 23/66] x86/fpu: Get rid of using_compacted_format() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 24/66] x86/kvm: Avoid looking up PKRU in XSAVE buffer Thomas Gleixner
2021-06-18 14:18 ` [patch V3 25/66] x86/fpu: Cleanup arch_set_user_pkey_access() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 26/66] x86/fpu: Get rid of copy_supervisor_to_kernel() Thomas Gleixner
2021-06-18 14:18 ` [patch V3 27/66] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs() Thomas Gleixner
2021-06-21 18:00   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 28/66] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user() Thomas Gleixner
2021-06-21 19:44   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 29/66] x86/fpu: Rename fxregs related copy functions Thomas Gleixner
2021-06-21 23:00   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 30/66] x86/fpu: Rename fregs " Thomas Gleixner
2021-06-22  9:31   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 31/66] x86/fpu: Rename xstate copy functions which are related to UABI Thomas Gleixner
2021-06-22  9:38   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 32/66] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate() Thomas Gleixner
2021-06-22 10:09   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 33/66] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate() Thomas Gleixner
2021-06-22 10:16   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 34/66] x86/fpu: Get rid of the FNSAVE optimization Thomas Gleixner
2021-06-22 10:36   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 35/66] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel() Thomas Gleixner
2021-06-22 10:46   ` Borislav Petkov
2021-06-18 14:18 ` [patch V3 36/66] x86/fpu: Rename initstate copy functions Thomas Gleixner
2021-06-22 10:48   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 37/66] x86/fpu: Rename "dynamic" XSTATEs to "independent" Thomas Gleixner
2021-06-22 11:05   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 38/66] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
2021-06-21 20:42   ` Liang, Kan
2021-06-22 11:32   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 39/66] x86/pkeys: Move read_pkru() and write_pkru() Thomas Gleixner
2021-06-18 14:19 ` [patch V3 40/66] x86/fpu: Rename and sanitize fpu__save/copy() Thomas Gleixner
2021-06-22 13:51   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 41/66] x86/cpu: Sanitize X86_FEATURE_OSPKE Thomas Gleixner
2021-06-22 14:15   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 42/66] x86/pkru: Provide pkru_get_init_value() Thomas Gleixner
2021-06-18 14:19 ` [patch V3 43/66] x86/pkru: Provide pkru_write_default() Thomas Gleixner
2021-06-22 14:30   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 44/66] x86/cpu: Write the default PKRU value when enabling PKE Thomas Gleixner
2021-06-18 14:19 ` [patch V3 45/66] x86/fpu: Use pkru_write_default() in copy_init_fpstate_to_fpregs() Thomas Gleixner
2021-06-18 14:19 ` [patch V3 46/66] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread() Thomas Gleixner
2021-06-22 14:40   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 47/66] x86/fpu: Clean up the fpu__clear() variants Thomas Gleixner
2021-06-22 15:38   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 48/66] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs() Thomas Gleixner
2021-06-22 15:40   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 49/66] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs() Thomas Gleixner
2021-06-22 15:58   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 50/66] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi() Thomas Gleixner
2021-06-22 16:02   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 51/66] x86/fpu: Dont restore PKRU in fpregs_restore_userspace() Thomas Gleixner
2021-06-22 16:08   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 52/66] x86/fpu: Add PKRU storage outside of task XSAVE buffer Thomas Gleixner
2021-06-22 16:55   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 53/66] x86/fpu: Hook up PKRU into ptrace() Thomas Gleixner
2021-06-22 17:01   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 54/66] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations Thomas Gleixner
2021-06-22 17:07   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 55/66] x86/fpu: Remove PKRU handling from switch_fpu_finish() Thomas Gleixner
2021-06-22 17:08   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 56/66] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate() Thomas Gleixner
2021-06-22 17:10   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 57/66] x86/pkru: Remove xstate fiddling from write_pkru() Thomas Gleixner
2021-06-22 17:15   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 58/66] x86/fpu: Mark init_fpstate __ro_after_init Thomas Gleixner
2021-06-18 14:19 ` [patch V3 59/66] x86/fpu/signal: Move initial checks into fpu__sig_restore() Thomas Gleixner
2021-06-22 17:35   ` Borislav Petkov
2021-06-22 18:38     ` Thomas Gleixner
2021-06-22 18:43       ` Thomas Gleixner
2021-06-18 14:19 ` [patch V3 60/66] x86/fpu/signal: Remove the legacy alignment check Thomas Gleixner
2021-06-22 17:40   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 61/66] x86/fpu/signal: Sanitize the xstate check on sigframe Thomas Gleixner
2021-06-18 21:02   ` Andrew Cooper
2021-06-18 23:49     ` Thomas Gleixner
2021-06-22 19:10   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 62/66] x86/fpu/signal: Sanitize copy_user_to_fpregs_zeroing() Thomas Gleixner
2021-06-23  7:51   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 63/66] x86/fpu/signal: Split out the direct restore code Thomas Gleixner
2021-06-23  8:10   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 64/66] x86/fpu: Return proper error codes from user access functions Thomas Gleixner
2021-06-23  8:30   ` Borislav Petkov
2021-06-23 10:56     ` Thomas Gleixner
2021-06-18 14:19 ` [patch V3 65/66] x86/fpu/signal: Handle #PF in the direct restore path Thomas Gleixner
2021-06-23  8:45   ` Borislav Petkov
2021-06-18 14:19 ` [patch V3 66/66] x86/fpu/signal: Let xrstor handle the features to init Thomas Gleixner
2021-06-23  8:56   ` Borislav Petkov
2021-06-21 16:15 ` [patch V3 00/66] x86/fpu: Spring cleaning and PKRU sanitizing Yu, Yu-cheng
2021-06-21 21:53 ` Fenghua Yu
2021-06-21 22:22 ` Bae, Chang Seok
2021-06-22 20:02   ` Bae, Chang Seok
2021-06-24  0:06     ` Bae, Chang Seok
2021-06-22  1:59 ` Oliver Sang
2021-06-22  9:08   ` Thomas Gleixner
2021-06-22 18:56 ` Dey, Megha

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