From: "jay.xu@rock-chips.com" <jay.xu@rock-chips.com>
To: "Heiko Stübner" <heiko@sntech.de>,
"Linus Walleij" <linus.walleij@linaro.org>,
robh+dt <robh+dt@kernel.org>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: Re: [PATCH v5 5/7] gpio/rockchip: support next version gpio controller
Date: Fri, 18 Jun 2021 14:36:48 +0800 [thread overview]
Message-ID: <202106181436485250639@rock-chips.com> (raw)
In-Reply-To: 4162826.Y6S9NjorxK@diego
Hi Heiko
--------------
jay.xu@rock-chips.com
>Am Donnerstag, 27. Mai 2021, 09:13:45 CEST schrieb Jianqun Xu:
>> The next version gpio controller on SoCs like rk3568 have more write
>> mask bits for registers.
>>
>> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
>
>> @@ -549,15 +677,33 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
>> return PTR_ERR(bank->reg_base);
>>
>> bank->irq = irq_of_parse_and_map(bank->of_node, 0);
>> -
>> - bank->gpio_regs = &gpio_regs_v1;
>> - bank->gpio_type = GPIO_TYPE_V1;
>> + if (!bank->irq)
>> + return -EINVAL;
>>
>> bank->clk = of_clk_get(bank->of_node, 0);
>> - if (!IS_ERR(bank->clk))
>> - return clk_prepare(bank->clk);
>> + if (IS_ERR(bank->clk))
>> + return PTR_ERR(bank->clk);
>> +
>> + clk_prepare_enable(bank->clk);
>> + id = readl(bank->reg_base + gpio_regs_v2.version_id);
>> +
>> + /* If not gpio v2, that is default to v1. */
>> + if (id == GPIO_TYPE_V2) {
>> + bank->gpio_regs = &gpio_regs_v2;
>> + bank->gpio_type = GPIO_TYPE_V2;
>> + bank->db_clk = of_clk_get(bank->of_node, 1);
>> + if (IS_ERR(bank->db_clk)) {
>> + dev_err(bank->dev, "cannot find debounce clk\n");
>> + bank->db_clk = NULL;
>> + clk_disable(bank->clk);
>> + return -EINVAL;
>> + }
>> + } else {
>> + bank->gpio_regs = &gpio_regs_v1;
>> + bank->gpio_type = GPIO_TYPE_V1;
>> + }
>>
>> - bank->clk = NULL;
>> + clk_disable(bank->clk);
>
>NIT: you could move the "always enable clock for gpio controller" patch
>before adding the v2 support. That way you save on not needing to add
>the clock handling here.
>
V6 has reoder the patches, I havn't add acked-by or reviewed-by yet, please take a look again, thanks
>Otherwise looks nice to me.
>
>Acked-by: Heiko Stuebner <heiko@sntech.de>
>
>
>Heiko
>
>
>> return 0;
>> }
>>
>> diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
>> index 1b774b6bbc3e..589d4d2a98c9 100644
>> --- a/drivers/pinctrl/pinctrl-rockchip.h
>> +++ b/drivers/pinctrl/pinctrl-rockchip.h
>> @@ -121,6 +121,7 @@ struct rockchip_drv {
>> * @reg_base: register base of the gpio bank
>> * @regmap_pull: optional separate register for additional pull settings
>> * @clk: clock of the gpio bank
>> + * @db_clk: clock of the gpio debounce
>> * @irq: interrupt of the gpio bank
>> * @saved_masks: Saved content of GPIO_INTEN at suspend time.
>> * @pin_base: first pin number
>> @@ -146,6 +147,7 @@ struct rockchip_pin_bank {
>> void __iomem *reg_base;
>> struct regmap *regmap_pull;
>> struct clk *clk;
>> + struct clk *db_clk;
>> int irq;
>> u32 saved_masks;
>> u32 pin_base;
>>
>
>
>
>
>
>
>
next prev parent reply other threads:[~2021-06-18 6:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 7:12 [PATCH v5 0/7] gpio-rockchip driver Jianqun Xu
2021-05-27 7:12 ` [PATCH v5 1/7] pinctrl/rockchip: separate struct rockchip_pin_bank to a head file Jianqun Xu
2021-05-27 7:12 ` [PATCH v5 2/7] pinctrl/pinctrl-rockchip.h: add pinctrl device to gpio bank struct Jianqun Xu
2021-05-27 7:12 ` [PATCH v5 3/7] gpio: separate gpio driver from pinctrl-rockchip driver Jianqun Xu
2021-05-27 7:12 ` [PATCH v5 4/7] gpio/rockchip: use struct rockchip_gpio_regs for gpio controller Jianqun Xu
2021-05-27 7:13 ` [PATCH v5 5/7] gpio/rockchip: support next version " Jianqun Xu
2021-05-27 8:48 ` Heiko Stübner
2021-06-18 6:36 ` jay.xu [this message]
2021-05-27 7:14 ` [PATCH v5 6/7] gpio/rockchip: always enable clock for " Jianqun Xu
2021-05-27 7:14 ` [PATCH v5 7/7] gpio/rockchip: drop irq_gc_lock/irq_gc_unlock for irq set type Jianqun Xu
2021-05-27 8:50 ` [PATCH v5 0/7] gpio-rockchip driver Heiko Stübner
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