From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Voon, Weifeng" <weifeng.voon@intel.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
"Ling, Pei Lee" <pei.lee.ling@intel.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Jose Abreu <joabreu@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
"Ong, Boon Leong" <boon.leong.ong@intel.com>,
Wong Vee Khee <vee.khee.wong@linux.intel.com>,
"Wong, Vee Khee" <vee.khee.wong@intel.com>,
"Tan, Tee Min" <tee.min.tan@intel.com>,
"Sit, Michael Wei Hong" <michael.wei.hong.sit@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume()
Date: Fri, 25 Jun 2021 17:48:34 +0100 [thread overview]
Message-ID: <20210625164834.GY22278@shell.armlinux.org.uk> (raw)
In-Reply-To: <CH0PR11MB53806D16AF301F16A298C70C88069@CH0PR11MB5380.namprd11.prod.outlook.com>
On Fri, Jun 25, 2021 at 03:58:17PM +0000, Voon, Weifeng wrote:
> > > No, the interrupt will not be discarded. If the PHY is in interrupt
> > > mode, the interrupt handler will triggers and ISR will clear the WOL
> > status bit.
> > > The condition here is when the PHY is in polling mode, the PHY driver
> > > does not have any other mechanism to clear the WOL interrupt status bit.
> > > Hence, we need to go through the PHY set_wol() again.
> >
> > I would say you have a broken setup. If you are explicitly using the
> > interrupt as a wakeup source, you need to be servicing the interrupt. You
> > cannot use polled mode.
>
> Sorry for the confusion. But I would like to clarify the I should use the
> term of "WOL event status" rather than "WOL interrupt status".
> For interrupt mode, clearing the "WOL interrupt status" register will auto
> clear the "WOL event status".
> For polling mode, the phy driver can manually clear the "WOL event status" by
> setting 1 to "Clear WOL Status" bit.
If WOL raises an interrupt signal from the PHY, but the PHY interrupt
signal is not wired, how does the wakeup happen? What is the PHY
interrupt wired to?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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next prev parent reply other threads:[~2021-06-25 16:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 9:45 [PATCH net-next V1 0/4] Add option to enable PHY WOL with PMT enabled Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 1/4] net: stmmac: " Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 2/4] stmmac: intel: Enable PHY WOL option in EHL Ling Pei Lee
2021-06-21 9:45 ` [PATCH net-next V1 3/4] net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume() Ling Pei Lee
2021-06-21 13:05 ` Andrew Lunn
2021-06-23 10:06 ` Voon, Weifeng
2021-06-23 19:36 ` Andrew Lunn
2021-06-24 10:07 ` Voon, Weifeng
2021-06-24 13:40 ` Andrew Lunn
2021-06-25 15:58 ` Voon, Weifeng
2021-06-25 16:35 ` Andrew Lunn
2021-06-28 7:48 ` Voon, Weifeng
2021-06-25 16:48 ` Russell King (Oracle) [this message]
2021-06-28 7:54 ` Voon, Weifeng
2021-06-21 9:45 ` [PATCH net-next V1 4/4] stmmac: intel: set PCI_D3hot in suspend Ling Pei Lee
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