From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A13B5C11F65 for ; Tue, 29 Jun 2021 01:48:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8AB6E61CA5 for ; Tue, 29 Jun 2021 01:48:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231276AbhF2Bu0 (ORCPT ); Mon, 28 Jun 2021 21:50:26 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:43834 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229910AbhF2BuX (ORCPT ); Mon, 28 Jun 2021 21:50:23 -0400 X-UUID: e01f0acc8f564f299e194a32c7026b01-20210629 X-UUID: e01f0acc8f564f299e194a32c7026b01-20210629 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 566307297; Tue, 29 Jun 2021 09:47:53 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Jun 2021 09:47:52 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Jun 2021 09:47:52 +0800 From: Trevor Wu To: , , , CC: , , , , , , , , , Subject: [PATCH v2 6/8] dt-bindings: mediatek: mt8195: add audio afe document Date: Tue, 29 Jun 2021 09:47:34 +0800 Message-ID: <20210629014736.31153-7-trevor.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210629014736.31153-1-trevor.wu@mediatek.com> References: <20210629014736.31153-1-trevor.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds mt8195 audio afe document. Signed-off-by: Trevor Wu --- This patch depends on the following series that have not been accepted. [1] Mediatek MT8195 clock support https://patchwork.kernel.org/project/linux-mediatek/list/?series=501923 (dt-bindings/clock/mt8195-clk.h is included) [2] Mediatek MT8195 power domain support https://patchwork.kernel.org/project/linux-mediatek/list/?series=500709 (dt-bindings/power/mt8195-power.h is included) --- .../bindings/sound/mt8195-afe-pcm.yaml | 136 ++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml diff --git a/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml new file mode 100644 index 000000000000..a4fb5c7dd022 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek AFE PCM controller for mt8195 + +maintainers: + - Trevor Wu + +properties: + compatible: + const: mediatek,mt8195-audio + + interrupts: + maxItems: 1 + + mediatek,topckgen: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of the mediatek topckgen controller + + power-domains: + maxItems: 1 + + clocks: + items: + - description: audio 26M clock + - description: AFE clock + - description: audio infra sys clock + - description: audio infra 26M clock + + clock-names: + items: + - const: clk26m + - const: aud_afe + - const: infra_ao_audio + - const: infra_ao_audio_26m_b + + etdm-in1-chn-disabled: + $ref: /schemas/types.yaml#/definitions/uint8-array + maxItems: 24 + description: Specify which input channel should be disabled. + + etdm-in2-chn-disabled: + $ref: /schemas/types.yaml#/definitions/uint8-array + maxItems: 16 + description: Specify which input channel should be disabled. + +patternProperties: + "^etdm-in[1-2]-mclk-source$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm in mclk source clock. + enum: + - 0 # xtal_26m_ck + - 1 # apll1_ck + - 2 # apll2_ck + - 3 # apll3_ck + - 4 # apll4_ck + - 5 # apll5_ck + - 6 # hdmirx_apll_ck + + "^etdm-out[1-3]-mclk-source$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm out mclk source clock. + + "^etdm-in[1-2]-mclk-alwasys-on-rate$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm in mclk output rate for always on case. + + "^etdm-out[1-3]-mclk-alwasys-on-rate$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm out mclk output rate for always on case. + + "^etdm-in[1-2]-data-mode$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm in data mode. + enum: + - 0 # one pin (TDM) + - 1 # multi pin (I2S) + + "^etdm-out[1-3]-data-mode$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: Specify etdm out data mode. + + "^etdm-in[1-2]-cowork-source$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + etdm modules can share the same external clock pin. Specify + which etdm clock source is required by this etdm in moudule. + enum: + - 0 # etdm1_in + - 1 # etdm2_in + - 2 # etdm1_out + - 3 # etdm2_out + - 4 # etdm3_out + + "^etdm-out[1-3]-cowork-source$": + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + etdm modules can share the same external clock pin. Specify + which etdm clock source is required by this etdm out moudule. + +required: + - compatible + - interrupts + - mediatek,topckgen + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + afe: mt8195-afe-pcm { + compatible = "mediatek,mt8195-audio"; + interrupts = ; + mediatek,topckgen = <&topckgen>; + power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>; + clocks = <&clk26m>, + <&audsys CLK_AUD_AFE>, + <&infracfg_ao CLK_INFRA_AO_AUDIO>, + <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_B>; + clock-names = "clk26m", + "aud_afe", + "infra_ao_audio", + "infra_ao_audio_26m_b"; + }; + +... -- 2.18.0