From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC2BEC11F64 for ; Tue, 29 Jun 2021 03:10:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B25A861CB1 for ; Tue, 29 Jun 2021 03:10:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231877AbhF2DMz (ORCPT ); Mon, 28 Jun 2021 23:12:55 -0400 Received: from mga17.intel.com ([192.55.52.151]:40075 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231398AbhF2DMx (ORCPT ); Mon, 28 Jun 2021 23:12:53 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10029"; a="188454181" X-IronPort-AV: E=Sophos;i="5.83,307,1616482800"; d="scan'208";a="188454181" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2021 20:10:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,307,1616482800"; d="scan'208";a="558597289" Received: from peileeli.png.intel.com ([172.30.240.12]) by fmsmga001.fm.intel.com with ESMTP; 28 Jun 2021 20:10:21 -0700 From: Ling Pei Lee To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , davem@davemloft.net, Jakub Kicinski , Maxime Coquelin , Russell King , weifeng.voon@intel.com, boon.leong.ong@intel.com, vee.khee.wong@linux.intel.com, vee.khee.wong@intel.com, tee.min.tan@intel.com, michael.wei.hong.sit@intel.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: pei.lee.ling@intel.com Subject: [PATCH net-next V2 0/3] Add option to enable PHY WOL with PMT enabled Date: Tue, 29 Jun 2021 11:08:56 +0800 Message-Id: <20210629030859.1273157-1-pei.lee.ling@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset main objective is to provide an option to enable PHY WoL even the PMT is enabled by default in the HW features. The current stmmac driver WOL implementation will enable MAC WOL if MAC HW PMT feature is on. Else, the driver will check for PHY WOL support. Intel EHL mgbe are designed to wake up through PHY WOL although the HW PMT is enabled.Hence, introduced use_phy_wol platform data to provide this PHY WOL option. Set use_phy_wol will disable the plat->pmt which currently used to determine the system to wake up by MAC WOL or PHY WOL. This WOL patchset includes of setting the device power state to D3hot. This is because the EHL PSE will need to PSE mgbe to be in D3 state in order for the PSE to goes into suspend mode. Change Log: V2: Drop Patch #3 net: stmmac: Reconfigure the PHY WOL settings in stmmac_resume(). Ling Pei Lee (2): net: stmmac: option to enable PHY WOL with PMT enabled stmmac: intel: Enable PHY WOL option in EHL Voon Weifeng (1): stmmac: intel: set PCI_D3hot in suspend drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 2 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++- include/linux/stmmac.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) -- 2.25.1