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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org, paul@crapouillou.net,
	robh+dt@kernel.org, linux-mips@vger.kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com,
	aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
	sihui.liu@ingenic.com, jun.jiang@ingenic.com,
	sernia.zhou@foxmail.com
Subject: Re: [PATCH v4 0/5] Misc Ingenic patches.
Date: Wed, 30 Jun 2021 14:37:56 +0200	[thread overview]
Message-ID: <20210630123756.GA7139@alpha.franken.de> (raw)
In-Reply-To: <1624688321-69131-1-git-send-email-zhouyanjie@wanyeetech.com>

On Sat, Jun 26, 2021 at 02:18:36PM +0800, 周琰杰 (Zhou Yanjie) wrote:
> Some misc patches that don't really have any relation
> between themselves.
> 
> 周琰杰 (Zhou Yanjie) (5):
>   MIPS: X1830: Respect cell count of common properties.
>   dt-bindings: clock: Add documentation for MAC PHY control bindings.
>   MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
>   MIPS: CI20: Reduce clocksource to 750 kHz.
>   MIPS: CI20: Add second percpu timer for SMP.
> 
>  .../devicetree/bindings/clock/ingenic,cgu.yaml     |  2 ++
>  arch/mips/boot/dts/ingenic/ci20.dts                | 24 +++++++++++++---------
>  arch/mips/boot/dts/ingenic/x1000.dtsi              |  7 +++++++
>  arch/mips/boot/dts/ingenic/x1830.dtsi              | 16 ++++++++++-----
>  4 files changed, 34 insertions(+), 15 deletions(-)

applied to mips-next.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

      parent reply	other threads:[~2021-06-30 12:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-26  6:18 [PATCH v4 0/5] Misc Ingenic patches 周琰杰 (Zhou Yanjie)
2021-06-26  6:18 ` [PATCH v4 1/5] MIPS: X1830: Respect cell count of common properties 周琰杰 (Zhou Yanjie)
2021-06-26  6:18 ` [PATCH v4 2/5] dt-bindings: clock: Add documentation for MAC PHY control bindings 周琰杰 (Zhou Yanjie)
2021-06-28  2:52   ` Stephen Boyd
2021-06-28  4:46     ` 周琰杰
2021-06-26  6:18 ` [PATCH v4 3/5] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-06-26  6:18 ` [PATCH v4 4/5] MIPS: CI20: Reduce clocksource to 750 kHz 周琰杰 (Zhou Yanjie)
2021-06-30 12:21   ` Paul Cercueil
2021-06-26  6:18 ` [PATCH v4 5/5] MIPS: CI20: Add second percpu timer for SMP 周琰杰 (Zhou Yanjie)
2021-06-30 12:24   ` Paul Cercueil
2021-07-02 12:04     ` Zhou Yanjie
2021-06-30 12:37 ` Thomas Bogendoerfer [this message]

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