From: Sudeep Holla <sudeep.holla@arm.com>
To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Sudeep Holla <sudeep.holla@arm.com>,
Cristian Marussi <cristian.marussi@arm.com>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
Jassi Brar <jassisinghbrar@gmail.com>
Subject: [PATCH 11/13] mailbox: pcc: Drop handling invalid bit-width in {read,write}_register
Date: Thu, 8 Jul 2021 19:08:49 +0100 [thread overview]
Message-ID: <20210708180851.2311192-12-sudeep.holla@arm.com> (raw)
In-Reply-To: <20210708180851.2311192-1-sudeep.holla@arm.com>
pcc_chan_reg_init now checks if the register bit width is within the
list [8, 16, 32, 64] and flags error if that is not the case. Therefore
there is no need to handling invalid bit-width in both read_register
and write_register. We can drop that along with the return values for
these 2 functions.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
drivers/mailbox/pcc.c | 24 ++++--------------------
1 file changed, 4 insertions(+), 20 deletions(-)
diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c
index 237dba9cb445..99ad3429f174 100644
--- a/drivers/mailbox/pcc.c
+++ b/drivers/mailbox/pcc.c
@@ -110,10 +110,8 @@ static struct mbox_controller pcc_mbox_ctrl = {};
* The below read_register and write_registers are used to read and
* write from perf critical registers such as PCC doorbell register
*/
-static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
+static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
{
- int ret_val = 0;
-
switch (bit_width) {
case 8:
*val = readb(vaddr);
@@ -127,19 +125,11 @@ static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
case 64:
*val = readq(vaddr);
break;
- default:
- pr_debug("Error: Cannot read register of %u bit width",
- bit_width);
- ret_val = -EFAULT;
- break;
}
- return ret_val;
}
-static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
+static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
{
- int ret_val = 0;
-
switch (bit_width) {
case 8:
writeb(val, vaddr);
@@ -153,13 +143,7 @@ static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
case 64:
writeq(val, vaddr);
break;
- default:
- pr_debug("Error: Cannot write register of %u bit width",
- bit_width);
- ret_val = -EFAULT;
- break;
}
- return ret_val;
}
static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
@@ -172,7 +156,7 @@ static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
}
if (reg->vaddr)
- ret = read_register(reg->vaddr, val, reg->gas->bit_width);
+ read_register(reg->vaddr, val, reg->gas->bit_width);
else
ret = acpi_read(val, reg->gas);
@@ -187,7 +171,7 @@ static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
return 0;
if (reg->vaddr)
- ret = write_register(reg->vaddr, val, reg->gas->bit_width);
+ write_register(reg->vaddr, val, reg->gas->bit_width);
else
ret = acpi_write(val, reg->gas);
--
2.25.1
next prev parent reply other threads:[~2021-07-08 18:09 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 18:08 [PATCH 00/13] mailbox: pcc: Add support for PCCT extended PCC subspaces Sudeep Holla
2021-07-08 18:08 ` [PATCH 01/13] mailbox: pcc: Fix doxygen comments Sudeep Holla
2021-07-08 18:51 ` Joe Perches
2021-07-08 21:03 ` Sudeep Holla
2021-07-08 18:08 ` [PATCH 02/13] ACPI: CPPC: " Sudeep Holla
2021-07-14 12:20 ` Rafael J. Wysocki
2021-07-14 15:12 ` Sudeep Holla
2021-07-14 16:07 ` Cristian Marussi
2021-07-14 16:14 ` Sudeep Holla
2021-07-08 18:08 ` [PATCH 03/13] mailbox: pcc: Refactor all PCC channel information into a structure Sudeep Holla
2021-07-14 16:54 ` Cristian Marussi
2021-07-15 11:27 ` Sudeep Holla
2021-07-15 12:50 ` Cristian Marussi
2021-07-15 13:24 ` Sudeep Holla
2021-07-08 18:08 ` [PATCH 04/13] mailbox: pcc: Consolidate subspace interrupt information parsing Sudeep Holla
2021-07-14 17:44 ` Cristian Marussi
2021-07-08 18:08 ` [PATCH 05/13] mailbox: pcc: Consolidate subspace doorbell register parsing Sudeep Holla
2021-07-14 18:09 ` Cristian Marussi
2021-07-08 18:08 ` [PATCH 06/13] mailbox: pcc: Add pcc_mbox_chan structure to hold shared memory region info Sudeep Holla
2021-07-14 18:18 ` Cristian Marussi
2021-07-15 11:22 ` Sudeep Holla
2021-07-08 18:08 ` [PATCH 07/13] mailbox: pcc: Use PCC mailbox channel pointer instead of standard Sudeep Holla
2021-07-08 18:08 ` [PATCH 08/13] mailbox: pcc: Rename doorbell ack to platform interrupt ack register Sudeep Holla
2021-07-08 18:08 ` [PATCH 09/13] mailbox: pcc: Add PCC register bundle and associated accessor functions Sudeep Holla
2021-07-08 18:08 ` [PATCH 10/13] mailbox: pcc: Avoid accessing PCCT table in pcc_send_data and pcc_mbox_irq Sudeep Holla
2021-07-14 18:37 ` Cristian Marussi
2021-07-15 13:38 ` Cristian Marussi
2021-07-08 18:08 ` Sudeep Holla [this message]
2021-07-08 18:08 ` [PATCH 12/13] mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4) Sudeep Holla
2021-07-14 18:52 ` Cristian Marussi
2021-07-15 11:31 ` Sudeep Holla
2021-07-08 18:08 ` [PATCH 13/13] mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe Sudeep Holla
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