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From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
To: linux-kernel@vger.kernel.org
Cc: chunkuang.hu@kernel.org, hsinyi@chromium.org,
	kernel@collabora.com, drinkcat@chromium.org, eizan@chromium.org,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	jitao.shi@mediatek.com, Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 4/7] arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
Date: Wed, 14 Jul 2021 12:11:38 +0200	[thread overview]
Message-ID: <20210714121116.v2.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid> (raw)
In-Reply-To: <20210714101141.2089082-1-enric.balletbo@collabora.com>

Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---

(no changes since v1)

 arch/arm64/boot/dts/mediatek/mt8173.dtsi  | 2 ++
 include/dt-bindings/reset/mt8173-resets.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index a3de6374d495..2ac77d47bf81 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -1036,6 +1036,7 @@ mmsys: syscon@14000000 {
 			assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
 			assigned-clock-rates = <400000000>;
 			#clock-cells = <1>;
+			#reset-cells = <1>;
 			mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
 				 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
 			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
@@ -1261,6 +1262,7 @@ dsi0: dsi@1401b000 {
 				 <&mmsys CLK_MM_DSI0_DIGITAL>,
 				 <&mipi_tx0>;
 			clock-names = "engine", "digital", "hs";
+			resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
 			phys = <&mipi_tx0>;
 			phy-names = "dphy";
 			status = "disabled";
diff --git a/include/dt-bindings/reset/mt8173-resets.h b/include/dt-bindings/reset/mt8173-resets.h
index ba8636eda5ae..6a60c7cecc4c 100644
--- a/include/dt-bindings/reset/mt8173-resets.h
+++ b/include/dt-bindings/reset/mt8173-resets.h
@@ -27,6 +27,8 @@
 #define MT8173_INFRA_GCE_FAXI_RST       40
 #define MT8173_INFRA_MMIOMMURST         47
 
+/* MMSYS resets */
+#define MT8173_MMSYS_SW0_RST_B_DISP_DSI0	25
 
 /*  PERICFG resets */
 #define MT8173_PERI_UART0_SW_RST        0
-- 
2.30.2


  parent reply	other threads:[~2021-07-14 10:12 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-14 10:11 [PATCH v2 0/7] Add support to the mmsys driver to be a reset controller Enric Balletbo i Serra
2021-07-14 10:11 ` [PATCH v2 1/7] arm64: dts: mediatek: Move reset controller constants into common location Enric Balletbo i Serra
2021-07-30  5:04   ` Guenter Roeck
2021-08-06 15:43   ` Matthias Brugger
2021-07-14 10:11 ` [PATCH v2 2/7] dt-bindings: mediatek: Add #reset-cells to mmsys system controller Enric Balletbo i Serra
2021-07-16 17:42   ` Rob Herring
2021-07-14 10:11 ` [PATCH v2 3/7] dt-bindings: display: mediatek: add dsi reset optional property Enric Balletbo i Serra
2021-07-16 17:55   ` Rob Herring
2021-07-14 10:11 ` Enric Balletbo i Serra [this message]
2021-07-16 17:56   ` [PATCH v2 4/7] arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0 Rob Herring
2021-07-14 10:11 ` [PATCH v2 5/7] arm64: dts: mt8183: " Enric Balletbo i Serra
2021-07-16 17:57   ` Rob Herring
2021-07-14 10:11 ` [PATCH v2 6/7] soc: mediatek: mmsys: Add reset controller support Enric Balletbo i Serra
2021-07-20 10:52   ` Philipp Zabel
2021-07-20 17:07     ` Enric Balletbo i Serra
2021-07-21  9:53       ` Philipp Zabel
2021-08-06 17:34   ` Matthias Brugger
2021-07-14 10:11 ` [PATCH v2 7/7] drm/mediatek: mtk_dsi: Reset the dsi0 hardware Enric Balletbo i Serra
2021-08-02 23:21   ` Chun-Kuang Hu
2021-08-06 17:33   ` Matthias Brugger

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