From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAFAAC636C9 for ; Tue, 20 Jul 2021 01:46:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6DF26120F for ; Tue, 20 Jul 2021 01:46:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244052AbhGTBFc (ORCPT ); Mon, 19 Jul 2021 21:05:32 -0400 Received: from mga03.intel.com ([134.134.136.65]:17245 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240595AbhGTBAu (ORCPT ); Mon, 19 Jul 2021 21:00:50 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10050"; a="211219372" X-IronPort-AV: E=Sophos;i="5.84,253,1620716400"; d="scan'208";a="211219372" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jul 2021 18:41:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,253,1620716400"; d="scan'208";a="453887562" Received: from allen-box.sh.intel.com ([10.239.159.118]) by orsmga007.jf.intel.com with ESMTP; 19 Jul 2021 18:41:27 -0700 From: Lu Baolu To: Joerg Roedel , Sanjay Kumar , Kevin Tian , Ashok Raj , Jacob Pan , Dave Jiang , Liu Yi L Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 4/5] iommu/vt-d: Disallow SVA if devices don't support 64-bit address Date: Tue, 20 Jul 2021 09:38:55 +0800 Message-Id: <20210720013856.4143880-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210720013856.4143880-1-baolu.lu@linux.intel.com> References: <20210720013856.4143880-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When the device and CPU share an address space (such as SVA), the device must support the same addressing capability as the CPU. The CPU does not consider the addressing ability of any device when managing the page table of a process, so the device must have enough addressing ability to bind the page table of the process. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f45c80ce2381..f3cca1dd384d 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5372,6 +5372,9 @@ static int intel_iommu_enable_sva(struct device *dev) if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE)) return -ENODEV; + if (!dev->dma_mask || *dev->dma_mask != DMA_BIT_MASK(64)) + return -ENODEV; + if (intel_iommu_enable_pasid(iommu, dev)) return -ENODEV; -- 2.25.1