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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:33 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 1/6] iio/adc: ingenic: rename has_aux2 to has_aux_md Date: Wed, 21 Jul 2021 12:53:12 +0200 Message-Id: <20210721105317.36742-2-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The purpose of this property is to set the AUX_MD bits if true, no to describe the hardware. Rename it to a more appropriate name. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 34c03a264f74..40f2d8c2cf72 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -92,7 +92,7 @@ struct ingenic_adc_soc_data { const int *battery_scale_avail; size_t battery_scale_avail_size; unsigned int battery_vref_mode: 1; - unsigned int has_aux2: 1; + unsigned int has_aux_md: 1; const struct iio_chan_spec *channels; unsigned int num_channels; int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); @@ -506,7 +506,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { .battery_scale_avail = jz4725b_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = jz4725b_adc_init_clk_div, @@ -520,7 +520,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .battery_scale_avail = jz4740_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ @@ -534,7 +534,7 @@ static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_scale_avail = jz4770_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail), .battery_vref_mode = false, - .has_aux2 = true, + .has_aux_md = true, .channels = jz4770_channels, .num_channels = ARRAY_SIZE(jz4770_channels), .init_clk_div = jz4770_adc_init_clk_div, @@ -581,7 +581,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, /* We cannot sample AUX/AUX2 in parallel. */ mutex_lock(&adc->aux_lock); - if (adc->soc_data->has_aux2 && engine == 0) { + if (adc->soc_data->has_aux_md && engine == 0) { bit = BIT(chan->channel == INGENIC_ADC_AUX2); ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); } -- 2.30.2