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* [PATCH] PCI: Add ACS quirk for NXP LX2160A and LX2162A
@ 2021-07-29 12:17 Wasim Khan
  2021-07-29 21:41 ` Bjorn Helgaas
  0 siblings, 1 reply; 2+ messages in thread
From: Wasim Khan @ 2021-07-29 12:17 UTC (permalink / raw)
  To: bhelgaas, linux-pci, linux-kernel; +Cc: V.Sethi, Wasim Khan

From: Wasim Khan <wasim.khan@nxp.com>

Root Ports in NXP LX2160A and LX2162A where each Root Port
is a Root Complex with unique segment numbers do provide
isolation features to disable peer transactions and
validate bus numbers in requests, but do not provide an
actual PCIe ACS capability.

Add ACS quirk for NXP LX2160A and LX2162A

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
---
 drivers/pci/quirks.c    | 16 ++++++++++++++++
 include/linux/pci_ids.h |  1 +
 2 files changed, 17 insertions(+)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 653660e3ba9e..24343a76c034 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4527,6 +4527,18 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
 		PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
 }
 
+/*
+ * These NXP Root Ports with each Root Port is a Root Complex
+ * with unique segment numbers do provide isolation features
+ * to disable peer transactions and validate bus numbers in
+ * requests, but do not provide an actual PCIe ACS capability.
+ */
+static int pci_quirk_nxp_rp_acs(struct pci_dev *dev, u16 acs_flags)
+{
+	return pci_acs_ctrl_enabled(acs_flags,
+		PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+}
+
 static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags)
 {
 	if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
@@ -4771,6 +4783,10 @@ static const struct pci_dev_acs_enabled {
 	{ PCI_VENDOR_ID_ZHAOXIN, 0x3038, pci_quirk_mf_endpoint_acs },
 	{ PCI_VENDOR_ID_ZHAOXIN, 0x3104, pci_quirk_mf_endpoint_acs },
 	{ PCI_VENDOR_ID_ZHAOXIN, 0x9083, pci_quirk_mf_endpoint_acs },
+	/* NXP root ports */
+	{ PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs },
+	{ PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs },
+	{ PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs },
 	/* Zhaoxin Root/Downstream Ports */
 	{ PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs },
 	{ 0 }
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d8156a5dbee8..9eabf77d043a 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2537,6 +2537,7 @@
 #define PCI_DEVICE_ID_MPC8641		0x7010
 #define PCI_DEVICE_ID_MPC8641D		0x7011
 #define PCI_DEVICE_ID_MPC8610		0x7018
+#define PCI_VENDOR_ID_NXP		0x1957
 
 #define PCI_VENDOR_ID_PASEMI		0x1959
 
-- 
2.25.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] PCI: Add ACS quirk for NXP LX2160A and LX2162A
  2021-07-29 12:17 [PATCH] PCI: Add ACS quirk for NXP LX2160A and LX2162A Wasim Khan
@ 2021-07-29 21:41 ` Bjorn Helgaas
  0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Helgaas @ 2021-07-29 21:41 UTC (permalink / raw)
  To: Wasim Khan; +Cc: bhelgaas, linux-pci, linux-kernel, V.Sethi, Wasim Khan

On Thu, Jul 29, 2021 at 02:17:47PM +0200, Wasim Khan wrote:
> From: Wasim Khan <wasim.khan@nxp.com>
> 
> Root Ports in NXP LX2160A and LX2162A where each Root Port
> is a Root Complex with unique segment numbers do provide
> isolation features to disable peer transactions and
> validate bus numbers in requests, but do not provide an
> actual PCIe ACS capability.
> 
> Add ACS quirk for NXP LX2160A and LX2162A
> 
> Signed-off-by: Wasim Khan <wasim.khan@nxp.com>

Applied to pci/virtualization for v5.15, thanks!

> ---
>  drivers/pci/quirks.c    | 16 ++++++++++++++++
>  include/linux/pci_ids.h |  1 +
>  2 files changed, 17 insertions(+)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 653660e3ba9e..24343a76c034 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4527,6 +4527,18 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
>  		PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
>  }
>  
> +/*
> + * These NXP Root Ports with each Root Port is a Root Complex
> + * with unique segment numbers do provide isolation features
> + * to disable peer transactions and validate bus numbers in
> + * requests, but do not provide an actual PCIe ACS capability.
> + */
> +static int pci_quirk_nxp_rp_acs(struct pci_dev *dev, u16 acs_flags)
> +{
> +	return pci_acs_ctrl_enabled(acs_flags,
> +		PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
> +}
> +
>  static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags)
>  {
>  	if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT)
> @@ -4771,6 +4783,10 @@ static const struct pci_dev_acs_enabled {
>  	{ PCI_VENDOR_ID_ZHAOXIN, 0x3038, pci_quirk_mf_endpoint_acs },
>  	{ PCI_VENDOR_ID_ZHAOXIN, 0x3104, pci_quirk_mf_endpoint_acs },
>  	{ PCI_VENDOR_ID_ZHAOXIN, 0x9083, pci_quirk_mf_endpoint_acs },
> +	/* NXP root ports */
> +	{ PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs },
> +	{ PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs },
> +	{ PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs },
>  	/* Zhaoxin Root/Downstream Ports */
>  	{ PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs },
>  	{ 0 }
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index d8156a5dbee8..9eabf77d043a 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2537,6 +2537,7 @@
>  #define PCI_DEVICE_ID_MPC8641		0x7010
>  #define PCI_DEVICE_ID_MPC8641D		0x7011
>  #define PCI_DEVICE_ID_MPC8610		0x7018
> +#define PCI_VENDOR_ID_NXP		0x1957
>  
>  #define PCI_VENDOR_ID_PASEMI		0x1959
>  
> -- 
> 2.25.1
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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